diff --git a/gas/doc/as.texi b/gas/doc/as.texi
index bd1f5635b7a..525157e7cd0 100644
--- a/gas/doc/as.texi
+++ b/gas/doc/as.texi
@@ -838,7 +838,7 @@ suffix.
 
 @item --gdwarf-cie-version=@var{version}
 Control which version of DWARF Common Information Entries (CIEs) are produced.
-When this flag is not specificed the default is version 1, though some targets
+When this flag is not specified the default is version 1, though some targets
 can modify this default.  Other possible values for @var{version} are 3 or 4.
 
 @ifset ELF
@@ -5507,7 +5507,7 @@ With this version a separate directory name is allowed, although if this is
 used then @var{filename} should not contain any directory component, except
 for @var{fileno} equal to 0: in this case, @var{dirname} is expected to be
 the current directory and @var{filename} the currently processed file, and
-the latter need not be located in the former. In addtion an MD5 hash value
+the latter need not be located in the former. In addition an MD5 hash value
 of the contents of @var{filename} can be provided. This will be stored in
 the the file table as well, and can be used by tools reading the debug
 information to verify that the contents of the source file match the
@@ -6909,7 +6909,7 @@ must be present along with an additional field like this:
 
 The @var{SymbolName} field specifies the symbol name which the section
 references.  Alternatively a numeric @var{SectionIndex} can be provided.  This
-is not generally a good idea as section indicies are rarely known at assembly
+is not generally a good idea as section indices are rarely known at assembly
 time, but the facility is provided for testing purposes.  An index of zero is
 allowed.  It indicates that the linked-to section has already been discarded.
 
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index f3f7890cf58..fdbd303d982 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -1727,7 +1727,7 @@ syntax.
 
 @item @samp{lfs}, @samp{lgs}, and @samp{lss} similarly allow for 16-
 and 32-bit operand size (32- and 48-bit memory operand) in both ISAs,
-while Intel64 additionally supports 64-bit operand sise (80-bit memory
+while Intel64 additionally supports 64-bit operand size (80-bit memory
 operands).
 
 @end itemize
diff --git a/gas/doc/c-kvx.texi b/gas/doc/c-kvx.texi
index ffdc5c8a800..5baec01a688 100644
--- a/gas/doc/c-kvx.texi
+++ b/gas/doc/c-kvx.texi
@@ -98,8 +98,8 @@ Print succinct diagnostics on one line.
 @table @code
 
 @cindex @code{.align} directive, KVX
-@item .align ALIGNEMENT
-Pad with NOPs until the next boundary with the required ALIGNEMENT.
+@item .align ALIGNMENT
+Pad with NOPs until the next boundary with the required ALIGNMENT.
 
 @cindex @code{.dword} directive, KVX
 @item .dword
@@ -131,7 +131,7 @@ This directive is only supported when producing ELF files.
 
 @cindex @code{.loc} directive, KVX
 @item .loc FILENO LINENO
-This directive is only supported when producting ELF files.
+This directive is only supported when producing ELF files.
 @pxref{Line,,@code{.line}} for details.
 
 @cindex @code{.proc} directive, KVX
diff --git a/gas/doc/c-loongarch.texi b/gas/doc/c-loongarch.texi
index dd5236a37be..da8d5c937ed 100644
--- a/gas/doc/c-loongarch.texi
+++ b/gas/doc/c-loongarch.texi
@@ -1,5 +1,5 @@
 @c Copyright (C) 2021-2024 Free Software Foundation, Inc.
-@c This is part of the GAS anual.
+@c This is part of the GAS manual.
 @c For copying conditions, see the file as.texinfo
 @c man end
 
diff --git a/gas/doc/c-msp430.texi b/gas/doc/c-msp430.texi
index 18a435bb171..0de40b5128d 100644
--- a/gas/doc/c-msp430.texi
+++ b/gas/doc/c-msp430.texi
@@ -154,7 +154,7 @@ Extracts most significant word from 32-bit expression 'exp'.
 Extracts 3rd word from 64-bit expression 'exp'.
 
 @item 	hhi(exp)
-Extracts 4rd word from 64-bit expression 'exp'.
+Extracts 4th word from 64-bit expression 'exp'.
 
 @end table
 
diff --git a/gas/doc/c-or1k.texi b/gas/doc/c-or1k.texi
index 82a2d50e7a4..1babfe9ce0b 100644
--- a/gas/doc/c-or1k.texi
+++ b/gas/doc/c-or1k.texi
@@ -49,7 +49,7 @@ of a comment that extends to the end of that line.
 @cindex OpenRISC registers
 @cindex register names, OpenRISC
 
-The OpenRISC register file contains 32 general pupose registers.
+The OpenRISC register file contains 32 general purpose registers.
 
 @itemize @bullet
 @item
diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi
index e929c1cddbe..7484a71798a 100644
--- a/gas/doc/c-riscv.texi
+++ b/gas/doc/c-riscv.texi
@@ -1,5 +1,5 @@
 @c Copyright (C) 2016-2024 Free Software Foundation, Inc.
-@c This is part of the GAS anual.
+@c This is part of the GAS manual.
 @c For copying conditions, see the file as.texinfo
 @c man end
 
@@ -457,7 +457,7 @@ only accept s0-s1, a0-a5, fs0-fs1 and fa0-fa5.
 @item uimm5 @tab Unsigned 5-bit immediate for operand x.
 @item uimm6 @tab Unsigned 6-bit immediate for operand x.
 @item uimm8 @tab Unsigned 8-bit immediate for operand x.
-@item symbol @tab Symbol or lable reference for operand x.
+@item symbol @tab Symbol or label reference for operand x.
 @end multitable
 @end display
 
diff --git a/gas/doc/c-s390.texi b/gas/doc/c-s390.texi
index 0028009597e..f73dfdeae60 100644
--- a/gas/doc/c-s390.texi
+++ b/gas/doc/c-s390.texi
@@ -190,7 +190,7 @@ character usually hint at the type of the instruction:
 @item b @tab branch instruction, for example @samp{bc} for branch on condition
 @item c @tab compare or convert instruction, for example @samp{cr} for compare
 register 32-bit
-@item d @tab divide instruction, for example @samp{dlr} devide logical register
+@item d @tab divide instruction, for example @samp{dlr} divide logical register
 64-bit to 32-bit
 @item i @tab insert instruction, for example @samp{ic} insert character
 @item l @tab load instruction, for example @samp{ltr} load and test register
diff --git a/gas/doc/c-sparc.texi b/gas/doc/c-sparc.texi
index da4c11ce2e4..df3cc3626f1 100644
--- a/gas/doc/c-sparc.texi
+++ b/gas/doc/c-sparc.texi
@@ -345,7 +345,7 @@ The V9 address space identifier register is referred to as @samp{%asi}.
 The V9 restorable windows register is referred to as @samp{%canrestore}.
 
 @item
-The V9 savable windows register is referred to as @samp{%cansave}.
+The V9 saveable windows register is referred to as @samp{%cansave}.
 
 @item
 The V9 clean windows register is referred to as @samp{%cleanwin}.
diff --git a/gas/doc/c-z80.texi b/gas/doc/c-z80.texi
index db925b1304a..a1bd0d99bcb 100644
--- a/gas/doc/c-z80.texi
+++ b/gas/doc/c-z80.texi
@@ -43,9 +43,9 @@ are recognized:
 @code{z80n},
 @code{r800}.
 In addition to the basic instruction set, the assembler can be told to
-accept some extention mnemonics. For example,
+accept some extension mnemonics. For example,
 @code{-march=z180+sli+infc} extends @var{z180} with @var{SLI} instructions and
-@var{IN F,(C)}. The following extentions are currently supported:
+@var{IN F,(C)}. The following extensions are currently supported:
 @code{full} (all known instructions),
 @code{adl} (ADL CPU mode by default, eZ80 only),
 @code{sli} (instruction known as @var{SLI}, @var{SLL} or @var{SL1}),
@@ -54,9 +54,9 @@ accept some extention mnemonics. For example,
 @code{xdcb} (instructions like @var{RotOp (II+d),R} and @var{BitOp n,(II+d),R}),
 @code{infc} (instruction @var{IN F,(C)} or @var{IN (C)}),
 @code{outc0} (instruction @var{OUT (C),0}).
-Note that rather than extending a basic instruction set, the extention
+Note that rather than extending a basic instruction set, the extension
 mnemonics starting with @code{-} revoke the respective functionality:
-@code{-march=z80-full+xyhl} first removes all default extentions and adds
+@code{-march=z80-full+xyhl} first removes all default extensions and adds
 support for index registers halves only.
 
 If this option is not specified then @code{-march=z80+xyhl+infc} is assumed.
