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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id o24-20020ac841d8000000b004195716fc55si856408qtm.711.2023.12.07.01.02.05 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Dec 2023 01:02:05 -0800 (PST) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=EaBfSAyc; arc=pass (i=1); spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 94AE938618A7 for ; Thu, 7 Dec 2023 09:02:05 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.12]) by sourceware.org (Postfix) with ESMTPS id ADB603857034 for ; Thu, 7 Dec 2023 09:01:50 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org ADB603857034 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org ADB603857034 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=198.175.65.12 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701939721; cv=none; b=E0NsQ2ZmpapdDBZDk0Ha1WgL0gMiMjZ1eUmRBvAYxbc6rm4NuhuYuq5nN2CV4pdgaoO6oR8IIfrRSqcqYFAUnoISMDM+XHk4KXAFSFPvDCTEGS3On0/HSQG+uVww4Z3f4xwYhvCMJ3N9yt8H9kYmPrCQzNV1J92E4F3v+/YMfg0= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701939721; c=relaxed/simple; bh=ZBreuaEu8Dml7ehNPUR3Wdj/EQ6Z6pzxexUFAi1Twlc=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=qzhPhicZvVl3FBJ0o2TNCph18v0rimUU8xuCKesVuw6AYKtloIWm7sb9WfFwAuHmuNZU9ROESd0tX6/y4nVpsl2MmOteEEexAgcicPzu4jN8nYeExWgJFCwzNC5lFgsPyvP7eWk5noCKYoWFOYLDnLjJ1Nl6y+DhhJhmSy3B3oc= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701939711; x=1733475711; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=ZBreuaEu8Dml7ehNPUR3Wdj/EQ6Z6pzxexUFAi1Twlc=; b=EaBfSAycLv2rUFnapKUrQkLQJMnQ7fcknQ4pzPH1/3hR/Rb8y0gBDJfM 8RuD9jMLLSgeBI5YaC4hf0fyffG9JYrMMuAaRZXWkg7JZxqedcWhUmnCR PD7McJLp0cSbdj7egrRNAkt82lfbpWV3FqJIWj3TJzaXcQtrv0AJltlyo h0d0IbgLBeWE00jLzYLkxcOE0lGW2LEoFkKmOzoyYkHR2moGzuoDo/I5j gT12S0q9DHPf7gn0yal1bzGfQiYl61ZNbP0Z9ubmzELV4NYNK/eYaixyq 7yBttxkiMzENp7CyXdBT80SnwfM6T3eZkhWUeRj+NzRnuPZBx8H9cME/A Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10916"; a="1283027" X-IronPort-AV: E=Sophos;i="6.04,256,1695711600"; d="scan'208";a="1283027" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Dec 2023 01:01:50 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.04,256,1695711600"; d="scan'208";a="13040606" Received: from scymds03.sc.intel.com ([10.148.94.166]) by orviesa002.jf.intel.com with ESMTP; 07 Dec 2023 01:01:49 -0800 Received: from shgcc101.sh.intel.com (shgcc101.sh.intel.com [10.239.85.97]) by scymds03.sc.intel.com (Postfix) with ESMTP id 3C9C1114C; Thu, 7 Dec 2023 01:01:48 -0800 (PST) From: "Cui, Lili" To: hongjiu.lu@intel.com Cc: binutils@sourceware.org, jbeulich@suse.com, "Hu, Lin1" Subject: [PATCH v4 9/9] Support APX JMPABS for disassembler Date: Thu, 7 Dec 2023 09:01:46 +0000 Message-Id: <20231207090146.2901286-1-lili.cui@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Spam-Status: No, score=-10.5 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784613150164822367 X-GMAIL-MSGID: 1784613150164822367 From: "Hu, Lin1" gas/ChangeLog: * testsuite/gas/i386/x86-64.exp: Ditto. * testsuite/gas/i386/x86-64-apx-jmpabs-intel.d: Ditto. * testsuite/gas/i386/x86-64-apx-jmpabs-inval.d: Ditto. * testsuite/gas/i386/x86-64-apx-jmpabs-inval.s: Ditto. * testsuite/gas/i386/x86-64-apx-jmpabs.d: Ditto. * testsuite/gas/i386/x86-64-apx-jmpabs.s: Ditto. opcodes/ChangeLog: * i386-dis.c (JMPABS_Fixup): New Fixup function to disassemble jmpabs. (print_insn): Add #UD exception for jmpabs. (dis386): Modify a1 unit for support jmpabs. * i386-mnem.h: Regenerated. * i386-opc.tbl: New insns. * i386-tbl.h: Regenerated. --- .../gas/i386/x86-64-apx-jmpabs-intel.d | 11 +++++ .../gas/i386/x86-64-apx-jmpabs-inval.d | 40 ++++++++++++++++++ .../gas/i386/x86-64-apx-jmpabs-inval.s | 15 +++++++ gas/testsuite/gas/i386/x86-64-apx-jmpabs.d | 11 +++++ gas/testsuite/gas/i386/x86-64-apx-jmpabs.s | 5 +++ gas/testsuite/gas/i386/x86-64.exp | 3 ++ opcodes/i386-dis.c | 41 +++++++++++++++++-- 7 files changed, 123 insertions(+), 3 deletions(-) create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs.d create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs.s diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d new file mode 100644 index 00000000000..8c229315904 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d @@ -0,0 +1,11 @@ +#as: +#objdump: -dw -Mintel +#name: x86_64 APX_F JMPABS insns (Intel disassembly) +#source: x86-64-apx-jmpabs.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00[ ]+jmpabs 0x2 diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d new file mode 100644 index 00000000000..c3dc0b0ad79 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d @@ -0,0 +1,40 @@ +#as: --64 +#objdump: -dw +#name: illegal decoding of APX_F jmpabs insns +#source: x86-64-apx-jmpabs-inval.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <.text>: +\s*[a-f0-9]+: 66 d5 00 a1[ ]+\(bad\) +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\) +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\) +\s*[a-f0-9]+: 67 d5 00 a1[ ]+\(bad\) +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\) +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\) +\s*[a-f0-9]+: f2 d5 00 a1[ ]+\(bad\) +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\) +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\) +\s*[a-f0-9]+: f3 d5 00 a1[ ]+\(bad\) +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\) +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\) +\s*[a-f0-9]+: f0 d5 00 a1[ ]+\(bad\) +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\) +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\) +\s*[a-f0-9]+: d5 08 a1[ ]+\(bad\) +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\) +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\) +\s*... diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s new file mode 100644 index 00000000000..de4440a5466 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s @@ -0,0 +1,15 @@ +# Check bytecode of APX_F jmpabs instructions with illegal encode. + + .text +# With 66 prefix + .byte 0x66,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 +# With 67 prefix + .byte 0x67,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 +# With F2 prefix + .byte 0xf2,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 +# With F3 prefix + .byte 0xf3,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 +# With LOCK prefix + .byte 0xf0,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 +# REX2.M0 = 0 REX2.W = 1 + .byte 0xd5,0x08,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs.d b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.d new file mode 100644 index 00000000000..f2dbd617527 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.d @@ -0,0 +1,11 @@ +#as: +#objdump: -dw +#name: x86_64 APX_F JMPABS insns +#source: x86-64-apx-jmpabs.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00[ ]+jmpabs \$0x2 diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s new file mode 100644 index 00000000000..69ffb763260 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s @@ -0,0 +1,5 @@ +# Check 64bit APX_F JMPABS instructions + + .text + _start: + .byte 0xd5,0x00,0xa1,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00 diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp index d1e25495a81..74433a20e24 100644 --- a/gas/testsuite/gas/i386/x86-64.exp +++ b/gas/testsuite/gas/i386/x86-64.exp @@ -377,6 +377,9 @@ run_dump_test "x86-64-apx-evex-promoted" run_dump_test "x86-64-apx-evex-promoted-intel" run_dump_test "x86-64-apx-evex-egpr" run_dump_test "x86-64-apx-ndd" +run_dump_test "x86-64-apx-jmpabs" +run_dump_test "x86-64-apx-jmpabs-intel" +run_dump_test "x86-64-apx-jmpabs-inval" run_dump_test "x86-64-avx512f-rcigrz-intel" run_dump_test "x86-64-avx512f-rcigrz" run_dump_test "x86-64-clwb" diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index db974de21a1..fa242c4dff5 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -106,6 +106,7 @@ static bool MOVSXD_Fixup (instr_info *, int, int); static bool DistinctDest_Fixup (instr_info *, int, int); static bool PREFETCHI_Fixup (instr_info *, int, int); static bool PUSH2_POP2_Fixup (instr_info *, int, int); +static bool JMPABS_Fixup (instr_info *, int, int); static void ATTRIBUTE_PRINTF_3 i386_dis_printf (const disassemble_info *, enum disassembler_style, @@ -2024,7 +2025,7 @@ static const struct dis386 dis386[] = { { "lahf", { XX }, 0 }, /* a0 */ { "mov%LB", { AL, Ob }, PREFIX_REX2_ILLEGAL }, - { "mov%LS", { eAX, Ov }, PREFIX_REX2_ILLEGAL }, + { "mov%LS", { { JMPABS_Fixup, eAX_reg }, { JMPABS_Fixup, v_mode } }, PREFIX_REX2_ILLEGAL }, { "mov%LB", { Ob, AL }, PREFIX_REX2_ILLEGAL }, { "mov%LS", { Ov, eAX }, PREFIX_REX2_ILLEGAL }, { "movs{b|}", { Ybr, Xb }, PREFIX_REX2_ILLEGAL }, @@ -9692,7 +9693,7 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax) } if ((dp->prefix_requirement & PREFIX_REX2_ILLEGAL) - && ins.last_rex2_prefix >= 0) + && ins.last_rex2_prefix >= 0 && (ins.rex2 & REX2_SPECIAL) == 0) { i386_dis_printf (info, dis_style_text, "(bad)"); ret = ins.end_codep - priv.the_buffer; @@ -9777,7 +9778,7 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax) ins.all_prefixes[ins.last_rex_prefix] = 0; /* Check if the REX2 prefix is used. */ - if (ins.last_rex2_prefix >= 0 && (ins.rex2 & 7)) + if (ins.last_rex2_prefix >= 0 && (ins.rex2 & (7 | REX2_SPECIAL))) ins.all_prefixes[ins.last_rex2_prefix] = 0; /* Check if the SEG prefix is used. */ @@ -13933,3 +13934,37 @@ PUSH2_POP2_Fixup (instr_info *ins, int bytemode, int sizeflag) return OP_VEX (ins, bytemode, sizeflag); } + +static bool +JMPABS_Fixup (instr_info *ins, int bytemode, int sizeflag) +{ + if (ins->address_mode == mode_64bit + && ins->last_rex2_prefix >= 0 + && (ins->rex2 & 0x80) == 0x0) + { + uint64_t op; + + if (bytemode == eAX_reg) + return true; + + if (!get64 (ins, &op)) + return false; + + if ((ins->prefixes & (PREFIX_OPCODE | PREFIX_ADDR | PREFIX_LOCK)) != 0x0 + || (ins->rex & REX_W) != 0x0) + { + oappend (ins, "(bad)"); + return true; + } + + ins->mnemonicendp = stpcpy (ins->obuf, "jmpabs"); + ins->rex2 |= REX2_SPECIAL; + oappend_immediate (ins, op); + + return true; + } + + if (bytemode == eAX_reg) + return OP_IMREG (ins, bytemode, sizeflag); + return OP_OFF64 (ins, bytemode, sizeflag); +}