From patchwork Tue Sep 19 15:25:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Frager, Neal via Binutils" X-Patchwork-Id: 141967 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:172:b0:3f2:4152:657d with SMTP id h50csp3476210vqi; Tue, 19 Sep 2023 08:30:52 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEuSFVt4eVhPKfEhfUX6Ro2BbadkWtNAblWyh4iRzQz68vrrq6YjYfMQvW0YtLPBzmd4O+d X-Received: by 2002:a05:651c:2003:b0:2bf:f582:3e0d with SMTP id s3-20020a05651c200300b002bff5823e0dmr6601583ljo.23.1695137452642; Tue, 19 Sep 2023 08:30:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695137452; cv=none; d=google.com; s=arc-20160816; b=jFrSwmp6HVcpaXbJkk1+9KuKE1S8/U1emqGtjI31jmewpg29OyvbAq2lYDM+ekukVf swWgb+kGYYAQZ/GVjrVKx9NzqKo0oV0kicvQ6S0CVr6drrn2G0vJhEOpafjcM5QLrqUZ xQw2HIB2cfx5upLvpaQ+noajHL6lqyHHnLFolBr0tHJr0KRqwKiXBBZGA/viMKyTJ0/Z C3pjS+xbvulbiY6vX1yyKztsREfOvkvOgAqD+BQgkVaZBNATi1c7/58sQenYBN1liobP /Hn+xdnRcalM4r4MIsIhmuTZAbnVjh3PLPgYziXrQxNVorS09FluMUKr+YKbZqcL2l9y 8Svg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:reply-to:from:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:dmarc-filter:delivered-to :dkim-signature:dkim-filter; bh=vTD6Iq8S+tiN9aYAHpQjhNGmb2lo9f0nzEbdxbgqFFY=; fh=GQoAZXtUv/3gIFh4blMtohOG0mVpG9fHDwgXs3JAktI=; b=RU8Um0TUeewJC8SE3Uz4xx5PQZ3/vyDNqhzz/D3ml/C/XPhqyW+MjWIsvDQzExDPN+ fhyKEYzmAp+nOp/1OqciSM71wdKcR/9BSpxz42HaSuTRKosxCmB+iwPakIYBlTNFAxOq VQBK1Yv0xJNOBHKdEcqja5mY6TXCwGca4xPy563Pdmrb7lQOZ3ureHINGY6DRXlj0JJy ldVmVjj+mk62HR9SaOpO0Jm1L63N31w06P039LffikdPtsnCs6CBfw9U4ljsv74Bfoel eYH7fwiH031jkTuNdvvRXW09mL4FNARsbkNJBHBC+xn+CnZAc6AGpa+hgYzmv2QxtVw2 vTPw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=YM6EVCSK; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id l22-20020a1709065a9600b0099cf40fcd23si9772078ejq.276.2023.09.19.08.30.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Sep 2023 08:30:52 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=YM6EVCSK; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C51B2384227F for ; Tue, 19 Sep 2023 15:28:31 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C51B2384227F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1695137311; bh=vTD6Iq8S+tiN9aYAHpQjhNGmb2lo9f0nzEbdxbgqFFY=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=YM6EVCSKZvZ08NkdID9GgX0YFzPDJU8sRtQeq7kABrCmtTsKN1POsi0tO6JO8S0lt vMZMnzKF9VEikzXLo4cJo3qQSdjtzkG6i3jUyYZYeETAHuS3k/vtEIhANSW8bb81SF meEhC8ILQzreKf6hD3kbu05eZIJB7xseKQFEP/HI= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.93]) by sourceware.org (Postfix) with ESMTPS id A7E643857B9B for ; Tue, 19 Sep 2023 15:25:46 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org A7E643857B9B X-IronPort-AV: E=McAfee;i="6600,9927,10838"; a="377286256" X-IronPort-AV: E=Sophos;i="6.02,159,1688454000"; d="scan'208";a="377286256" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Sep 2023 08:25:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10838"; a="695950288" X-IronPort-AV: E=Sophos;i="6.02,159,1688454000"; d="scan'208";a="695950288" Received: from scymds03.sc.intel.com ([10.148.94.166]) by orsmga003.jf.intel.com with ESMTP; 19 Sep 2023 08:25:42 -0700 Received: from shgcc101.sh.intel.com (shgcc101.sh.intel.com [10.239.85.97]) by scymds03.sc.intel.com (Postfix) with ESMTP id ED3D46A; Tue, 19 Sep 2023 08:25:40 -0700 (PDT) To: binutils@sourceware.org Cc: jbeulich@suse.com, hongjiu.lu@intel.com, "Hu, Lin1" Subject: [PATCH 8/8] Support APX JMPABS Date: Tue, 19 Sep 2023 15:25:27 +0000 Message-Id: <20230919152527.497773-9-lili.cui@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230919152527.497773-1-lili.cui@intel.com> References: <20230919152527.497773-1-lili.cui@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "Cui, Lili via Binutils" From: "Frager, Neal via Binutils" Reply-To: "Cui, Lili" Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1777480449474762097 X-GMAIL-MSGID: 1777480449474762097 From: "Hu, Lin1" gas/ChangeLog: * config/tc-i386.c (is_any_apx_encoding): Add jmpabs. (is_any_apx_rex2_encoding): Ditto. * testsuite/gas/i386/i386.exp: Add tests. * testsuite/gas/i386/x86-64.exp: Ditto. * testsuite/gas/i386/apx-jmpabs-inval.l: New test. * testsuite/gas/i386/apx-jmpabs-inval.s: Ditto. * testsuite/gas/i386/x86-64-apx-jmpabs-intel.d: Ditto. * testsuite/gas/i386/x86-64-apx-jmpabs-inval.d: Ditto. * testsuite/gas/i386/x86-64-apx-jmpabs-inval.s: Ditto. * testsuite/gas/i386/x86-64-apx-mov-inval.l: Ditto. * testsuite/gas/i386/x86-64-apx-mov-inval.s: Ditto. * testsuite/gas/i386/x86-64-apx-jmpabs.d: Ditto. * testsuite/gas/i386/x86-64-apx-jmpabs.s: Ditto. opcodes/ChangeLog: * i386-dis.c (JMPABS_Fixup): New Fixup function to disassemble jmpabs. (print_insn): Add #UD exception for jmpabs. (dis386): Modify a1 unit for support jmpabs. * i386-mnem.h: Regenerated. * i386-opc.tbl: New insns. * i386-tbl.h: Regenerated. --- gas/config/tc-i386.c | 6 +- gas/testsuite/gas/i386/apx-jmpabs-inval.l | 3 + gas/testsuite/gas/i386/apx-jmpabs-inval.s | 6 ++ gas/testsuite/gas/i386/apx-mov-inval.l | 2 + gas/testsuite/gas/i386/i386.exp | 1 + .../gas/i386/x86-64-apx-jmpabs-intel.d | 14 +++++ .../gas/i386/x86-64-apx-jmpabs-inval.d | 55 +++++++++++++++++++ .../gas/i386/x86-64-apx-jmpabs-inval.s | 18 ++++++ gas/testsuite/gas/i386/x86-64-apx-jmpabs.d | 14 +++++ gas/testsuite/gas/i386/x86-64-apx-jmpabs.s | 10 ++++ gas/testsuite/gas/i386/x86-64-apx-mov-inval.l | 2 + gas/testsuite/gas/i386/x86-64-apx-mov-inval.s | 5 ++ gas/testsuite/gas/i386/x86-64.exp | 4 ++ opcodes/i386-dis.c | 42 +++++++++++++- opcodes/i386-opc.tbl | 4 +- 15 files changed, 182 insertions(+), 4 deletions(-) create mode 100644 gas/testsuite/gas/i386/apx-jmpabs-inval.l create mode 100644 gas/testsuite/gas/i386/apx-jmpabs-inval.s create mode 100644 gas/testsuite/gas/i386/apx-mov-inval.l create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs.d create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs.s create mode 100644 gas/testsuite/gas/i386/x86-64-apx-mov-inval.l create mode 100644 gas/testsuite/gas/i386/x86-64-apx-mov-inval.s diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 1fe4980f26a..36720d40eb0 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -3880,6 +3880,7 @@ is_any_apx_encoding (void) || i.tm.opcode_space == SPACE_EVEXMAP4 || i.has_nf || i.has_zero_upper + || i.tm.mnem_off == MN_jmpabs || (i.vex.register_specifier && i.vex.register_specifier->reg_flags & RegRex2); } @@ -3887,7 +3888,8 @@ is_any_apx_encoding (void) static INLINE bool is_any_apx_rex2_encoding (void) { - return (i.rex2 && i.vex.length == 2) || i.rex2_encoding; + return (i.rex2 && i.vex.length == 2) || i.rex2_encoding + || i.tm.mnem_off == MN_jmpabs; } static INLINE bool @@ -7703,7 +7705,7 @@ match_template (char mnem_suffix) if (!quiet_warnings) { if (!intel_syntax - && (i.jumpabsolute != (t->opcode_modifier.jump == JUMP_ABSOLUTE))) + && (i.jumpabsolute != (t->opcode_modifier.jump == JUMP_ABSOLUTE) && t->mnem_off != MN_jmpabs)) as_warn (_("indirect %s without `*'"), insn_name (t)); if (t->opcode_modifier.isprefix diff --git a/gas/testsuite/gas/i386/apx-jmpabs-inval.l b/gas/testsuite/gas/i386/apx-jmpabs-inval.l new file mode 100644 index 00000000000..87e7a800f1a --- /dev/null +++ b/gas/testsuite/gas/i386/apx-jmpabs-inval.l @@ -0,0 +1,3 @@ +.* Assembler messages: +.*:5: Error: `jmpabs' is only supported in 64-bit mode +.*:6: Error: `jmpabs' is only supported in 64-bit mode diff --git a/gas/testsuite/gas/i386/apx-jmpabs-inval.s b/gas/testsuite/gas/i386/apx-jmpabs-inval.s new file mode 100644 index 00000000000..1f9f1f80b72 --- /dev/null +++ b/gas/testsuite/gas/i386/apx-jmpabs-inval.s @@ -0,0 +1,6 @@ +# Check 32bit illegal APX_F JMPABS instructions + + .text + _start: + jmpabs $0x0202020202020202 + jmpabs $0x2 diff --git a/gas/testsuite/gas/i386/apx-mov-inval.l b/gas/testsuite/gas/i386/apx-mov-inval.l new file mode 100644 index 00000000000..b1aa91ae3c9 --- /dev/null +++ b/gas/testsuite/gas/i386/apx-mov-inval.l @@ -0,0 +1,2 @@ +.* Assembler messages: +.*:5: Error: unsupport rex2 pseudo prefix for `mov' diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 7e0ad339141..d842505a928 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -508,6 +508,7 @@ if [gas_32_check] then { run_dump_test "sm4-intel" run_list_test "pbndkb-inval" run_list_test "apx-push2pop2-inval" + run_list_test "apx-jmpabs-inval" run_list_test "sg" run_dump_test "clzero" run_dump_test "invlpgb" diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d new file mode 100644 index 00000000000..d8407bdd92b --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d @@ -0,0 +1,14 @@ +#as: +#objdump: -dw -Mintel +#name: x86_64 APX_F JMPABS insns (Intel disassembly) +#source: x86-64-apx-jmpabs.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*d5 00 a1 02 02 02 02 02 02 02 02\s+jmpabs 0x202020202020202 +\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00\s+jmpabs 0x2 +\s*[a-f0-9]+:\s*d5 00 a1 02 02 02 02 02 02 02 02\s+jmpabs 0x202020202020202 +\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00\s+jmpabs 0x2 diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d new file mode 100644 index 00000000000..5c887acfebc --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d @@ -0,0 +1,55 @@ +#as: --64 +#objdump: -dw +#name: illegal decoding of APX_F jmpabs insns +#source: x86-64-apx-jmpabs-inval.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <.text>: +\s*[a-f0-9]+: 66 64 d5 00 a1\s+\(bad\) +\s*[a-f0-9]+: 01 00\s+add %eax,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 66 d5 00 a1\s+\(bad\) +\s*[a-f0-9]+: 01 00\s+add %eax,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 67 64 d5 00 a1\s+\(bad\) +\s*[a-f0-9]+: 01 00\s+add %eax,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 67 d5 00 a1\s+\(bad\) +\s*[a-f0-9]+: 01 00\s+add %eax,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: f2 64 d5 00 a1\s+\(bad\) +\s*[a-f0-9]+: 01 00\s+add %eax,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: f2 d5 00 a1\s+\(bad\) +\s*[a-f0-9]+: 01 00\s+add %eax,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: f3 64 d5 00 a1\s+\(bad\) +\s*[a-f0-9]+: 01 00\s+add %eax,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: f3 d5 00 a1\s+\(bad\) +\s*[a-f0-9]+: 01 00\s+add %eax,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: d5 08 a1\s+\(bad\) +\s*[a-f0-9]+: 01 00\s+add %eax,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*[a-f0-9]+: 00 00\s+add %al,\(%rax\) +\s*... diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s new file mode 100644 index 00000000000..3642d430546 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s @@ -0,0 +1,18 @@ +# Check bytecode of APX_F jmpabs instructions with illegal encode. + + .allow_index_reg + .text +# With 66 prefix + .byte 0x66,0x64,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x66,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 +# With 67 prefix + .byte 0x67,0x64,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0x67,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 +# With F2 prefix + .byte 0xf2,0x64,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0xf2,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 +# With F3 prefix + .byte 0xf3,0x64,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + .byte 0xf3,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 +# REX2.M0 = 0 REX2.W = 1 + .byte 0xd5,0x08,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00 diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs.d b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.d new file mode 100644 index 00000000000..409943dd9b9 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.d @@ -0,0 +1,14 @@ +#as: +#objdump: -dw +#name: x86_64 APX_F JMPABS insns +#source: x86-64-apx-jmpabs.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*d5 00 a1 02 02 02 02 02 02 02 02\s+jmpabs \$0x202020202020202 +\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00\s+jmpabs \$0x2 +\s*[a-f0-9]+:\s*d5 00 a1 02 02 02 02 02 02 02 02\s+jmpabs \$0x202020202020202 +\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00\s+jmpabs \$0x2 diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s new file mode 100644 index 00000000000..beb722421bd --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s @@ -0,0 +1,10 @@ +# Check 64bit APX_F JMPABS instructions + + .text + _start: + jmpabs $0x0202020202020202 + jmpabs $0x2 + +.intel_syntax noprefix + jmpabs 0x0202020202020202 + jmpabs 0x2 diff --git a/gas/testsuite/gas/i386/x86-64-apx-mov-inval.l b/gas/testsuite/gas/i386/x86-64-apx-mov-inval.l new file mode 100644 index 00000000000..b1aa91ae3c9 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-mov-inval.l @@ -0,0 +1,2 @@ +.* Assembler messages: +.*:5: Error: unsupport rex2 pseudo prefix for `mov' diff --git a/gas/testsuite/gas/i386/x86-64-apx-mov-inval.s b/gas/testsuite/gas/i386/x86-64-apx-mov-inval.s new file mode 100644 index 00000000000..f0896da6b4d --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-apx-mov-inval.s @@ -0,0 +1,5 @@ +# Check 64bit illegal APX_F mov instructions with rex2 prefix + + .text + _start: + {rex2} mov %fs:0x0202020202020202, %rax diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp index 9aaa905393b..cf64b1f0000 100644 --- a/gas/testsuite/gas/i386/x86-64.exp +++ b/gas/testsuite/gas/i386/x86-64.exp @@ -374,6 +374,10 @@ run_dump_test "x86-64-apx-evex-egpr" run_dump_test "x86-64-apx-ndd" run_dump_test "x86-64-apx-nf" run_dump_test "x86-64-apx-nf-intel" +run_dump_test "x86-64-apx-jmpabs" +run_dump_test "x86-64-apx-jmpabs-intel" +run_dump_test "x86-64-apx-jmpabs-inval" +run_list_test "x86-64-apx-mov-inval" run_dump_test "x86-64-avx512f-rcigrz-intel" run_dump_test "x86-64-avx512f-rcigrz" run_dump_test "x86-64-clwb" diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index b3ede02df06..e2e903afde4 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -105,6 +105,7 @@ static bool FXSAVE_Fixup (instr_info *, int, int); static bool MOVSXD_Fixup (instr_info *, int, int); static bool DistinctDest_Fixup (instr_info *, int, int); static bool PREFETCHI_Fixup (instr_info *, int, int); +static bool JMPABS_Fixup (instr_info *, int, int); static void ATTRIBUTE_PRINTF_3 i386_dis_printf (const disassemble_info *, enum disassembler_style, @@ -260,6 +261,9 @@ struct instr_info char scale_char; enum x86_64_isa isa64; + + /* Remember if the current op is jmpabs instructions. */ + bool jmpabs; }; struct dis_private { @@ -2057,7 +2061,7 @@ static const struct dis386 dis386[] = { { "lahf", { XX }, 0 }, /* a0 */ { "mov%LB", { AL, Ob }, 0 }, - { "mov%LS", { eAX, Ov }, 0 }, + { "mov%LS", { { JMPABS_Fixup, eAX_reg }, { JMPABS_Fixup, v_mode } }, 0 }, { "mov%LB", { Ob, AL }, 0 }, { "mov%LS", { Ov, eAX }, 0 }, { "movs{b|}", { Ybr, Xb }, 0 }, @@ -9690,6 +9694,15 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax) goto out; } + if (ins.jmpabs + && ((ins.prefixes & (PREFIX_OPCODE | PREFIX_ADDR)) != 0x0 + || (ins.rex2_payload & 0x8) != 0x0)) + { + i386_dis_printf (info, dis_style_text, "(bad)"); + ret = ins.end_codep - priv.the_buffer; + goto out; + } + switch (dp->prefix_requirement) { case PREFIX_DATA: @@ -13877,3 +13890,30 @@ PREFETCHI_Fixup (instr_info *ins, int bytemode, int sizeflag) return OP_M (ins, bytemode, sizeflag); } + +static bool +JMPABS_Fixup (instr_info *ins, int bytemode, int sizeflag) +{ + if (ins->address_mode == mode_64bit + && ins->last_rex2_prefix >= 0 + && (ins->rex2_payload & 0x80) == 0x0) + { + uint64_t op; + + if (bytemode == eAX_reg) + return true; + + if (!get64 (ins, &op)) + return false; + + ins->mnemonicendp = stpcpy (ins->obuf, "jmpabs"); + ins->all_prefixes[ins->last_rex2_prefix] = 0; + ins->jmpabs = true; + oappend_immediate (ins, op); + return true; + } + + if (bytemode == eAX_reg) + return OP_IMREG (ins, bytemode, sizeflag); + return OP_OFF64 (ins, v_mode, sizeflag); +} diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 4e8ef15c28b..4d1b6742060 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -161,7 +161,7 @@ // Move instructions. mov, 0xa0, No64, D|W|CheckOperandSize|No_sSuf|No_qSuf, { Disp16|Disp32|Unspecified|Byte|Word|Dword, Acc|Byte|Word|Dword } -mov, 0xa0, x64, D|W|CheckOperandSize|No_sSuf, { Disp64|Unspecified|Byte|Word|Dword|Qword, Acc|Byte|Word|Dword|Qword } +mov, 0xa0, x64, D|W|CheckOperandSize|No_sSuf|No_egpr, { Disp64|Unspecified|Byte|Word|Dword|Qword, Acc|Byte|Word|Dword|Qword } movabs, 0xa0, x64, D|W|CheckOperandSize|No_sSuf, { Disp64|Unspecified|Byte|Word|Dword|Qword, Acc|Byte|Word|Dword|Qword } mov, 0x88, 0, D|W|CheckOperandSize|Modrm|No_sSuf|HLEPrefixRelease, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex } // In the 64bit mode the short form mov immediate is redefined to have @@ -623,6 +623,8 @@ ljmp, 0xea, No64, JumpInterSegment|No_bSuf|No_sSuf|No_qSuf, { Imm16, Imm16|Imm32 ljmp, 0xff/5, 0, Amd64|Modrm|JumpAbsolute|No_bSuf|No_sSuf|No_qSuf, { Unspecified|BaseIndex } ljmp, 0xff/5, x64, Intel64|Modrm|JumpAbsolute|No_bSuf|No_sSuf, { Unspecified|BaseIndex } +jmpabs, 0xa1, APX_F|x64, JumpAbsolute|NoSuf, { Imm64 } + ret, 0xc3, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf|RepPrefixOk|BNDPrefixOk, {} ret, 0xc2, No64, DefaultSize|No_bSuf|No_sSuf|No_qSuf|RepPrefixOk|BNDPrefixOk, { Imm16 } ret, 0xc3, x64, Amd64|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64|RepPrefixOk|BNDPrefixOk, {}