diff --git a/gas/ChangeLog b/gas/ChangeLog
index ef87eea33b6..94e4e741c6b 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,20 @@
+2023-07-26  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* testsuite/gas/bpf/alu.s: The register neg instruction gets only
+	one argument.
+	* testsuite/gas/bpf/alu32-be-pseudoc.d: Likewise.
+	* testsuite/gas/bpf/alu32-pseudoc.d: Likewise.
+	* testsuite/gas/bpf/alu32-pseudoc.s: Likewise.
+	* testsuite/gas/bpf/alu-pseudoc.d: Likewise.
+	* testsuite/gas/bpf/alu-be-pseudoc.d: Likewise.
+	* testsuite/gas/bpf/alu-pseudoc.s: Likewise.
+	* testsuite/gas/bpf/alu-be.d: Likewise.
+	* testsuite/gas/bpf/alu.d: Likewise.
+	* testsuite/gas/bpf/alu32-be.d: Likewise.
+	* testsuite/gas/bpf/alu32.d: Likewise.
+	* testsuite/gas/bpf/alu32.s: Likewise.
+	* doc/c-bpf.texi (BPF Instructions): Update accordingly.
+
 2023-07-24  Jose E. Marchesi  <jose.marchesi@oracle.com>
 
 	* doc/c-bpf.texi (BPF Instructions): Document BSWAP* instructions.
diff --git a/gas/doc/c-bpf.texi b/gas/doc/c-bpf.texi
index 8f39ab314a7..6683ff98105 100644
--- a/gas/doc/c-bpf.texi
+++ b/gas/doc/c-bpf.texi
@@ -244,9 +244,9 @@ registers.
 @itemx rd s>>= imm32
 64-bit right arithmetic shift, by @code{rs} or @code{imm32} bits.
 
-@item neg rd, rs
+@item neg rd
 @itemx neg rd, imm32
-@itemx rd = - rs
+@itemx rd = - rd
 @itemx rd = - imm32
 64-bit arithmetic negation.
 
@@ -351,9 +351,9 @@ in the same instruction.
 @itemx rd s>>= imm32
 32-bit right arithmetic shift, by @code{rs} or @code{imm32} bits.
 
-@item neg32 rd, rs
+@item neg32 rd
 @itemx neg32 rd, imm32
-@itemx rd = - rs
+@itemx rd = - rd
 @itemx rd = - imm32
 32-bit arithmetic negation.
 
diff --git a/gas/testsuite/gas/bpf/alu-be-pseudoc.d b/gas/testsuite/gas/bpf/alu-be-pseudoc.d
index 1d83eaccd1e..b35f05d9242 100644
--- a/gas/testsuite/gas/bpf/alu-be-pseudoc.d
+++ b/gas/testsuite/gas/bpf/alu-be-pseudoc.d
@@ -56,7 +56,7 @@ Disassembly of section .text:
  168:	c7 30 00 00 ff ff fd 66 	r3 s>>=0xfffffd66
  170:	c7 40 00 00 7e ad be ef 	r4 s>>=0x7eadbeef
  178:	cf 56 00 00 00 00 00 00 	r5 s>>=r6
- 180:	8f 23 00 00 00 00 00 00 	r2=-r3
+ 180:	8f 20 00 00 00 00 00 00 	r2=-r2
  188:	d4 90 00 00 00 00 00 10 	r9=le16 r9
  190:	d4 80 00 00 00 00 00 20 	r8=le32 r8
  198:	d4 70 00 00 00 00 00 40 	r7=le64 r7
diff --git a/gas/testsuite/gas/bpf/alu-be.d b/gas/testsuite/gas/bpf/alu-be.d
index 2911d8b0445..fd8bc9ceba1 100644
--- a/gas/testsuite/gas/bpf/alu-be.d
+++ b/gas/testsuite/gas/bpf/alu-be.d
@@ -56,7 +56,7 @@ Disassembly of section .text:
  168:	c7 30 00 00 ff ff fd 66 	arsh %r3,0xfffffd66
  170:	c7 40 00 00 7e ad be ef 	arsh %r4,0x7eadbeef
  178:	cf 56 00 00 00 00 00 00 	arsh %r5,%r6
- 180:	8f 23 00 00 00 00 00 00 	neg %r2,%r3
+ 180:	8f 20 00 00 00 00 00 00 	neg %r2
  188:	d4 90 00 00 00 00 00 10 	endle %r9,16
  190:	d4 80 00 00 00 00 00 20 	endle %r8,32
  198:	d4 70 00 00 00 00 00 40 	endle %r7,64
diff --git a/gas/testsuite/gas/bpf/alu-pseudoc.d b/gas/testsuite/gas/bpf/alu-pseudoc.d
index bfc2493fdd4..ce0a56d1f21 100644
--- a/gas/testsuite/gas/bpf/alu-pseudoc.d
+++ b/gas/testsuite/gas/bpf/alu-pseudoc.d
@@ -56,7 +56,7 @@ Disassembly of section .text:
  168:	c7 03 00 00 66 fd ff ff 	r3 s>>=0xfffffd66
  170:	c7 04 00 00 ef be ad 7e 	r4 s>>=0x7eadbeef
  178:	cf 65 00 00 00 00 00 00 	r5 s>>=r6
- 180:	8f 32 00 00 00 00 00 00 	r2=-r3
+ 180:	8f 02 00 00 00 00 00 00 	r2=-r2
  188:	d4 09 00 00 10 00 00 00 	r9=le16 r9
  190:	d4 08 00 00 20 00 00 00 	r8=le32 r8
  198:	d4 07 00 00 40 00 00 00 	r7=le64 r7
diff --git a/gas/testsuite/gas/bpf/alu-pseudoc.s b/gas/testsuite/gas/bpf/alu-pseudoc.s
index 172a93cb0ec..323a6522f22 100644
--- a/gas/testsuite/gas/bpf/alu-pseudoc.s
+++ b/gas/testsuite/gas/bpf/alu-pseudoc.s
@@ -48,7 +48,7 @@
 	r3 s>>= -666
 	r4 s>>= 2125315823
 	r5 s>>= r6
-	r2 = - r3
+	r2 = - r2
 	r9 = le16 r9
 	r8 = le32 r8
 	r7 = le64 r7
diff --git a/gas/testsuite/gas/bpf/alu.d b/gas/testsuite/gas/bpf/alu.d
index 65f32803536..15e817b8fc5 100644
--- a/gas/testsuite/gas/bpf/alu.d
+++ b/gas/testsuite/gas/bpf/alu.d
@@ -56,7 +56,7 @@ Disassembly of section .text:
  168:	c7 03 00 00 66 fd ff ff 	arsh %r3,0xfffffd66
  170:	c7 04 00 00 ef be ad 7e 	arsh %r4,0x7eadbeef
  178:	cf 65 00 00 00 00 00 00 	arsh %r5,%r6
- 180:	8f 32 00 00 00 00 00 00 	neg %r2,%r3
+ 180:	8f 02 00 00 00 00 00 00 	neg %r2
  188:	d4 09 00 00 10 00 00 00 	endle %r9,16
  190:	d4 08 00 00 20 00 00 00 	endle %r8,32
  198:	d4 07 00 00 40 00 00 00 	endle %r7,64
diff --git a/gas/testsuite/gas/bpf/alu.s b/gas/testsuite/gas/bpf/alu.s
index 3e8a3cf4001..2d8d22da0e1 100644
--- a/gas/testsuite/gas/bpf/alu.s
+++ b/gas/testsuite/gas/bpf/alu.s
@@ -48,7 +48,7 @@
         arsh	%r3, -666
         arsh	%r4, 0x7eadbeef
         arsh	%r5, %r6
-        neg     %r2, %r3
+        neg     %r2
 	endle	%r9,16
         endle	%r8,32
         endle	%r7,64
diff --git a/gas/testsuite/gas/bpf/alu32-be-pseudoc.d b/gas/testsuite/gas/bpf/alu32-be-pseudoc.d
index f46235ca903..71c6d3aec87 100644
--- a/gas/testsuite/gas/bpf/alu32-be-pseudoc.d
+++ b/gas/testsuite/gas/bpf/alu32-be-pseudoc.d
@@ -56,7 +56,7 @@ Disassembly of section .text:
  168:	c4 30 00 00 ff ff fd 66 	w3 s>>=0xfffffd66
  170:	c4 40 00 00 7e ad be ef 	w4 s>>=0x7eadbeef
  178:	cc 56 00 00 00 00 00 00 	w5 s>>=w6
- 180:	8c 23 00 00 00 00 00 00 	w2=-w3
+ 180:	8c 20 00 00 00 00 00 00 	w2=-w2
  188:	bc 12 00 08 00 00 00 00 	w1 = \(s8\) w2
  190:	bc 12 00 10 00 00 00 00 	w1 = \(s16\) w2
  198:	bc 12 00 20 00 00 00 00 	w1 = \(s32\) w2
diff --git a/gas/testsuite/gas/bpf/alu32-be.d b/gas/testsuite/gas/bpf/alu32-be.d
index 0549bf23131..140a7f13764 100644
--- a/gas/testsuite/gas/bpf/alu32-be.d
+++ b/gas/testsuite/gas/bpf/alu32-be.d
@@ -56,7 +56,7 @@ Disassembly of section .text:
  168:	c4 30 00 00 ff ff fd 66 	arsh32 %r3,0xfffffd66
  170:	c4 40 00 00 7e ad be ef 	arsh32 %r4,0x7eadbeef
  178:	cc 56 00 00 00 00 00 00 	arsh32 %r5,%r6
- 180:	8c 23 00 00 00 00 00 00 	neg32 %r2,%r3
+ 180:	8c 20 00 00 00 00 00 00 	neg32 %r2
  188:	bc 12 00 08 00 00 00 00 	movs32 %r1,%r2,8
  190:	bc 12 00 10 00 00 00 00 	movs32 %r1,%r2,16
  198:	bc 12 00 20 00 00 00 00 	movs32 %r1,%r2,32
diff --git a/gas/testsuite/gas/bpf/alu32-pseudoc.d b/gas/testsuite/gas/bpf/alu32-pseudoc.d
index 851658a1abe..16e38ac212c 100644
--- a/gas/testsuite/gas/bpf/alu32-pseudoc.d
+++ b/gas/testsuite/gas/bpf/alu32-pseudoc.d
@@ -56,7 +56,7 @@ Disassembly of section .text:
  168:	c4 03 00 00 66 fd ff ff 	w3 s>>=0xfffffd66
  170:	c4 04 00 00 ef be ad 7e 	w4 s>>=0x7eadbeef
  178:	cc 65 00 00 00 00 00 00 	w5 s>>=w6
- 180:	8c 32 00 00 00 00 00 00 	w2=-w3
+ 180:	8c 02 00 00 00 00 00 00 	w2=-w2
  188:	bc 21 08 00 00 00 00 00 	w1 = \(s8\) w2
  190:	bc 21 10 00 00 00 00 00 	w1 = \(s16\) w2
  198:	bc 21 20 00 00 00 00 00 	w1 = \(s32\) w2
diff --git a/gas/testsuite/gas/bpf/alu32-pseudoc.s b/gas/testsuite/gas/bpf/alu32-pseudoc.s
index 0922d4cdc58..46c4e15a4b7 100644
--- a/gas/testsuite/gas/bpf/alu32-pseudoc.s
+++ b/gas/testsuite/gas/bpf/alu32-pseudoc.s
@@ -48,7 +48,7 @@
 	w3 s>>= -666
 	w4 s>>= 2125315823
 	w5 s>>= w6
-	w2 = - w3
+	w2 = - w2
         w1 = (s8) w2
         w1 = (s16) w2
         w1 = (s32) w2
diff --git a/gas/testsuite/gas/bpf/alu32.d b/gas/testsuite/gas/bpf/alu32.d
index 68aa86fce09..3bdaf1252e6 100644
--- a/gas/testsuite/gas/bpf/alu32.d
+++ b/gas/testsuite/gas/bpf/alu32.d
@@ -56,7 +56,7 @@ Disassembly of section .text:
  168:	c4 03 00 00 66 fd ff ff 	arsh32 %r3,0xfffffd66
  170:	c4 04 00 00 ef be ad 7e 	arsh32 %r4,0x7eadbeef
  178:	cc 65 00 00 00 00 00 00 	arsh32 %r5,%r6
- 180:	8c 32 00 00 00 00 00 00 	neg32 %r2,%r3
+ 180:	8c 02 00 00 00 00 00 00 	neg32 %r2
  188:	bc 21 08 00 00 00 00 00 	movs32 %r1,%r2,8
  190:	bc 21 10 00 00 00 00 00 	movs32 %r1,%r2,16
  198:	bc 21 20 00 00 00 00 00 	movs32 %r1,%r2,32
diff --git a/gas/testsuite/gas/bpf/alu32.s b/gas/testsuite/gas/bpf/alu32.s
index 14f0a12de2c..291f9ced6a7 100644
--- a/gas/testsuite/gas/bpf/alu32.s
+++ b/gas/testsuite/gas/bpf/alu32.s
@@ -48,7 +48,7 @@
         arsh32	%r3, -666
         arsh32	%r4, 0x7eadbeef
         arsh32	%r5, %r6
-        neg32	%r2, %r3
+        neg32	%r2
         movs32  %r1,%r2,8
         movs32  %r1,%r2,16
         movs32  %r1,%r2,32
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 973b17edc2b..f611ec5bb0f 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2023-07-26  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* bpf-opc.c (bpf_opcodes): Fix BPF_INSN_NEGR to not use a src
+	register.
+
 2023-07-24  Jose E. Marchesi  <jose.marchesi@oracle.com>
 
 	* bpf-opc.c (bpf_opcodes): Add entries for the BSWAP*
diff --git a/opcodes/bpf-opc.c b/opcodes/bpf-opc.c
index 26db795903c..3f42680c661 100644
--- a/opcodes/bpf-opc.c
+++ b/opcodes/bpf-opc.c
@@ -73,7 +73,7 @@ const struct bpf_opcode bpf_opcodes[] =
    BPF_V1, BPF_CODE, BPF_CLASS_ALU64|BPF_CODE_XOR|BPF_SRC_X},
   {BPF_INSN_XORI, "xor%W%dr , %i32", "%dr ^= %i32",
    BPF_V1, BPF_CODE, BPF_CLASS_ALU64|BPF_CODE_XOR|BPF_SRC_K},
-  {BPF_INSN_NEGR, "neg%W%dr, %sr", "%dr = - %sr",
+  {BPF_INSN_NEGR, "neg%W%dr", "%dr = - %dr",
    BPF_V1, BPF_CODE, BPF_CLASS_ALU64|BPF_CODE_NEG|BPF_SRC_X},
   {BPF_INSN_NEGI, "neg%W%dr , %i32", "%dr = -%W%i32",
    BPF_V1, BPF_CODE, BPF_CLASS_ALU64|BPF_CODE_NEG|BPF_SRC_K},
@@ -141,7 +141,7 @@ const struct bpf_opcode bpf_opcodes[] =
    BPF_V1, BPF_CODE, BPF_CLASS_ALU|BPF_CODE_XOR|BPF_SRC_X},
   {BPF_INSN_XOR32I, "xor32%W%dr , %i32", "%dw ^= %i32",
    BPF_V1, BPF_CODE, BPF_CLASS_ALU|BPF_CODE_XOR|BPF_SRC_K},
-  {BPF_INSN_NEG32R, "neg32%W%dr , %sr", "%dw = - %sw",
+  {BPF_INSN_NEG32R, "neg32%W%dr", "%dw = - %dw",
    BPF_V1, BPF_CODE, BPF_CLASS_ALU|BPF_CODE_NEG|BPF_SRC_X},
   {BPF_INSN_NEG32I, "neg32%W%dr , %i32", "%dw = -%W%i32",
    BPF_V1, BPF_CODE, BPF_CLASS_ALU|BPF_CODE_NEG|BPF_SRC_K},
