[3/5] Support Intel SM3

diff --git a/gas/NEWS b/gas/NEWS
index fe2c055fa7f..42bda657f21 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,7 @@ 
 -*- text -*-
 
+* Add support for Intel SM3 instructions.
+
 * Add support for Intel SHA512 instructions.
 
 * Add support for Intel AVX-VNNI-INT16 instructions.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 836640d9123..7424fa41c44 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1153,6 +1153,7 @@  static const arch_entry cpu_arch[] =
   SUBARCH (lkgs, LKGS, ANY_LKGS, false),
   SUBARCH (avx_vnni_int16, AVX_VNNI_INT16, ANY_AVX_VNNI_INT16, false),
   SUBARCH (sha512, SHA512, ANY_SHA512, false),
+  SUBARCH (sm3, SM3, ANY_SM3, false),
 };
 
 #undef SUBARCH
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 21fb71e54ab..6ef1da21370 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -209,6 +209,7 @@  accept various extension mnemonics.  For example,
 @code{lkgs},
 @code{avx_vnni_int16},
 @code{sha512},
+@code{sm3},
 @code{amx_int8},
 @code{amx_bf16},
 @code{amx_fp16},
@@ -1638,7 +1639,7 @@  supported on the CPU specified.  The choices for @var{cpu_type} are:
 @item @samp{.prefetchi} @tab @samp{.avx_ifma} @tab @samp{.avx_vnni_int8}
 @item @samp{.cmpccxadd} @tab @samp{.wrmsrns} @tab @samp{.msrlist}
 @item @samp{.avx_ne_convert} @tab @samp{.rao_int} @tab @samp{.fred} @tab @samp{.lkgs}
-@item @samp{.avx_vnni_int16} @tab @samp{.sha512}
+@item @samp{.avx_vnni_int16} @tab @samp{.sha512} @tab @samp{.sm3}
 @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
 @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
 @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk}
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 487811ad988..87ddd71be14 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -500,6 +500,8 @@  if [gas_32_check] then {
     run_dump_test "avx-vnni-int16-intel"
     run_dump_test "sha512"
     run_dump_test "sha512-intel"
+    run_dump_test "sm3"
+    run_dump_test "sm3-intel"
     run_list_test "sg"
     run_dump_test "clzero"
     run_dump_test "invlpgb"
diff --git a/gas/testsuite/gas/i386/sm3-intel.d b/gas/testsuite/gas/i386/sm3-intel.d
new file mode 100644
index 00000000000..4ab4ce2ddb4
--- /dev/null
+++ b/gas/testsuite/gas/i386/sm3-intel.d
@@ -0,0 +1,40 @@ 
+#as:
+#objdump: -dw -Mintel
+#name: i386 SM3 insns (Intel disassembly)
+#source: sm3.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*c4 e2 50 da f4\s+vsm3msg1 xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 e2 50 da b4 f4 00 00 00 10\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 50 da 31\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 50 da b1 f0 07 00 00\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 50 da b2 00 f8 ff ff\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[edx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 51 da f4\s+vsm3msg2 xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 e2 51 da b4 f4 00 00 00 10\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 51 da 31\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 51 da b1 f0 07 00 00\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 51 da b2 00 f8 ff ff\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[edx-0x800\]
+\s*[a-f0-9]+:\s*c4 e3 51 de f4 7b\s+vsm3rnds2 xmm6,xmm5,xmm4,0x7b
+\s*[a-f0-9]+:\s*c4 e3 51 de b4 f4 00 00 00 10 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*c4 e3 51 de 31 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[ecx\],0x7b
+\s*[a-f0-9]+:\s*c4 e3 51 de b1 f0 07 00 00 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\],0x7b
+\s*[a-f0-9]+:\s*c4 e3 51 de b2 00 f8 ff ff 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[edx-0x800\],0x7b
+\s*[a-f0-9]+:\s*c4 e2 50 da f4\s+vsm3msg1 xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 e2 50 da b4 f4 00 00 00 10\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 50 da 31\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 50 da b1 f0 07 00 00\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 50 da b2 00 f8 ff ff\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[edx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 51 da f4\s+vsm3msg2 xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 e2 51 da b4 f4 00 00 00 10\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 e2 51 da 31\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[ecx\]
+\s*[a-f0-9]+:\s*c4 e2 51 da b1 f0 07 00 00\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 51 da b2 00 f8 ff ff\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[edx-0x800\]
+\s*[a-f0-9]+:\s*c4 e3 51 de f4 7b\s+vsm3rnds2 xmm6,xmm5,xmm4,0x7b
+\s*[a-f0-9]+:\s*c4 e3 51 de b4 f4 00 00 00 10 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*c4 e3 51 de 31 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[ecx\],0x7b
+\s*[a-f0-9]+:\s*c4 e3 51 de b1 f0 07 00 00 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\],0x7b
+\s*[a-f0-9]+:\s*c4 e3 51 de b2 00 f8 ff ff 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[edx-0x800\],0x7b
diff --git a/gas/testsuite/gas/i386/sm3.d b/gas/testsuite/gas/i386/sm3.d
new file mode 100644
index 00000000000..7507a8b4c7f
--- /dev/null
+++ b/gas/testsuite/gas/i386/sm3.d
@@ -0,0 +1,40 @@ 
+#as:
+#objdump: -dw
+#name: i386 SM3 insns
+#source: sm3.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*c4 e2 50 da f4\s+vsm3msg1 %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 da b4 f4 00 00 00 10\s+vsm3msg1 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 da 31\s+vsm3msg1 \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 da b1 f0 07 00 00\s+vsm3msg1 0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 da b2 00 f8 ff ff\s+vsm3msg1 -0x800\(%edx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 da f4\s+vsm3msg2 %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 da b4 f4 00 00 00 10\s+vsm3msg2 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 da 31\s+vsm3msg2 \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 da b1 f0 07 00 00\s+vsm3msg2 0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 da b2 00 f8 ff ff\s+vsm3msg2 -0x800\(%edx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 51 de f4 7b\s+vsm3rnds2 \$0x7b,%xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 51 de b4 f4 00 00 00 10 7b\s+vsm3rnds2 \$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 51 de 31 7b\s+vsm3rnds2 \$0x7b,\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 51 de b1 f0 07 00 00 7b\s+vsm3rnds2 \$0x7b,0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 51 de b2 00 f8 ff ff 7b\s+vsm3rnds2 \$0x7b,-0x800\(%edx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 da f4\s+vsm3msg1 %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 da b4 f4 00 00 00 10\s+vsm3msg1 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 da 31\s+vsm3msg1 \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 da b1 f0 07 00 00\s+vsm3msg1 0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 da b2 00 f8 ff ff\s+vsm3msg1 -0x800\(%edx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 da f4\s+vsm3msg2 %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 da b4 f4 00 00 00 10\s+vsm3msg2 0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 da 31\s+vsm3msg2 \(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 da b1 f0 07 00 00\s+vsm3msg2 0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 da b2 00 f8 ff ff\s+vsm3msg2 -0x800\(%edx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 51 de f4 7b\s+vsm3rnds2 \$0x7b,%xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 51 de b4 f4 00 00 00 10 7b\s+vsm3rnds2 \$0x7b,0x10000000\(%esp,%esi,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 51 de 31 7b\s+vsm3rnds2 \$0x7b,\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 51 de b1 f0 07 00 00 7b\s+vsm3rnds2 \$0x7b,0x7f0\(%ecx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 51 de b2 00 f8 ff ff 7b\s+vsm3rnds2 \$0x7b,-0x800\(%edx\),%xmm5,%xmm6
diff --git a/gas/testsuite/gas/i386/sm3.s b/gas/testsuite/gas/i386/sm3.s
new file mode 100644
index 00000000000..d1bc967a6f3
--- /dev/null
+++ b/gas/testsuite/gas/i386/sm3.s
@@ -0,0 +1,37 @@ 
+# Check 32bit SM3 instructions
+
+	.allow_index_reg
+	.text
+_start:
+	vsm3msg1	%xmm4, %xmm5, %xmm6	 #SM3
+	vsm3msg1	0x10000000(%esp, %esi, 8), %xmm5, %xmm6	 #SM3
+	vsm3msg1	(%ecx), %xmm5, %xmm6	 #SM3
+	vsm3msg1	2032(%ecx), %xmm5, %xmm6	 #SM3 Disp32(f0070000)
+	vsm3msg1	-2048(%edx), %xmm5, %xmm6	 #SM3 Disp32(00f8ffff)
+	vsm3msg2	%xmm4, %xmm5, %xmm6	 #SM3
+	vsm3msg2	0x10000000(%esp, %esi, 8), %xmm5, %xmm6	 #SM3
+	vsm3msg2	(%ecx), %xmm5, %xmm6	 #SM3
+	vsm3msg2	2032(%ecx), %xmm5, %xmm6	 #SM3 Disp32(f0070000)
+	vsm3msg2	-2048(%edx), %xmm5, %xmm6	 #SM3 Disp32(00f8ffff)
+	vsm3rnds2	$123, %xmm4, %xmm5, %xmm6	 #SM3
+	vsm3rnds2	$123, 0x10000000(%esp, %esi, 8), %xmm5, %xmm6	 #SM3
+	vsm3rnds2	$123, (%ecx), %xmm5, %xmm6	 #SM3
+	vsm3rnds2	$123, 2032(%ecx), %xmm5, %xmm6	 #SM3 Disp32(f0070000)
+	vsm3rnds2	$123, -2048(%edx), %xmm5, %xmm6	 #SM3 Disp32(00f8ffff)
+
+.intel_syntax noprefix
+	vsm3msg1	xmm6, xmm5, xmm4	 #SM3
+	vsm3msg1	xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000]	 #SM3
+	vsm3msg1	xmm6, xmm5, XMMWORD PTR [ecx]	 #SM3
+	vsm3msg1	xmm6, xmm5, XMMWORD PTR [ecx+2032]	 #SM3 Disp32(f0070000)
+	vsm3msg1	xmm6, xmm5, XMMWORD PTR [edx-2048]	 #SM3 Disp32(00f8ffff)
+	vsm3msg2	xmm6, xmm5, xmm4	 #SM3
+	vsm3msg2	xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000]	 #SM3
+	vsm3msg2	xmm6, xmm5, XMMWORD PTR [ecx]	 #SM3
+	vsm3msg2	xmm6, xmm5, XMMWORD PTR [ecx+2032]	 #SM3 Disp32(f0070000)
+	vsm3msg2	xmm6, xmm5, XMMWORD PTR [edx-2048]	 #SM3 Disp32(00f8ffff)
+	vsm3rnds2	xmm6, xmm5, xmm4, 123	 #SM3
+	vsm3rnds2	xmm6, xmm5, XMMWORD PTR [esp+esi*8+0x10000000], 123	 #SM3
+	vsm3rnds2	xmm6, xmm5, XMMWORD PTR [ecx], 123	 #SM3
+	vsm3rnds2	xmm6, xmm5, XMMWORD PTR [ecx+2032], 123	 #SM3 Disp32(f0070000)
+	vsm3rnds2	xmm6, xmm5, XMMWORD PTR [edx-2048], 123	 #SM3 Disp32(00f8ffff)
diff --git a/gas/testsuite/gas/i386/x86-64-sm3-intel.d b/gas/testsuite/gas/i386/x86-64-sm3-intel.d
new file mode 100644
index 00000000000..5b533681029
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-sm3-intel.d
@@ -0,0 +1,40 @@ 
+#as:
+#objdump: -dw -Mintel
+#name: x86_64 SM3 insns (Intel disassembly)
+#source: x86-64-sm3.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*c4 e2 50 da f4\s+vsm3msg1 xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 a2 50 da b4 f5 00 00 00 10\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 50 da 31\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 50 da b1 f0 07 00 00\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 50 da b2 00 f8 ff ff\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[rdx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 51 da f4\s+vsm3msg2 xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 a2 51 da b4 f5 00 00 00 10\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 51 da 31\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 51 da b1 f0 07 00 00\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 51 da b2 00 f8 ff ff\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[rdx-0x800\]
+\s*[a-f0-9]+:\s*c4 e3 51 de f4 7b\s+vsm3rnds2 xmm6,xmm5,xmm4,0x7b
+\s*[a-f0-9]+:\s*c4 a3 51 de b4 f5 00 00 00 10 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*c4 c3 51 de 31 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[r9\],0x7b
+\s*[a-f0-9]+:\s*c4 e3 51 de b1 f0 07 00 00 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\],0x7b
+\s*[a-f0-9]+:\s*c4 e3 51 de b2 00 f8 ff ff 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[rdx-0x800\],0x7b
+\s*[a-f0-9]+:\s*c4 e2 50 da f4\s+vsm3msg1 xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 a2 50 da b4 f5 00 00 00 10\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 50 da 31\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 50 da b1 f0 07 00 00\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 50 da b2 00 f8 ff ff\s+vsm3msg1 xmm6,xmm5,XMMWORD PTR \[rdx-0x800\]
+\s*[a-f0-9]+:\s*c4 e2 51 da f4\s+vsm3msg2 xmm6,xmm5,xmm4
+\s*[a-f0-9]+:\s*c4 a2 51 da b4 f5 00 00 00 10\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\]
+\s*[a-f0-9]+:\s*c4 c2 51 da 31\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[r9\]
+\s*[a-f0-9]+:\s*c4 e2 51 da b1 f0 07 00 00\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\]
+\s*[a-f0-9]+:\s*c4 e2 51 da b2 00 f8 ff ff\s+vsm3msg2 xmm6,xmm5,XMMWORD PTR \[rdx-0x800\]
+\s*[a-f0-9]+:\s*c4 e3 51 de f4 7b\s+vsm3rnds2 xmm6,xmm5,xmm4,0x7b
+\s*[a-f0-9]+:\s*c4 a3 51 de b4 f5 00 00 00 10 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[rbp\+r14\*8\+0x10000000\],0x7b
+\s*[a-f0-9]+:\s*c4 c3 51 de 31 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[r9\],0x7b
+\s*[a-f0-9]+:\s*c4 e3 51 de b1 f0 07 00 00 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[rcx\+0x7f0\],0x7b
+\s*[a-f0-9]+:\s*c4 e3 51 de b2 00 f8 ff ff 7b\s+vsm3rnds2 xmm6,xmm5,XMMWORD PTR \[rdx-0x800\],0x7b
diff --git a/gas/testsuite/gas/i386/x86-64-sm3.d b/gas/testsuite/gas/i386/x86-64-sm3.d
new file mode 100644
index 00000000000..8f417de4f7f
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-sm3.d
@@ -0,0 +1,40 @@ 
+#as:
+#objdump: -dw
+#name: x86_64 SM3 insns
+#source: x86-64-sm3.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*c4 e2 50 da f4\s+vsm3msg1 %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 a2 50 da b4 f5 00 00 00 10\s+vsm3msg1 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 50 da 31\s+vsm3msg1 \(%r9\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 da b1 f0 07 00 00\s+vsm3msg1 0x7f0\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 da b2 00 f8 ff ff\s+vsm3msg1 -0x800\(%rdx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 da f4\s+vsm3msg2 %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 a2 51 da b4 f5 00 00 00 10\s+vsm3msg2 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 51 da 31\s+vsm3msg2 \(%r9\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 da b1 f0 07 00 00\s+vsm3msg2 0x7f0\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 da b2 00 f8 ff ff\s+vsm3msg2 -0x800\(%rdx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 51 de f4 7b\s+vsm3rnds2 \$0x7b,%xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 a3 51 de b4 f5 00 00 00 10 7b\s+vsm3rnds2 \$0x7b,0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c3 51 de 31 7b\s+vsm3rnds2 \$0x7b,\(%r9\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 51 de b1 f0 07 00 00 7b\s+vsm3rnds2 \$0x7b,0x7f0\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 51 de b2 00 f8 ff ff 7b\s+vsm3rnds2 \$0x7b,-0x800\(%rdx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 da f4\s+vsm3msg1 %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 a2 50 da b4 f5 00 00 00 10\s+vsm3msg1 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 50 da 31\s+vsm3msg1 \(%r9\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 da b1 f0 07 00 00\s+vsm3msg1 0x7f0\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 50 da b2 00 f8 ff ff\s+vsm3msg1 -0x800\(%rdx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 da f4\s+vsm3msg2 %xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 a2 51 da b4 f5 00 00 00 10\s+vsm3msg2 0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c2 51 da 31\s+vsm3msg2 \(%r9\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 da b1 f0 07 00 00\s+vsm3msg2 0x7f0\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e2 51 da b2 00 f8 ff ff\s+vsm3msg2 -0x800\(%rdx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 51 de f4 7b\s+vsm3rnds2 \$0x7b,%xmm4,%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 a3 51 de b4 f5 00 00 00 10 7b\s+vsm3rnds2 \$0x7b,0x10000000\(%rbp,%r14,8\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 c3 51 de 31 7b\s+vsm3rnds2 \$0x7b,\(%r9\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 51 de b1 f0 07 00 00 7b\s+vsm3rnds2 \$0x7b,0x7f0\(%rcx\),%xmm5,%xmm6
+\s*[a-f0-9]+:\s*c4 e3 51 de b2 00 f8 ff ff 7b\s+vsm3rnds2 \$0x7b,-0x800\(%rdx\),%xmm5,%xmm6
diff --git a/gas/testsuite/gas/i386/x86-64-sm3.s b/gas/testsuite/gas/i386/x86-64-sm3.s
new file mode 100644
index 00000000000..fa80b4b15a8
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-sm3.s
@@ -0,0 +1,37 @@ 
+# Check 64bit SM3 instructions
+
+	.allow_index_reg
+	.text
+_start:
+	vsm3msg1	%xmm4, %xmm5, %xmm6	 #SM3
+	vsm3msg1	0x10000000(%rbp, %r14, 8), %xmm5, %xmm6	 #SM3
+	vsm3msg1	(%r9), %xmm5, %xmm6	 #SM3
+	vsm3msg1	2032(%rcx), %xmm5, %xmm6	 #SM3 Disp32(f0070000)
+	vsm3msg1	-2048(%rdx), %xmm5, %xmm6	 #SM3 Disp32(00f8ffff)
+	vsm3msg2	%xmm4, %xmm5, %xmm6	 #SM3
+	vsm3msg2	0x10000000(%rbp, %r14, 8), %xmm5, %xmm6	 #SM3
+	vsm3msg2	(%r9), %xmm5, %xmm6	 #SM3
+	vsm3msg2	2032(%rcx), %xmm5, %xmm6	 #SM3 Disp32(f0070000)
+	vsm3msg2	-2048(%rdx), %xmm5, %xmm6	 #SM3 Disp32(00f8ffff)
+	vsm3rnds2	$123, %xmm4, %xmm5, %xmm6	 #SM3
+	vsm3rnds2	$123, 0x10000000(%rbp, %r14, 8), %xmm5, %xmm6	 #SM3
+	vsm3rnds2	$123, (%r9), %xmm5, %xmm6	 #SM3
+	vsm3rnds2	$123, 2032(%rcx), %xmm5, %xmm6	 #SM3 Disp32(f0070000)
+	vsm3rnds2	$123, -2048(%rdx), %xmm5, %xmm6	 #SM3 Disp32(00f8ffff)
+
+.intel_syntax noprefix
+	vsm3msg1	xmm6, xmm5, xmm4	 #SM3
+	vsm3msg1	xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000]	 #SM3
+	vsm3msg1	xmm6, xmm5, XMMWORD PTR [r9]	 #SM3
+	vsm3msg1	xmm6, xmm5, XMMWORD PTR [rcx+2032]	 #SM3 Disp32(f0070000)
+	vsm3msg1	xmm6, xmm5, XMMWORD PTR [rdx-2048]	 #SM3 Disp32(00f8ffff)
+	vsm3msg2	xmm6, xmm5, xmm4	 #SM3
+	vsm3msg2	xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000]	 #SM3
+	vsm3msg2	xmm6, xmm5, XMMWORD PTR [r9]	 #SM3
+	vsm3msg2	xmm6, xmm5, XMMWORD PTR [rcx+2032]	 #SM3 Disp32(f0070000)
+	vsm3msg2	xmm6, xmm5, XMMWORD PTR [rdx-2048]	 #SM3 Disp32(00f8ffff)
+	vsm3rnds2	xmm6, xmm5, xmm4, 123	 #SM3
+	vsm3rnds2	xmm6, xmm5, XMMWORD PTR [rbp+r14*8+0x10000000], 123	 #SM3
+	vsm3rnds2	xmm6, xmm5, XMMWORD PTR [r9], 123	 #SM3
+	vsm3rnds2	xmm6, xmm5, XMMWORD PTR [rcx+2032], 123	 #SM3 Disp32(f0070000)
+	vsm3rnds2	xmm6, xmm5, XMMWORD PTR [rdx-2048], 123	 #SM3 Disp32(00f8ffff)
diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp
index 64d8c3726d4..5717443d2f6 100644
--- a/gas/testsuite/gas/i386/x86-64.exp
+++ b/gas/testsuite/gas/i386/x86-64.exp
@@ -442,6 +442,8 @@  run_dump_test "x86-64-avx-vnni-int16"
 run_dump_test "x86-64-avx-vnni-int16-intel"
 run_dump_test "x86-64-sha512"
 run_dump_test "x86-64-sha512-intel"
+run_dump_test "x86-64-sm3"
+run_dump_test "x86-64-sm3-intel"
 run_dump_test "x86-64-clzero"
 run_dump_test "x86-64-mwaitx-bdver4"
 run_list_test "x86-64-mwaitx-reg"
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 430238c3e4e..da9568acdd5 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1070,6 +1070,7 @@  enum
   PREFIX_VEX_0F38CB,
   PREFIX_VEX_0F38CC,
   PREFIX_VEX_0F38CD,
+  PREFIX_VEX_0F38DA_W_0_L_0,
   PREFIX_VEX_0F38F5_L_0,
   PREFIX_VEX_0F38F6_L_0,
   PREFIX_VEX_0F38F7_L_0,
@@ -1315,6 +1316,7 @@  enum
   VEX_LEN_0F38CB_P_3_W_0,
   VEX_LEN_0F38CC_P_3_W_0,
   VEX_LEN_0F38CD_P_3_W_0,
+  VEX_LEN_0F38DA_W_0,
   VEX_LEN_0F38DB,
   VEX_LEN_0F38F2,
   VEX_LEN_0F38F3,
@@ -1345,6 +1347,7 @@  enum
   VEX_LEN_0F3A61,
   VEX_LEN_0F3A62,
   VEX_LEN_0F3A63,
+  VEX_LEN_0F3ADE_W_0,
   VEX_LEN_0F3ADF,
   VEX_LEN_0F3AF0,
   VEX_LEN_XOP_08_85,
@@ -1488,6 +1491,7 @@  enum
   VEX_W_0F38CF,
   VEX_W_0F38D2,
   VEX_W_0F38D3,
+  VEX_W_0F38DA,
   VEX_W_0F3A00_L_1,
   VEX_W_0F3A01_L_1,
   VEX_W_0F3A02,
@@ -1505,6 +1509,7 @@  enum
   VEX_W_0F3A4C,
   VEX_W_0F3ACE,
   VEX_W_0F3ACF,
+  VEX_W_0F3ADE,
 
   VEX_W_XOP_08_85_L_0,
   VEX_W_XOP_08_86_L_0,
@@ -3964,6 +3969,13 @@  static const struct dis386 prefix_table[][4] = {
     { VEX_W_TABLE (VEX_W_0F38CD_P_3) },
   },
 
+  /* PREFIX_VEX_0F38DA_W_0_L_0 */
+  {
+    { "vsm3msg1", { XM, Vex, EXxmm }, 0 },
+    { Bad_Opcode },
+    { "vsm3msg2", { XM, Vex, EXxmm }, 0 },
+  },
+
   /* PREFIX_VEX_0F38F5_L_0 */
   {
     { "bzhiS",		{ Gdq, Edq, VexGdq }, 0 },
@@ -6433,7 +6445,7 @@  static const struct dis386 vex_table[][256] = {
     /* d8 */
     { Bad_Opcode },
     { Bad_Opcode },
-    { Bad_Opcode },
+    { VEX_W_TABLE (VEX_W_0F38DA) },
     { VEX_LEN_TABLE (VEX_LEN_0F38DB) },
     { "vaesenc",	{ XM, Vex, EXx }, PREFIX_DATA },
     { "vaesenclast",	{ XM, Vex, EXx }, PREFIX_DATA },
@@ -6728,7 +6740,7 @@  static const struct dis386 vex_table[][256] = {
     { Bad_Opcode },
     { Bad_Opcode },
     { Bad_Opcode },
-    { Bad_Opcode },
+    { VEX_W_TABLE (VEX_W_0F3ADE) },
     { VEX_LEN_TABLE (VEX_LEN_0F3ADF) },
     /* e0 */
     { Bad_Opcode },
@@ -6998,6 +7010,11 @@  static const struct dis386 vex_len_table[][2] = {
     { "vsha512msg2", { XM, Uymm }, 0 },
   },
 
+  /* VEX_LEN_0F38DA_W_0 */
+  {
+    { PREFIX_TABLE (PREFIX_VEX_0F38DA_W_0_L_0) },
+  },
+
   /* VEX_LEN_0F38DB */
   {
     { "vaesimc",	{ XM, EXx }, PREFIX_DATA },
@@ -7156,6 +7173,11 @@  static const struct dis386 vex_len_table[][2] = {
     { "vpcmpistri",	{ XM, EXx, Ib }, PREFIX_DATA },
   },
 
+  /* VEX_LEN_0F3ADE_W_0 */
+  {
+    { "vsm3rnds2", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
+  },
+
   /* VEX_LEN_0F3ADF */
   {
     { "vaeskeygenassist", { XM, EXx, Ib }, PREFIX_DATA },
@@ -7692,6 +7714,10 @@  static const struct dis386 vex_w_table[][2] = {
     /* VEX_W_0F38D3 */
     { PREFIX_TABLE (PREFIX_VEX_0F38D3_W_0) },
   },
+  {
+    /* VEX_W_0F38DA */
+    { VEX_LEN_TABLE (VEX_LEN_0F38DA_W_0) },
+  },
   {
     /* VEX_W_0F3A00_L_1 */
     { Bad_Opcode },
@@ -7764,6 +7790,10 @@  static const struct dis386 vex_w_table[][2] = {
     { Bad_Opcode },
     { "%XEvgf2p8affineinvqb",  { XM, Vex, EXx, Ib }, PREFIX_DATA },
   },
+  {
+    /* VEX_W_0F3ADE */
+    { VEX_LEN_TABLE (VEX_LEN_0F3ADE_W_0) },
+  },
   /* VEX_W_XOP_08_85_L_0 */
   {
     { "vpmacssww", 	{ XM, Vex, EXx, XMVexI4 }, 0 },
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 8a163533eeb..a5743cd5ee5 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -170,6 +170,8 @@  static const dependency isa_dependencies[] =
     "AVX2" },
   { "SHA512",
     "AVX" },
+  { "SM3",
+    "AVX" },
   { "AVX512F",
     "AVX2" },
   { "AVX512CD",
@@ -372,6 +374,7 @@  static bitfield cpu_flags[] =
   BITFIELD (LKGS),
   BITFIELD (AVX_VNNI_INT16),
   BITFIELD (SHA512),
+  BITFIELD (SM3),
   BITFIELD (MWAITX),
   BITFIELD (CLZERO),
   BITFIELD (OSPKE),
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 224ca04661e..42d69167c8a 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -237,6 +237,8 @@  enum
   CpuAVX_VNNI_INT16,
   /* Intel SHA512 Instructions support required.  */
   CpuSHA512,
+  /* Intel SM3 Instructions support required.  */
+  CpuSM3,
   /* mwaitx instruction required */
   CpuMWAITX,
   /* Clzero instruction required */
@@ -436,6 +438,7 @@  typedef union i386_cpu_flags
       unsigned int cpulkgs:1;
       unsigned int cpuavx_vnni_int16:1;
       unsigned int cpusha512:1;
+      unsigned int cpusm3:1;
       unsigned int cpumwaitx:1;
       unsigned int cpuclzero:1;
       unsigned int cpuospke:1;
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 18ea2f1500e..630337b108b 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -3383,3 +3383,10 @@  vsha512msg1, 0xf2cc, SHA512, Vex256|Space0F38|Modrm|VexW0|NoSuf, { RegXMM, RegYM
 vsha512msg2, 0xf2cd, SHA512, Vex256|Space0F38|Modrm|VexW0|NoSuf, { RegYMM, RegYMM }
 
 // SHA512 instructions end.
+
+// SM3 instructions.
+vsm3rnds2, 0x66de, SM3, Modrm|Space0F3A|Vex128|VexVVVV|VexW0|NoSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM, RegXMM }
+vsm3msg1, 0xda, SM3, Modrm|Space0F38|Vex128|VexVVVV|VexW0|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM, RegXMM }
+vsm3msg2, 0x66da, SM3, Modrm|Space0F38|Vex128|VexVVVV|VexW0|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM, RegXMM }
+
+// SM3 instructions end.