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[8.43.85.97]) by mx.google.com with ESMTPS id wi23-20020a170906fd5700b009710480b356si1868583ejb.574.2023.05.26.01.00.43 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 May 2023 01:00:43 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5958839540BE for ; Fri, 26 May 2023 07:47:01 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id B659438323EB for ; Fri, 26 May 2023 07:38:51 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org B659438323EB Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.5]) by gateway (Coremail) with SMTP id _____8Bxy_IKYnBkFVwBAA--.3662S3; Fri, 26 May 2023 15:38:50 +0800 (CST) Received: from 5.5.5 (unknown [10.2.5.5]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cxqjr8YXBkQjJ5AA--.4193S6; Fri, 26 May 2023 15:38:49 +0800 (CST) From: mengqinggang To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, liuzhensong@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, changjiachen@stu.xupt.edu.cn, mengqinggang Subject: [PATCH v5 4/6] LoongArch: binutils: Add support for linker relaxation. Date: Fri, 26 May 2023 15:38:31 +0800 Message-Id: <20230526073833.3933735-5-mengqinggang@loongson.cn> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230526073833.3933735-1-mengqinggang@loongson.cn> References: <20230526073833.3933735-1-mengqinggang@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cxqjr8YXBkQjJ5AA--.4193S6 X-CM-SenderInfo: 5phqw15lqjwttqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjvJXoW3Aw1rCr1rCr48XF1kuryDJrb_yoW3tr4Upr WxJw4kKr1UJF47CrW09a18ur43Ww4xXFy3XrWYg3y093Z5WryrW34UtFn3Wa4UCF4Ykay3 uw1vgFZxCaykJaDanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj qI5I8CrVACY4xI64kE6c02F40Ex7xfYxn0WfASr-VFAUDa7-sFnT9fnUUIcSsGvfJTRUUU b28YFVCjjxCrM7AC8VAFwI0_Jr0_Gr1l1xkIjI8I6I8E6xAIw20EY4v20xvaj40_Wr0E3s 1l1IIY67AEw4v_Jr0_Jr4l8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxSw2x7M28EF7xv wVC0I7IYx2IY67AKxVW5JVW7JwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwA2z4 x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4UJVWxJr1l e2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27wAqx4xG64xvF2 IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jw0_WrylYx0Ex4A2jsIE14v26r4j6F4U McvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20xvY0x0EwIxGrwCFx2 IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v2 6r106r1rMI8E67AF67kF1VAFwI0_Jw0_GFylIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67 AKxVW5JVW7JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1lIxAIcVCF04k26cxKx2IY s7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr 0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x07j8CztUUUUU= X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766942880801637946?= X-GMAIL-MSGID: =?utf-8?q?1766942880801637946?= Add support for relocs related to relax to readelf. binutils/ChangeLog: * readelf.c (target_specific_reloc_handling): Handle ULEB128 reloc. (is_32bit_inplace_add_reloc): Handle new reloc. (is_32bit_inplace_sub_reloc): Likewise. (is_64bit_inplace_add_reloc): Likewise. (is_64bit_inplace_sub_reloc): Likewise. (is_16bit_inplace_add_reloc): Likewise. (is_16bit_inplace_sub_reloc): Likewise. (is_8bit_inplace_add_reloc): Likewise. (is_8bit_inplace_sub_reloc): Likewise. (is_6bit_inplace_sub_reloc): Likewise. (is_6bit_inplace_add_reloc): New function. (apply_relocations): Handle new reloc. * testsuite/binutils-all/readelf.exp: Add -mno-relax option for LoongArch. --- binutils/readelf.c | 84 ++++++++++++++++++++- binutils/testsuite/binutils-all/readelf.exp | 13 +++- 2 files changed, 91 insertions(+), 6 deletions(-) diff --git a/binutils/readelf.c b/binutils/readelf.c index b872876a8b6..fb2f04901fd 100644 --- a/binutils/readelf.c +++ b/binutils/readelf.c @@ -14008,6 +14008,51 @@ target_specific_reloc_handling (Filedata *filedata, switch (filedata->file_header.e_machine) { + case EM_LOONGARCH: + { + switch (reloc_type) + { + /* For .uleb128 .LFE1-.LFB1, loongarch write 0 to object file + at assembly time. */ + case 107: /* R_LARCH_ADD_ULEB128. */ + case 108: /* R_LARCH_SUB_ULEB128. */ + { + uint64_t value; + unsigned int reloc_size = 0; + int leb_ret = 0; + + value = read_leb128 (start + reloc->r_offset, end, false, + &reloc_size, &leb_ret); + if (leb_ret != 0 || reloc_size == 0 || reloc_size > 8) + error (_("LoongArch ULEB128 field at 0x%lx contains invalid " + "ULEB128 value\n"), + (long) reloc->r_offset); + + if (107 == reloc_type) + value += (reloc->r_addend + symtab[sym_index].st_value); + else if (108 == reloc_type) + value -= (reloc->r_addend + symtab[sym_index].st_value); + + /* Write uleb128 value to p. */ + bfd_byte c; + bfd_byte *p = start + reloc->r_offset; + do + { + c = value & 0x7f; + if (reloc_size > 1) + c |= 0x80; + *(p++) = c; + value >>= 7; + reloc_size--; + } + while (reloc_size); + + return true; + } + } + break; + } + case EM_MSP430: case EM_MSP430_OLD: { @@ -14734,6 +14779,8 @@ is_32bit_inplace_add_reloc (Filedata * filedata, unsigned int reloc_type) /* Please keep this table alpha-sorted for ease of visual lookup. */ switch (filedata->file_header.e_machine) { + case EM_LOONGARCH: + return reloc_type == 50; /* R_LARCH_ADD32. */ case EM_RISCV: return reloc_type == 35; /* R_RISCV_ADD32. */ default: @@ -14750,6 +14797,8 @@ is_32bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type) /* Please keep this table alpha-sorted for ease of visual lookup. */ switch (filedata->file_header.e_machine) { + case EM_LOONGARCH: + return reloc_type == 55; /* R_LARCH_SUB32. */ case EM_RISCV: return reloc_type == 39; /* R_RISCV_SUB32. */ default: @@ -14766,6 +14815,8 @@ is_64bit_inplace_add_reloc (Filedata * filedata, unsigned int reloc_type) /* Please keep this table alpha-sorted for ease of visual lookup. */ switch (filedata->file_header.e_machine) { + case EM_LOONGARCH: + return reloc_type == 51; /* R_LARCH_ADD64. */ case EM_RISCV: return reloc_type == 36; /* R_RISCV_ADD64. */ default: @@ -14782,6 +14833,8 @@ is_64bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type) /* Please keep this table alpha-sorted for ease of visual lookup. */ switch (filedata->file_header.e_machine) { + case EM_LOONGARCH: + return reloc_type == 56; /* R_LARCH_SUB64. */ case EM_RISCV: return reloc_type == 40; /* R_RISCV_SUB64. */ default: @@ -14798,6 +14851,8 @@ is_16bit_inplace_add_reloc (Filedata * filedata, unsigned int reloc_type) /* Please keep this table alpha-sorted for ease of visual lookup. */ switch (filedata->file_header.e_machine) { + case EM_LOONGARCH: + return reloc_type == 48; /* R_LARCH_ADD16. */ case EM_RISCV: return reloc_type == 34; /* R_RISCV_ADD16. */ default: @@ -14814,6 +14869,8 @@ is_16bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type) /* Please keep this table alpha-sorted for ease of visual lookup. */ switch (filedata->file_header.e_machine) { + case EM_LOONGARCH: + return reloc_type == 53; /* R_LARCH_SUB16. */ case EM_RISCV: return reloc_type == 38; /* R_RISCV_SUB16. */ default: @@ -14830,6 +14887,8 @@ is_8bit_inplace_add_reloc (Filedata * filedata, unsigned int reloc_type) /* Please keep this table alpha-sorted for ease of visual lookup. */ switch (filedata->file_header.e_machine) { + case EM_LOONGARCH: + return reloc_type == 47; /* R_LARCH_ADD8. */ case EM_RISCV: return reloc_type == 33; /* R_RISCV_ADD8. */ default: @@ -14846,6 +14905,8 @@ is_8bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type) /* Please keep this table alpha-sorted for ease of visual lookup. */ switch (filedata->file_header.e_machine) { + case EM_LOONGARCH: + return reloc_type == 52; /* R_LARCH_SUB8. */ case EM_RISCV: return reloc_type == 37; /* R_RISCV_SUB8. */ default: @@ -14853,6 +14914,21 @@ is_8bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type) } } +/* Like is_32bit_abs_reloc except that it returns TRUE iff RELOC_TYPE is + a 6-bit inplace add RELA relocation used in DWARF debug sections. */ + +static bool +is_6bit_inplace_add_reloc (Filedata * filedata, unsigned int reloc_type) +{ + switch (filedata->file_header.e_machine) + { + case EM_LOONGARCH: + return reloc_type == 105; /* R_LARCH_ADD6. */ + default: + return false; + } +} + /* Like is_32bit_abs_reloc except that it returns TRUE iff RELOC_TYPE is a 6-bit inplace sub RELA relocation used in DWARF debug sections. */ @@ -14861,6 +14937,8 @@ is_6bit_inplace_sub_reloc (Filedata * filedata, unsigned int reloc_type) { switch (filedata->file_header.e_machine) { + case EM_LOONGARCH: + return reloc_type == 106; /* R_LARCH_SUB6. */ case EM_RISCV: return reloc_type == 52; /* R_RISCV_SUB6. */ default: @@ -15108,7 +15186,8 @@ apply_relocations (Filedata *filedata, reloc_inplace = true; } else if ((reloc_subtract = is_6bit_inplace_sub_reloc (filedata, - reloc_type))) + reloc_type)) + || is_6bit_inplace_add_reloc (filedata, reloc_type)) { reloc_size = 1; reloc_inplace = true; @@ -15200,7 +15279,8 @@ apply_relocations (Filedata *filedata, reloc_size); } else if (is_6bit_abs_reloc (filedata, reloc_type) - || is_6bit_inplace_sub_reloc (filedata, reloc_type)) + || is_6bit_inplace_sub_reloc (filedata, reloc_type) + || is_6bit_inplace_add_reloc (filedata, reloc_type)) { if (reloc_subtract) addend -= sym->st_value; diff --git a/binutils/testsuite/binutils-all/readelf.exp b/binutils/testsuite/binutils-all/readelf.exp index 2a785c6e3df..f963c6bee24 100644 --- a/binutils/testsuite/binutils-all/readelf.exp +++ b/binutils/testsuite/binutils-all/readelf.exp @@ -489,18 +489,23 @@ if {![binutils_assemble $srcdir/$subdir/z.s tmpdir/z.o]} then { readelf_test {--decompress --hex-dump .debug_loc} $tempfile readelf.z } -set hpux "" +set flags "" # Skip the next test for the RISCV architectures because they # do not support .ULEB128 pseudo-ops with non-constant values. if ![istarget "riscv*-*-*"] then { if [istarget "hppa*64*-*-hpux*"] { - set hpux "--defsym HPUX=1" + set flags "--defsym HPUX=1" } + # LoongArch relax align add nops, so label subtractions will increase + if [istarget "loongarch*-*-*"] { + set flags "-mno-relax" + } + # Assemble the DWARF-5 test file. - if {![binutils_assemble_flags $srcdir/$subdir/dw5.S tmpdir/dw5.o $hpux]} then { + if {![binutils_assemble_flags $srcdir/$subdir/dw5.S tmpdir/dw5.o $flags]} then { unsupported "readelf -wiaoRlL dw5 (failed to assemble)" } else { @@ -612,7 +617,7 @@ if ![is_remote host] { } # Check dwarf-5 support for DW_OP_addrx. -if {![binutils_assemble_flags $srcdir/$subdir/dw5-op.S tmpdir/dw5-op.o $hpux]} then { +if {![binutils_assemble_flags $srcdir/$subdir/dw5-op.S tmpdir/dw5-op.o $flags]} then { unsupported "readelf -wi dw5-op (failed to assemble)" } else {