[COMMITTED,2/3] gas: BPF pseudo-c syntax tests
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Commit Message
This patch expands the GAS BPF testsuite in order to also test the
alternative pseudo-C syntax used in BPF assembly.
This includes three main changes:
- Some general GAS tests involving assignment and equality operands in
expressions (such as = and ==) are disabled in bpf-* targets,
because the syntax collides with the pseudo-C BPF assembly syntax.
- New tests are added to the BPF GAS testsuite that test the pseudo-c
syntax. Tests for all BPF instructions are included.
- New tests are added to the BPF GAS testsuite that test the support
for both syntaxes in the same source.
gas/ChangeLog:
2023-04-20 Guillermo E. Martinez <guillermo.e.martinez@oracle.com>
PR gas/29728
* testsuite/gas/all/assign-bad-recursive.d: Skip test in bpf-*
targets.
* testsuite/gas/all/eqv-dot.d: Likewise.
* testsuite/gas/all/gas.exp: Skip other assignment tests in bpf-*.
* testsuite/gas/bpf/alu-pseudoc.s: New file.
* testsuite/gas/bpf/pseudoc-normal.s: Likewise.
* testsuite/gas/bpf/pseudoc-normal.d: Likewise.
* testsuite/gas/bpf/pseudoc-normal-be.d: Likewise.
* testsuite/gas/bpf/mem-pseudoc.s: Likewise.
* testsuite/gas/bpf/lddw-pseudoc.s: Likewise.
* testsuite/gas/bpf/jump32-pseudoc.s: Likewise.
* testsuite/gas/bpf/jump-pseudoc.s: Likewise.
* testsuite/gas/bpf/indcall-1-pseudoc.s: Likewise.
* testsuite/gas/bpf/atomic-pseudoc.s: Likewise.
* testsuite/gas/bpf/alu32-pseudoc.s: Likewise.
* testsuite/gas/bpf/*.d: Add -pseudoc variants of the tests.
---
gas/ChangeLog | 20 ++
gas/testsuite/gas/all/assign-bad-recursive.d | 1 +
gas/testsuite/gas/all/eqv-dot.d | 2 +-
gas/testsuite/gas/all/gas.exp | 5 +-
gas/testsuite/gas/bpf/alu-be.d | 1 +
gas/testsuite/gas/bpf/alu-pseudoc.s | 51 +++++
gas/testsuite/gas/bpf/alu32-be.d | 1 +
gas/testsuite/gas/bpf/alu32-pseudoc.s | 57 +++++
gas/testsuite/gas/bpf/alu32.d | 2 +
gas/testsuite/gas/bpf/atomic-be.d | 1 +
gas/testsuite/gas/bpf/atomic-pseudoc.s | 4 +
gas/testsuite/gas/bpf/atomic.d | 2 +
gas/testsuite/gas/bpf/bpf.exp | 2 +
gas/testsuite/gas/bpf/indcall-1-pseudoc.s | 13 ++
gas/testsuite/gas/bpf/indcall-1.d | 2 +
gas/testsuite/gas/bpf/indcall-bad-1.l | 2 +
gas/testsuite/gas/bpf/jump-be.d | 1 +
gas/testsuite/gas/bpf/jump-pseudoc.s | 25 +++
gas/testsuite/gas/bpf/jump.d | 4 +-
gas/testsuite/gas/bpf/jump32-pseudoc.s | 25 +++
gas/testsuite/gas/bpf/jump32.d | 2 +
gas/testsuite/gas/bpf/lddw-be.d | 1 +
gas/testsuite/gas/bpf/lddw-pseudoc.s | 6 +
gas/testsuite/gas/bpf/lddw.d | 2 +
gas/testsuite/gas/bpf/mem-be.d | 3 +-
gas/testsuite/gas/bpf/mem-pseudoc.s | 23 ++
gas/testsuite/gas/bpf/mem.d | 2 +
gas/testsuite/gas/bpf/pseudoc-normal-be.d | 214 +++++++++++++++++++
gas/testsuite/gas/bpf/pseudoc-normal.d | 214 +++++++++++++++++++
gas/testsuite/gas/bpf/pseudoc-normal.s | 196 +++++++++++++++++
gas/testsuite/gas/macros/macros.exp | 1 +
31 files changed, 880 insertions(+), 5 deletions(-)
create mode 100644 gas/testsuite/gas/bpf/alu-pseudoc.s
create mode 100644 gas/testsuite/gas/bpf/alu32-pseudoc.s
create mode 100644 gas/testsuite/gas/bpf/atomic-pseudoc.s
create mode 100644 gas/testsuite/gas/bpf/indcall-1-pseudoc.s
create mode 100644 gas/testsuite/gas/bpf/jump-pseudoc.s
create mode 100644 gas/testsuite/gas/bpf/jump32-pseudoc.s
create mode 100644 gas/testsuite/gas/bpf/lddw-pseudoc.s
create mode 100644 gas/testsuite/gas/bpf/mem-pseudoc.s
create mode 100644 gas/testsuite/gas/bpf/pseudoc-normal-be.d
create mode 100644 gas/testsuite/gas/bpf/pseudoc-normal.d
create mode 100644 gas/testsuite/gas/bpf/pseudoc-normal.s
Comments
On 26.04.2023 19:31, Jose E. Marchesi via Binutils wrote:
> --- a/gas/ChangeLog
> +++ b/gas/ChangeLog
> @@ -1,3 +1,23 @@
> +2023-04-20 Guillermo E. Martinez <guillermo.e.martinez@oracle.com>
> +
> + PR gas/29728
> + * testsuite/gas/all/assign-bad-recursive.d: Skip test in bpf-*
> + targets.
> + * testsuite/gas/all/eqv-dot.d: Likewise.
> + * testsuite/gas/all/gas.exp: Skip other assignment tests in bpf-*.
I view doing such as problematic. Looking at what patch 3 documents,
the uses of " = " are pretty limited, and ones not naming a register
on the lhs (or, for store forms, on the rhs) ought to be fine to
retain their meaning. Sadly there isn't an easy way to specify target-
specific flags, or else I'd be inclined to suggest that you have an
option to suppress recognition of the C-like syntax (which may be a
good idea anyway, as people might be using constructs like the ones
used in the testcases you now disable) and use it here and below.
In any event, ...
> --- a/gas/testsuite/gas/all/eqv-dot.d
> +++ b/gas/testsuite/gas/all/eqv-dot.d
> @@ -2,7 +2,7 @@
> #name: eqv involving dot
> # bfin doesn't support 'symbol = expression'
> # tic30 and tic4x have 4 octets per byte, tic54x has 2 octets per byte
> -#notarget: bfin-*-* *c30-*-* *c4x-*-* *c54x-*-*
> +#notarget: bfin-*-* *c30-*-* *c4x-*-* *c54x-*-* *bpf-*-*
... at least in cases where there already are justifying comments, new
additions of exceptions shouldn't go uncommented.
> --- a/gas/testsuite/gas/bpf/alu-be.d
> +++ b/gas/testsuite/gas/bpf/alu-be.d
> @@ -1,5 +1,6 @@
> #as: --EB
> #source: alu.s
> +#source: alu-pseudoc.s
> #objdump: -dr
> #name: eBPF ALU64 instructions, big endian
I may of course be reading binutils-common.exp's run_dump_test wrong,
but is this having the intended effect of assembling each of the files
once and checking objdump output for each of them? It looks to me as
if only the assembling step would be performed for both, which I don't
think is what is wanted.
> --- a/gas/testsuite/gas/macros/macros.exp
> +++ b/gas/testsuite/gas/macros/macros.exp
> @@ -82,6 +82,7 @@ switch -glob $target_triplet {
> rl78-*-* { }
> rx-*-* { }
> vax-*-* { }
> + bpf-*-* { }
> default { run_list_test dot "-alm" }
> }
How is this test affected by your changes? It consists of only labels
and directives afaics, so insn syntax expectations shouldn't matter
at all.
Jan
> On 26.04.2023 19:31, Jose E. Marchesi via Binutils wrote:
>> --- a/gas/ChangeLog
>> +++ b/gas/ChangeLog
>> @@ -1,3 +1,23 @@
>> +2023-04-20 Guillermo E. Martinez <guillermo.e.martinez@oracle.com>
>> +
>> + PR gas/29728
>> + * testsuite/gas/all/assign-bad-recursive.d: Skip test in bpf-*
>> + targets.
>> + * testsuite/gas/all/eqv-dot.d: Likewise.
>> + * testsuite/gas/all/gas.exp: Skip other assignment tests in bpf-*.
>
> I view doing such as problematic. Looking at what patch 3 documents,
> the uses of " = " are pretty limited, and ones not naming a register
> on the lhs (or, for store forms, on the rhs) ought to be fine to
> retain their meaning. Sadly there isn't an easy way to specify target-
> specific flags, or else I'd be inclined to suggest that you have an
> option to suppress recognition of the C-like syntax (which may be a
> good idea anyway, as people might be using constructs like the ones
> used in the testcases you now disable) and use it here and below.
Hmm, actually the assembler is supposed to first try to recognize normal
syntax, including expressions such as SYMBOL = VALUE. Then to fallback
to the pseudo-c syntax in case the above fails to parse.
I will take a look (Guillermo is no longer working with us.) It may be
that we don't need to disable these tests at all.
> In any event, ...
>
>> --- a/gas/testsuite/gas/all/eqv-dot.d
>> +++ b/gas/testsuite/gas/all/eqv-dot.d
>> @@ -2,7 +2,7 @@
>> #name: eqv involving dot
>> # bfin doesn't support 'symbol = expression'
>> # tic30 and tic4x have 4 octets per byte, tic54x has 2 octets per byte
>> -#notarget: bfin-*-* *c30-*-* *c4x-*-* *c54x-*-*
>> +#notarget: bfin-*-* *c30-*-* *c4x-*-* *c54x-*-* *bpf-*-*
>
> ... at least in cases where there already are justifying comments, new
> additions of exceptions shouldn't go uncommented.
Yes, will do, in case it is necessary to keep the skips.
>> --- a/gas/testsuite/gas/bpf/alu-be.d
>> +++ b/gas/testsuite/gas/bpf/alu-be.d
>> @@ -1,5 +1,6 @@
>> #as: --EB
>> #source: alu.s
>> +#source: alu-pseudoc.s
>> #objdump: -dr
>> #name: eBPF ALU64 instructions, big endian
>
> I may of course be reading binutils-common.exp's run_dump_test wrong,
> but is this having the intended effect of assembling each of the files
> once and checking objdump output for each of them? It looks to me as
> if only the assembling step would be performed for both, which I don't
> think is what is wanted.
It was an attempt to avoid having to replicate the same contents in
alu-be.d and alu-be-pseudoc.d. Will look into this too.
>> --- a/gas/testsuite/gas/macros/macros.exp
>> +++ b/gas/testsuite/gas/macros/macros.exp
>> @@ -82,6 +82,7 @@ switch -glob $target_triplet {
>> rl78-*-* { }
>> rx-*-* { }
>> vax-*-* { }
>> + bpf-*-* { }
>> default { run_list_test dot "-alm" }
>> }
>
> How is this test affected by your changes? It consists of only labels
> and directives afaics, so insn syntax expectations shouldn't matter
> at all.
>
> Jan
On 27.04.2023 11:59, Jose E. Marchesi wrote:
>
>> On 26.04.2023 19:31, Jose E. Marchesi via Binutils wrote:
>>> --- a/gas/testsuite/gas/bpf/alu-be.d
>>> +++ b/gas/testsuite/gas/bpf/alu-be.d
>>> @@ -1,5 +1,6 @@
>>> #as: --EB
>>> #source: alu.s
>>> +#source: alu-pseudoc.s
>>> #objdump: -dr
>>> #name: eBPF ALU64 instructions, big endian
>>
>> I may of course be reading binutils-common.exp's run_dump_test wrong,
>> but is this having the intended effect of assembling each of the files
>> once and checking objdump output for each of them? It looks to me as
>> if only the assembling step would be performed for both, which I don't
>> think is what is wanted.
>
> It was an attempt to avoid having to replicate the same contents in
> alu-be.d and alu-be-pseudoc.d. Will look into this too.
I assumed that would have been the goal, but that's achieved by using
#dump: instead (in a new, small *.d).
Jan
> On 27.04.2023 11:59, Jose E. Marchesi wrote:
>>
>>> On 26.04.2023 19:31, Jose E. Marchesi via Binutils wrote:
>>>> --- a/gas/testsuite/gas/bpf/alu-be.d
>>>> +++ b/gas/testsuite/gas/bpf/alu-be.d
>>>> @@ -1,5 +1,6 @@
>>>> #as: --EB
>>>> #source: alu.s
>>>> +#source: alu-pseudoc.s
>>>> #objdump: -dr
>>>> #name: eBPF ALU64 instructions, big endian
>>>
>>> I may of course be reading binutils-common.exp's run_dump_test wrong,
>>> but is this having the intended effect of assembling each of the files
>>> once and checking objdump output for each of them? It looks to me as
>>> if only the assembling step would be performed for both, which I don't
>>> think is what is wanted.
>>
>> It was an attempt to avoid having to replicate the same contents in
>> alu-be.d and alu-be-pseudoc.d. Will look into this too.
>
> I assumed that would have been the goal, but that's achieved by using
> #dump: instead (in a new, small *.d).
Thanks for the hint. I just pushed the fix below that makes use of
#dump.
From 2b8c7766ea357ff9b22531d6fdf0c3bd69cc044f Mon Sep 17 00:00:00 2001
From: "Jose E. Marchesi" <jose.marchesi@oracle.com>
Date: Thu, 27 Apr 2023 20:05:19 +0200
Subject: [PATCH] gas: bpf: fix tests for pseudo-c syntax
This patch fixes the GAS BPF testsuite so the tests for pseudo-c
syntax are actually executed.
2023-04-27 Jose E. Marchesi <jose.marchesi@oracle.com>
* testsuite/gas/bpf/mem.dump: New file.
* testsuite/gas/bpf/mem-pseudoc.d: Likewise.
* testsuite/gas/bpf/mem.d: #dump mem.dump.
* testsuite/gas/bpf/lddw.dump: New file.
* testsuite/gas/bpf/lddw-pseudoc.d: Likewise.
* testsuite/gas/bpf/lddw.d: #dump lddw.dump.
* testsuite/gas/bpf/jump.dump: New file.
* testsuite/gas/bpf/jump-pseudoc.d: Likewise
* testsuite/gas/bpf/jump.d: #dump jump.dump.
* testsuite/gas/bpf/jump32.dump: New file.
* testsuite/gas/bpf/jump32-pseudoc.d: Likewise.
* testsuite/gas/bpf/jump32.d: #dump jump32.dump.
* testsuite/gas/bpf/lddw-be.dump: New file.
* testsuite/gas/bpf/lddw-be-pseudoc.d: Likewise.
* testsuite/gas/bpf/lddw-be.d: #dump lddw-be.dump.
* testsuite/gas/bpf/indcall-1.dump: New file.
* testsuite/gas/bpf/indcall-1-pseudoc.d: Likewise.
* testsuite/gas/bpf/indcall-1.d: #dump indcall-1.dump.
* testsuite/gas/bpf/indcall-1-pseudoc.s (main): Fix lddw
instruction.
* testsuite/gas/bpf/atomic.dump: New file.
* testsuite/gas/bpf/atomic-pseudoc.d: Likewise.
* testsuite/gas/bpf/atomic.d: #dump atomic.dump.
* testsuite/gas/bpf/alu32.dump: New file.
* testsuite/gas/bpf/alu32-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu32.d: #dump alu32.dump.
* testsuite/gas/bpf/alu.dump: New file.
* testsuite/gas/bpf/alu-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu.d: #dump alu.dump.
* testsuite/gas/bpf/alu-be.dump: New file.
* testsuite/gas/bpf/alu-be-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu-be.d: #dump alu-be.dump.
* testsuite/gas/bpf/alu32-be-pseudoc.d: New file.
* testsuite/gas/bpf/alu32-be-dump: Likewise.
* testsuite/gas/bpf/alu32-be.d: #dump alu32-be-dump.
* testsuite/gas/bpf/bpf.exp: Run *-pseudoc tests.
---
gas/ChangeLog | 40 ++++++++++++++
gas/testsuite/gas/bpf/alu-be-pseudoc.d | 5 ++
gas/testsuite/gas/bpf/alu-be.d | 59 +-------------------
gas/testsuite/gas/bpf/alu-be.dump | 54 ++++++++++++++++++
gas/testsuite/gas/bpf/alu-pseudoc.d | 5 ++
gas/testsuite/gas/bpf/alu.d | 59 +-------------------
gas/testsuite/gas/bpf/alu.dump | 54 ++++++++++++++++++
gas/testsuite/gas/bpf/alu32-be-pseudoc.d | 5 ++
gas/testsuite/gas/bpf/alu32-be.d | 67 +----------------------
gas/testsuite/gas/bpf/alu32-be.dump | 60 ++++++++++++++++++++
gas/testsuite/gas/bpf/alu32-pseudoc.d | 5 ++
gas/testsuite/gas/bpf/alu32.d | 65 +---------------------
gas/testsuite/gas/bpf/alu32.dump | 60 ++++++++++++++++++++
gas/testsuite/gas/bpf/atomic-pseudoc.d | 5 ++
gas/testsuite/gas/bpf/atomic.d | 12 +---
gas/testsuite/gas/bpf/atomic.dump | 7 +++
gas/testsuite/gas/bpf/bpf.exp | 11 ++++
gas/testsuite/gas/bpf/indcall-1-pseudoc.d | 5 ++
gas/testsuite/gas/bpf/indcall-1-pseudoc.s | 2 +-
gas/testsuite/gas/bpf/indcall-1.d | 23 +-------
gas/testsuite/gas/bpf/indcall-1.dump | 18 ++++++
gas/testsuite/gas/bpf/jump-pseudoc.d | 5 ++
gas/testsuite/gas/bpf/jump.d | 32 +----------
gas/testsuite/gas/bpf/jump.dump | 27 +++++++++
gas/testsuite/gas/bpf/jump32-pseudoc.d | 5 ++
gas/testsuite/gas/bpf/jump32.d | 32 +----------
gas/testsuite/gas/bpf/jump32.dump | 27 +++++++++
gas/testsuite/gas/bpf/lddw-be-pseudoc.d | 5 ++
gas/testsuite/gas/bpf/lddw-be.d | 18 +-----
gas/testsuite/gas/bpf/lddw-be.dump | 13 +++++
gas/testsuite/gas/bpf/lddw-pseudoc.d | 5 ++
gas/testsuite/gas/bpf/lddw.d | 18 +-----
gas/testsuite/gas/bpf/lddw.dump | 13 +++++
gas/testsuite/gas/bpf/mem-pseudoc.d | 5 ++
gas/testsuite/gas/bpf/mem.d | 30 +---------
gas/testsuite/gas/bpf/mem.dump | 25 +++++++++
36 files changed, 489 insertions(+), 392 deletions(-)
create mode 100644 gas/testsuite/gas/bpf/alu-be-pseudoc.d
create mode 100644 gas/testsuite/gas/bpf/alu-be.dump
create mode 100644 gas/testsuite/gas/bpf/alu-pseudoc.d
create mode 100644 gas/testsuite/gas/bpf/alu.dump
create mode 100644 gas/testsuite/gas/bpf/alu32-be-pseudoc.d
create mode 100644 gas/testsuite/gas/bpf/alu32-be.dump
create mode 100644 gas/testsuite/gas/bpf/alu32-pseudoc.d
create mode 100644 gas/testsuite/gas/bpf/alu32.dump
create mode 100644 gas/testsuite/gas/bpf/atomic-pseudoc.d
create mode 100644 gas/testsuite/gas/bpf/atomic.dump
create mode 100644 gas/testsuite/gas/bpf/indcall-1-pseudoc.d
create mode 100644 gas/testsuite/gas/bpf/indcall-1.dump
create mode 100644 gas/testsuite/gas/bpf/jump-pseudoc.d
create mode 100644 gas/testsuite/gas/bpf/jump.dump
create mode 100644 gas/testsuite/gas/bpf/jump32-pseudoc.d
create mode 100644 gas/testsuite/gas/bpf/jump32.dump
create mode 100644 gas/testsuite/gas/bpf/lddw-be-pseudoc.d
create mode 100644 gas/testsuite/gas/bpf/lddw-be.dump
create mode 100644 gas/testsuite/gas/bpf/lddw-pseudoc.d
create mode 100644 gas/testsuite/gas/bpf/lddw.dump
create mode 100644 gas/testsuite/gas/bpf/mem-pseudoc.d
create mode 100644 gas/testsuite/gas/bpf/mem.dump
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 2659601f793..966f1c5de83 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,43 @@
+2023-04-27 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * testsuite/gas/bpf/mem.dump: New file.
+ * testsuite/gas/bpf/mem-pseudoc.d: Likewise.
+ * testsuite/gas/bpf/mem.d: #dump mem.dump.
+ * testsuite/gas/bpf/lddw.dump: New file.
+ * testsuite/gas/bpf/lddw-pseudoc.d: Likewise.
+ * testsuite/gas/bpf/lddw.d: #dump lddw.dump.
+ * testsuite/gas/bpf/jump.dump: New file.
+ * testsuite/gas/bpf/jump-pseudoc.d: Likewise
+ * testsuite/gas/bpf/jump.d: #dump jump.dump.
+ * testsuite/gas/bpf/jump32.dump: New file.
+ * testsuite/gas/bpf/jump32-pseudoc.d: Likewise.
+ * testsuite/gas/bpf/jump32.d: #dump jump32.dump.
+ * testsuite/gas/bpf/lddw-be.dump: New file.
+ * testsuite/gas/bpf/lddw-be-pseudoc.d: Likewise.
+ * testsuite/gas/bpf/lddw-be.d: #dump lddw-be.dump.
+ * testsuite/gas/bpf/indcall-1.dump: New file.
+ * testsuite/gas/bpf/indcall-1-pseudoc.d: Likewise.
+ * testsuite/gas/bpf/indcall-1.d: #dump indcall-1.dump.
+ * testsuite/gas/bpf/indcall-1-pseudoc.s (main): Fix lddw
+ instruction.
+ * testsuite/gas/bpf/atomic.dump: New file.
+ * testsuite/gas/bpf/atomic-pseudoc.d: Likewise.
+ * testsuite/gas/bpf/atomic.d: #dump atomic.dump.
+ * testsuite/gas/bpf/alu32.dump: New file.
+ * testsuite/gas/bpf/alu32-pseudoc.d: Likewise.
+ * testsuite/gas/bpf/alu32.d: #dump alu32.dump.
+ * testsuite/gas/bpf/alu.dump: New file.
+ * testsuite/gas/bpf/alu-pseudoc.d: Likewise.
+ * testsuite/gas/bpf/alu.d: #dump alu.dump.
+
+ * testsuite/gas/bpf/alu-be.dump: New file.
+ * testsuite/gas/bpf/alu-be-pseudoc.d: Likewise.
+ * testsuite/gas/bpf/alu-be.d: #dump alu-be.dump.
+ * testsuite/gas/bpf/alu32-be-pseudoc.d: New file.
+ * testsuite/gas/bpf/alu32-be-dump: Likewise.
+ * testsuite/gas/bpf/alu32-be.d: #dump alu32-be-dump.
+ * testsuite/gas/bpf/bpf.exp: Run *-pseudoc tests.
+
2023-04-19 Jose E. Marchesi <jose.marchesi@oracle.com>
PR gas/29757
diff --git a/gas/testsuite/gas/bpf/alu-be-pseudoc.d b/gas/testsuite/gas/bpf/alu-be-pseudoc.d
new file mode 100644
index 00000000000..0355d196d77
--- /dev/null
+++ b/gas/testsuite/gas/bpf/alu-be-pseudoc.d
@@ -0,0 +1,5 @@
+#as: --EB
+#source: alu-pseudoc.s
+#objdump: -dr
+#dump: alu-be.dump
+#name: eBPF ALU64 instructions, big endian, pseudoc syntax
diff --git a/gas/testsuite/gas/bpf/alu-be.d b/gas/testsuite/gas/bpf/alu-be.d
index d42d33bc3cb..afd2a6cfd6d 100644
--- a/gas/testsuite/gas/bpf/alu-be.d
+++ b/gas/testsuite/gas/bpf/alu-be.d
@@ -1,60 +1,5 @@
#as: --EB
#source: alu.s
-#source: alu-pseudoc.s
#objdump: -dr
-#name: eBPF ALU64 instructions, big endian
-
-.*: +file format .*bpf.*
-
-Disassembly of section .text:
-
-0+ <.text>:
- 0: 07 20 00 00 00 00 02 9a add %r2,0x29a
- 8: 07 30 00 00 ff ff fd 66 add %r3,-666
- 10: 07 40 00 00 7e ad be ef add %r4,0x7eadbeef
- 18: 0f 56 00 00 00 00 00 00 add %r5,%r6
- 20: 17 20 00 00 00 00 02 9a sub %r2,0x29a
- 28: 17 30 00 00 ff ff fd 66 sub %r3,-666
- 30: 17 40 00 00 7e ad be ef sub %r4,0x7eadbeef
- 38: 1f 56 00 00 00 00 00 00 sub %r5,%r6
- 40: 27 20 00 00 00 00 02 9a mul %r2,0x29a
- 48: 27 30 00 00 ff ff fd 66 mul %r3,-666
- 50: 27 40 00 00 7e ad be ef mul %r4,0x7eadbeef
- 58: 2f 56 00 00 00 00 00 00 mul %r5,%r6
- 60: 37 20 00 00 00 00 02 9a div %r2,0x29a
- 68: 37 30 00 00 ff ff fd 66 div %r3,-666
- 70: 37 40 00 00 7e ad be ef div %r4,0x7eadbeef
- 78: 3f 56 00 00 00 00 00 00 div %r5,%r6
- 80: 47 20 00 00 00 00 02 9a or %r2,0x29a
- 88: 47 30 00 00 ff ff fd 66 or %r3,-666
- 90: 47 40 00 00 7e ad be ef or %r4,0x7eadbeef
- 98: 4f 56 00 00 00 00 00 00 or %r5,%r6
- a0: 57 20 00 00 00 00 02 9a and %r2,0x29a
- a8: 57 30 00 00 ff ff fd 66 and %r3,-666
- b0: 57 40 00 00 7e ad be ef and %r4,0x7eadbeef
- b8: 5f 56 00 00 00 00 00 00 and %r5,%r6
- c0: 67 20 00 00 00 00 02 9a lsh %r2,0x29a
- c8: 67 30 00 00 ff ff fd 66 lsh %r3,-666
- d0: 67 40 00 00 7e ad be ef lsh %r4,0x7eadbeef
- d8: 6f 56 00 00 00 00 00 00 lsh %r5,%r6
- e0: 77 20 00 00 00 00 02 9a rsh %r2,0x29a
- e8: 77 30 00 00 ff ff fd 66 rsh %r3,-666
- f0: 77 40 00 00 7e ad be ef rsh %r4,0x7eadbeef
- f8: 7f 56 00 00 00 00 00 00 rsh %r5,%r6
- 100: 97 20 00 00 00 00 02 9a mod %r2,0x29a
- 108: 97 30 00 00 ff ff fd 66 mod %r3,-666
- 110: 97 40 00 00 7e ad be ef mod %r4,0x7eadbeef
- 118: 9f 56 00 00 00 00 00 00 mod %r5,%r6
- 120: a7 20 00 00 00 00 02 9a xor %r2,0x29a
- 128: a7 30 00 00 ff ff fd 66 xor %r3,-666
- 130: a7 40 00 00 7e ad be ef xor %r4,0x7eadbeef
- 138: af 56 00 00 00 00 00 00 xor %r5,%r6
- 140: b7 20 00 00 00 00 02 9a mov %r2,0x29a
- 148: b7 30 00 00 ff ff fd 66 mov %r3,-666
- 150: b7 40 00 00 7e ad be ef mov %r4,0x7eadbeef
- 158: bf 56 00 00 00 00 00 00 mov %r5,%r6
- 160: c7 20 00 00 00 00 02 9a arsh %r2,0x29a
- 168: c7 30 00 00 ff ff fd 66 arsh %r3,-666
- 170: c7 40 00 00 7e ad be ef arsh %r4,0x7eadbeef
- 178: cf 56 00 00 00 00 00 00 arsh %r5,%r6
- 180: 87 20 00 00 00 00 00 00 neg %r2
+#dump: alu-be.dump
+#name: eBPF ALU64 instructions, big endian, normal syntax
diff --git a/gas/testsuite/gas/bpf/alu-be.dump b/gas/testsuite/gas/bpf/alu-be.dump
new file mode 100644
index 00000000000..d4a6f3567d1
--- /dev/null
+++ b/gas/testsuite/gas/bpf/alu-be.dump
@@ -0,0 +1,54 @@
+.*: +file format .*bpf.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ 0: 07 20 00 00 00 00 02 9a add %r2,0x29a
+ 8: 07 30 00 00 ff ff fd 66 add %r3,-666
+ 10: 07 40 00 00 7e ad be ef add %r4,0x7eadbeef
+ 18: 0f 56 00 00 00 00 00 00 add %r5,%r6
+ 20: 17 20 00 00 00 00 02 9a sub %r2,0x29a
+ 28: 17 30 00 00 ff ff fd 66 sub %r3,-666
+ 30: 17 40 00 00 7e ad be ef sub %r4,0x7eadbeef
+ 38: 1f 56 00 00 00 00 00 00 sub %r5,%r6
+ 40: 27 20 00 00 00 00 02 9a mul %r2,0x29a
+ 48: 27 30 00 00 ff ff fd 66 mul %r3,-666
+ 50: 27 40 00 00 7e ad be ef mul %r4,0x7eadbeef
+ 58: 2f 56 00 00 00 00 00 00 mul %r5,%r6
+ 60: 37 20 00 00 00 00 02 9a div %r2,0x29a
+ 68: 37 30 00 00 ff ff fd 66 div %r3,-666
+ 70: 37 40 00 00 7e ad be ef div %r4,0x7eadbeef
+ 78: 3f 56 00 00 00 00 00 00 div %r5,%r6
+ 80: 47 20 00 00 00 00 02 9a or %r2,0x29a
+ 88: 47 30 00 00 ff ff fd 66 or %r3,-666
+ 90: 47 40 00 00 7e ad be ef or %r4,0x7eadbeef
+ 98: 4f 56 00 00 00 00 00 00 or %r5,%r6
+ a0: 57 20 00 00 00 00 02 9a and %r2,0x29a
+ a8: 57 30 00 00 ff ff fd 66 and %r3,-666
+ b0: 57 40 00 00 7e ad be ef and %r4,0x7eadbeef
+ b8: 5f 56 00 00 00 00 00 00 and %r5,%r6
+ c0: 67 20 00 00 00 00 02 9a lsh %r2,0x29a
+ c8: 67 30 00 00 ff ff fd 66 lsh %r3,-666
+ d0: 67 40 00 00 7e ad be ef lsh %r4,0x7eadbeef
+ d8: 6f 56 00 00 00 00 00 00 lsh %r5,%r6
+ e0: 77 20 00 00 00 00 02 9a rsh %r2,0x29a
+ e8: 77 30 00 00 ff ff fd 66 rsh %r3,-666
+ f0: 77 40 00 00 7e ad be ef rsh %r4,0x7eadbeef
+ f8: 7f 56 00 00 00 00 00 00 rsh %r5,%r6
+ 100: 97 20 00 00 00 00 02 9a mod %r2,0x29a
+ 108: 97 30 00 00 ff ff fd 66 mod %r3,-666
+ 110: 97 40 00 00 7e ad be ef mod %r4,0x7eadbeef
+ 118: 9f 56 00 00 00 00 00 00 mod %r5,%r6
+ 120: a7 20 00 00 00 00 02 9a xor %r2,0x29a
+ 128: a7 30 00 00 ff ff fd 66 xor %r3,-666
+ 130: a7 40 00 00 7e ad be ef xor %r4,0x7eadbeef
+ 138: af 56 00 00 00 00 00 00 xor %r5,%r6
+ 140: b7 20 00 00 00 00 02 9a mov %r2,0x29a
+ 148: b7 30 00 00 ff ff fd 66 mov %r3,-666
+ 150: b7 40 00 00 7e ad be ef mov %r4,0x7eadbeef
+ 158: bf 56 00 00 00 00 00 00 mov %r5,%r6
+ 160: c7 20 00 00 00 00 02 9a arsh %r2,0x29a
+ 168: c7 30 00 00 ff ff fd 66 arsh %r3,-666
+ 170: c7 40 00 00 7e ad be ef arsh %r4,0x7eadbeef
+ 178: cf 56 00 00 00 00 00 00 arsh %r5,%r6
+ 180: 87 20 00 00 00 00 00 00 neg %r2
diff --git a/gas/testsuite/gas/bpf/alu-pseudoc.d b/gas/testsuite/gas/bpf/alu-pseudoc.d
new file mode 100644
index 00000000000..df130699b4f
--- /dev/null
+++ b/gas/testsuite/gas/bpf/alu-pseudoc.d
@@ -0,0 +1,5 @@
+#as: --EL
+#objdump: -dr
+#source: alu-pseudoc.s
+#dump: alu.dump
+#name: eBPF ALU64 instructions, pseudo-c syntax
diff --git a/gas/testsuite/gas/bpf/alu.d b/gas/testsuite/gas/bpf/alu.d
index f54317d7328..764ae440d8f 100644
--- a/gas/testsuite/gas/bpf/alu.d
+++ b/gas/testsuite/gas/bpf/alu.d
@@ -1,58 +1,5 @@
#as: --EL
#objdump: -dr
-#name: eBPF ALU64 instructions
-
-.*: +file format .*bpf.*
-
-Disassembly of section .text:
-
-0+ <.text>:
- 0: 07 02 00 00 9a 02 00 00 add %r2,0x29a
- 8: 07 03 00 00 66 fd ff ff add %r3,-666
- 10: 07 04 00 00 ef be ad 7e add %r4,0x7eadbeef
- 18: 0f 65 00 00 00 00 00 00 add %r5,%r6
- 20: 17 02 00 00 9a 02 00 00 sub %r2,0x29a
- 28: 17 03 00 00 66 fd ff ff sub %r3,-666
- 30: 17 04 00 00 ef be ad 7e sub %r4,0x7eadbeef
- 38: 1f 65 00 00 00 00 00 00 sub %r5,%r6
- 40: 27 02 00 00 9a 02 00 00 mul %r2,0x29a
- 48: 27 03 00 00 66 fd ff ff mul %r3,-666
- 50: 27 04 00 00 ef be ad 7e mul %r4,0x7eadbeef
- 58: 2f 65 00 00 00 00 00 00 mul %r5,%r6
- 60: 37 02 00 00 9a 02 00 00 div %r2,0x29a
- 68: 37 03 00 00 66 fd ff ff div %r3,-666
- 70: 37 04 00 00 ef be ad 7e div %r4,0x7eadbeef
- 78: 3f 65 00 00 00 00 00 00 div %r5,%r6
- 80: 47 02 00 00 9a 02 00 00 or %r2,0x29a
- 88: 47 03 00 00 66 fd ff ff or %r3,-666
- 90: 47 04 00 00 ef be ad 7e or %r4,0x7eadbeef
- 98: 4f 65 00 00 00 00 00 00 or %r5,%r6
- a0: 57 02 00 00 9a 02 00 00 and %r2,0x29a
- a8: 57 03 00 00 66 fd ff ff and %r3,-666
- b0: 57 04 00 00 ef be ad 7e and %r4,0x7eadbeef
- b8: 5f 65 00 00 00 00 00 00 and %r5,%r6
- c0: 67 02 00 00 9a 02 00 00 lsh %r2,0x29a
- c8: 67 03 00 00 66 fd ff ff lsh %r3,-666
- d0: 67 04 00 00 ef be ad 7e lsh %r4,0x7eadbeef
- d8: 6f 65 00 00 00 00 00 00 lsh %r5,%r6
- e0: 77 02 00 00 9a 02 00 00 rsh %r2,0x29a
- e8: 77 03 00 00 66 fd ff ff rsh %r3,-666
- f0: 77 04 00 00 ef be ad 7e rsh %r4,0x7eadbeef
- f8: 7f 65 00 00 00 00 00 00 rsh %r5,%r6
- 100: 97 02 00 00 9a 02 00 00 mod %r2,0x29a
- 108: 97 03 00 00 66 fd ff ff mod %r3,-666
- 110: 97 04 00 00 ef be ad 7e mod %r4,0x7eadbeef
- 118: 9f 65 00 00 00 00 00 00 mod %r5,%r6
- 120: a7 02 00 00 9a 02 00 00 xor %r2,0x29a
- 128: a7 03 00 00 66 fd ff ff xor %r3,-666
- 130: a7 04 00 00 ef be ad 7e xor %r4,0x7eadbeef
- 138: af 65 00 00 00 00 00 00 xor %r5,%r6
- 140: b7 02 00 00 9a 02 00 00 mov %r2,0x29a
- 148: b7 03 00 00 66 fd ff ff mov %r3,-666
- 150: b7 04 00 00 ef be ad 7e mov %r4,0x7eadbeef
- 158: bf 65 00 00 00 00 00 00 mov %r5,%r6
- 160: c7 02 00 00 9a 02 00 00 arsh %r2,0x29a
- 168: c7 03 00 00 66 fd ff ff arsh %r3,-666
- 170: c7 04 00 00 ef be ad 7e arsh %r4,0x7eadbeef
- 178: cf 65 00 00 00 00 00 00 arsh %r5,%r6
- 180: 87 02 00 00 00 00 00 00 neg %r2
+#source: alu.s
+#dump: alu.dump
+#name: eBPF ALU64 instructions, normal syntax
diff --git a/gas/testsuite/gas/bpf/alu.dump b/gas/testsuite/gas/bpf/alu.dump
new file mode 100644
index 00000000000..2acc947654a
--- /dev/null
+++ b/gas/testsuite/gas/bpf/alu.dump
@@ -0,0 +1,54 @@
+.*: +file format .*bpf.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ 0: 07 02 00 00 9a 02 00 00 add %r2,0x29a
+ 8: 07 03 00 00 66 fd ff ff add %r3,-666
+ 10: 07 04 00 00 ef be ad 7e add %r4,0x7eadbeef
+ 18: 0f 65 00 00 00 00 00 00 add %r5,%r6
+ 20: 17 02 00 00 9a 02 00 00 sub %r2,0x29a
+ 28: 17 03 00 00 66 fd ff ff sub %r3,-666
+ 30: 17 04 00 00 ef be ad 7e sub %r4,0x7eadbeef
+ 38: 1f 65 00 00 00 00 00 00 sub %r5,%r6
+ 40: 27 02 00 00 9a 02 00 00 mul %r2,0x29a
+ 48: 27 03 00 00 66 fd ff ff mul %r3,-666
+ 50: 27 04 00 00 ef be ad 7e mul %r4,0x7eadbeef
+ 58: 2f 65 00 00 00 00 00 00 mul %r5,%r6
+ 60: 37 02 00 00 9a 02 00 00 div %r2,0x29a
+ 68: 37 03 00 00 66 fd ff ff div %r3,-666
+ 70: 37 04 00 00 ef be ad 7e div %r4,0x7eadbeef
+ 78: 3f 65 00 00 00 00 00 00 div %r5,%r6
+ 80: 47 02 00 00 9a 02 00 00 or %r2,0x29a
+ 88: 47 03 00 00 66 fd ff ff or %r3,-666
+ 90: 47 04 00 00 ef be ad 7e or %r4,0x7eadbeef
+ 98: 4f 65 00 00 00 00 00 00 or %r5,%r6
+ a0: 57 02 00 00 9a 02 00 00 and %r2,0x29a
+ a8: 57 03 00 00 66 fd ff ff and %r3,-666
+ b0: 57 04 00 00 ef be ad 7e and %r4,0x7eadbeef
+ b8: 5f 65 00 00 00 00 00 00 and %r5,%r6
+ c0: 67 02 00 00 9a 02 00 00 lsh %r2,0x29a
+ c8: 67 03 00 00 66 fd ff ff lsh %r3,-666
+ d0: 67 04 00 00 ef be ad 7e lsh %r4,0x7eadbeef
+ d8: 6f 65 00 00 00 00 00 00 lsh %r5,%r6
+ e0: 77 02 00 00 9a 02 00 00 rsh %r2,0x29a
+ e8: 77 03 00 00 66 fd ff ff rsh %r3,-666
+ f0: 77 04 00 00 ef be ad 7e rsh %r4,0x7eadbeef
+ f8: 7f 65 00 00 00 00 00 00 rsh %r5,%r6
+ 100: 97 02 00 00 9a 02 00 00 mod %r2,0x29a
+ 108: 97 03 00 00 66 fd ff ff mod %r3,-666
+ 110: 97 04 00 00 ef be ad 7e mod %r4,0x7eadbeef
+ 118: 9f 65 00 00 00 00 00 00 mod %r5,%r6
+ 120: a7 02 00 00 9a 02 00 00 xor %r2,0x29a
+ 128: a7 03 00 00 66 fd ff ff xor %r3,-666
+ 130: a7 04 00 00 ef be ad 7e xor %r4,0x7eadbeef
+ 138: af 65 00 00 00 00 00 00 xor %r5,%r6
+ 140: b7 02 00 00 9a 02 00 00 mov %r2,0x29a
+ 148: b7 03 00 00 66 fd ff ff mov %r3,-666
+ 150: b7 04 00 00 ef be ad 7e mov %r4,0x7eadbeef
+ 158: bf 65 00 00 00 00 00 00 mov %r5,%r6
+ 160: c7 02 00 00 9a 02 00 00 arsh %r2,0x29a
+ 168: c7 03 00 00 66 fd ff ff arsh %r3,-666
+ 170: c7 04 00 00 ef be ad 7e arsh %r4,0x7eadbeef
+ 178: cf 65 00 00 00 00 00 00 arsh %r5,%r6
+ 180: 87 02 00 00 00 00 00 00 neg %r2
diff --git a/gas/testsuite/gas/bpf/alu32-be-pseudoc.d b/gas/testsuite/gas/bpf/alu32-be-pseudoc.d
new file mode 100644
index 00000000000..396d7d40603
--- /dev/null
+++ b/gas/testsuite/gas/bpf/alu32-be-pseudoc.d
@@ -0,0 +1,5 @@
+#as: --EB
+#objdump: -dr
+#source: alu32-pseudoc.s
+#dump: alu32-be.dump
+#name: eBPF ALU instructions, big-endian, pseudo-c syntax
diff --git a/gas/testsuite/gas/bpf/alu32-be.d b/gas/testsuite/gas/bpf/alu32-be.d
index 2ad744dc84c..6ed9e556bf4 100644
--- a/gas/testsuite/gas/bpf/alu32-be.d
+++ b/gas/testsuite/gas/bpf/alu32-be.d
@@ -1,66 +1,5 @@
#as: --EB
-#source: alu32.s
-#source: alu32-pseudoc.s
#objdump: -dr
-#name: eBPF ALU instructions, big-endian
-
-.*: +file format .*bpf.*
-
-Disassembly of section .text:
-
-0+ <.text>:
- 0: 04 20 00 00 00 00 02 9a add32 %r2,0x29a
- 8: 04 30 00 00 ff ff fd 66 add32 %r3,-666
- 10: 04 40 00 00 7e ad be ef add32 %r4,0x7eadbeef
- 18: 0c 56 00 00 00 00 00 00 add32 %r5,%r6
- 20: 14 20 00 00 00 00 02 9a sub32 %r2,0x29a
- 28: 14 30 00 00 ff ff fd 66 sub32 %r3,-666
- 30: 14 40 00 00 7e ad be ef sub32 %r4,0x7eadbeef
- 38: 1c 56 00 00 00 00 00 00 sub32 %r5,%r6
- 40: 24 20 00 00 00 00 02 9a mul32 %r2,0x29a
- 48: 24 30 00 00 ff ff fd 66 mul32 %r3,-666
- 50: 24 40 00 00 7e ad be ef mul32 %r4,0x7eadbeef
- 58: 2c 56 00 00 00 00 00 00 mul32 %r5,%r6
- 60: 34 20 00 00 00 00 02 9a div32 %r2,0x29a
- 68: 34 30 00 00 ff ff fd 66 div32 %r3,-666
- 70: 34 40 00 00 7e ad be ef div32 %r4,0x7eadbeef
- 78: 3c 56 00 00 00 00 00 00 div32 %r5,%r6
- 80: 44 20 00 00 00 00 02 9a or32 %r2,0x29a
- 88: 44 30 00 00 ff ff fd 66 or32 %r3,-666
- 90: 44 40 00 00 7e ad be ef or32 %r4,0x7eadbeef
- 98: 4c 56 00 00 00 00 00 00 or32 %r5,%r6
- a0: 54 20 00 00 00 00 02 9a and32 %r2,0x29a
- a8: 54 30 00 00 ff ff fd 66 and32 %r3,-666
- b0: 54 40 00 00 7e ad be ef and32 %r4,0x7eadbeef
- b8: 5c 56 00 00 00 00 00 00 and32 %r5,%r6
- c0: 64 20 00 00 00 00 02 9a lsh32 %r2,0x29a
- c8: 64 30 00 00 ff ff fd 66 lsh32 %r3,-666
- d0: 64 40 00 00 7e ad be ef lsh32 %r4,0x7eadbeef
- d8: 6c 56 00 00 00 00 00 00 lsh32 %r5,%r6
- e0: 74 20 00 00 00 00 02 9a rsh32 %r2,0x29a
- e8: 74 30 00 00 ff ff fd 66 rsh32 %r3,-666
- f0: 74 40 00 00 7e ad be ef rsh32 %r4,0x7eadbeef
- f8: 7c 56 00 00 00 00 00 00 rsh32 %r5,%r6
- 100: 94 20 00 00 00 00 02 9a mod32 %r2,0x29a
- 108: 94 30 00 00 ff ff fd 66 mod32 %r3,-666
- 110: 94 40 00 00 7e ad be ef mod32 %r4,0x7eadbeef
- 118: 9c 56 00 00 00 00 00 00 mod32 %r5,%r6
- 120: a4 20 00 00 00 00 02 9a xor32 %r2,0x29a
- 128: a4 30 00 00 ff ff fd 66 xor32 %r3,-666
- 130: a4 40 00 00 7e ad be ef xor32 %r4,0x7eadbeef
- 138: ac 56 00 00 00 00 00 00 xor32 %r5,%r6
- 140: b4 20 00 00 00 00 02 9a mov32 %r2,0x29a
- 148: b4 30 00 00 ff ff fd 66 mov32 %r3,-666
- 150: b4 40 00 00 7e ad be ef mov32 %r4,0x7eadbeef
- 158: bc 56 00 00 00 00 00 00 mov32 %r5,%r6
- 160: c4 20 00 00 00 00 02 9a arsh32 %r2,0x29a
- 168: c4 30 00 00 ff ff fd 66 arsh32 %r3,-666
- 170: c4 40 00 00 7e ad be ef arsh32 %r4,0x7eadbeef
- 178: cc 56 00 00 00 00 00 00 arsh32 %r5,%r6
- 180: 84 20 00 00 00 00 00 00 neg32 %r2
- 188: d4 90 00 00 00 00 00 10 endle %r9,16
- 190: d4 80 00 00 00 00 00 20 endle %r8,32
- 198: d4 70 00 00 00 00 00 40 endle %r7,64
- 1a0: dc 60 00 00 00 00 00 10 endbe %r6,16
- 1a8: dc 50 00 00 00 00 00 20 endbe %r5,32
- 1b0: dc 40 00 00 00 00 00 40 endbe %r4,64
+#source: alu32-pseudoc.s
+#dump: alu32-be.dump
+#name: eBPF ALU instructions, big-endian, normal syntax
diff --git a/gas/testsuite/gas/bpf/alu32-be.dump b/gas/testsuite/gas/bpf/alu32-be.dump
new file mode 100644
index 00000000000..a224267b584
--- /dev/null
+++ b/gas/testsuite/gas/bpf/alu32-be.dump
@@ -0,0 +1,60 @@
+.*: +file format .*bpf.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ 0: 04 20 00 00 00 00 02 9a add32 %r2,0x29a
+ 8: 04 30 00 00 ff ff fd 66 add32 %r3,-666
+ 10: 04 40 00 00 7e ad be ef add32 %r4,0x7eadbeef
+ 18: 0c 56 00 00 00 00 00 00 add32 %r5,%r6
+ 20: 14 20 00 00 00 00 02 9a sub32 %r2,0x29a
+ 28: 14 30 00 00 ff ff fd 66 sub32 %r3,-666
+ 30: 14 40 00 00 7e ad be ef sub32 %r4,0x7eadbeef
+ 38: 1c 56 00 00 00 00 00 00 sub32 %r5,%r6
+ 40: 24 20 00 00 00 00 02 9a mul32 %r2,0x29a
+ 48: 24 30 00 00 ff ff fd 66 mul32 %r3,-666
+ 50: 24 40 00 00 7e ad be ef mul32 %r4,0x7eadbeef
+ 58: 2c 56 00 00 00 00 00 00 mul32 %r5,%r6
+ 60: 34 20 00 00 00 00 02 9a div32 %r2,0x29a
+ 68: 34 30 00 00 ff ff fd 66 div32 %r3,-666
+ 70: 34 40 00 00 7e ad be ef div32 %r4,0x7eadbeef
+ 78: 3c 56 00 00 00 00 00 00 div32 %r5,%r6
+ 80: 44 20 00 00 00 00 02 9a or32 %r2,0x29a
+ 88: 44 30 00 00 ff ff fd 66 or32 %r3,-666
+ 90: 44 40 00 00 7e ad be ef or32 %r4,0x7eadbeef
+ 98: 4c 56 00 00 00 00 00 00 or32 %r5,%r6
+ a0: 54 20 00 00 00 00 02 9a and32 %r2,0x29a
+ a8: 54 30 00 00 ff ff fd 66 and32 %r3,-666
+ b0: 54 40 00 00 7e ad be ef and32 %r4,0x7eadbeef
+ b8: 5c 56 00 00 00 00 00 00 and32 %r5,%r6
+ c0: 64 20 00 00 00 00 02 9a lsh32 %r2,0x29a
+ c8: 64 30 00 00 ff ff fd 66 lsh32 %r3,-666
+ d0: 64 40 00 00 7e ad be ef lsh32 %r4,0x7eadbeef
+ d8: 6c 56 00 00 00 00 00 00 lsh32 %r5,%r6
+ e0: 74 20 00 00 00 00 02 9a rsh32 %r2,0x29a
+ e8: 74 30 00 00 ff ff fd 66 rsh32 %r3,-666
+ f0: 74 40 00 00 7e ad be ef rsh32 %r4,0x7eadbeef
+ f8: 7c 56 00 00 00 00 00 00 rsh32 %r5,%r6
+ 100: 94 20 00 00 00 00 02 9a mod32 %r2,0x29a
+ 108: 94 30 00 00 ff ff fd 66 mod32 %r3,-666
+ 110: 94 40 00 00 7e ad be ef mod32 %r4,0x7eadbeef
+ 118: 9c 56 00 00 00 00 00 00 mod32 %r5,%r6
+ 120: a4 20 00 00 00 00 02 9a xor32 %r2,0x29a
+ 128: a4 30 00 00 ff ff fd 66 xor32 %r3,-666
+ 130: a4 40 00 00 7e ad be ef xor32 %r4,0x7eadbeef
+ 138: ac 56 00 00 00 00 00 00 xor32 %r5,%r6
+ 140: b4 20 00 00 00 00 02 9a mov32 %r2,0x29a
+ 148: b4 30 00 00 ff ff fd 66 mov32 %r3,-666
+ 150: b4 40 00 00 7e ad be ef mov32 %r4,0x7eadbeef
+ 158: bc 56 00 00 00 00 00 00 mov32 %r5,%r6
+ 160: c4 20 00 00 00 00 02 9a arsh32 %r2,0x29a
+ 168: c4 30 00 00 ff ff fd 66 arsh32 %r3,-666
+ 170: c4 40 00 00 7e ad be ef arsh32 %r4,0x7eadbeef
+ 178: cc 56 00 00 00 00 00 00 arsh32 %r5,%r6
+ 180: 84 20 00 00 00 00 00 00 neg32 %r2
+ 188: d4 90 00 00 00 00 00 10 endle %r9,16
+ 190: d4 80 00 00 00 00 00 20 endle %r8,32
+ 198: d4 70 00 00 00 00 00 40 endle %r7,64
+ 1a0: dc 60 00 00 00 00 00 10 endbe %r6,16
+ 1a8: dc 50 00 00 00 00 00 20 endbe %r5,32
+ 1b0: dc 40 00 00 00 00 00 40 endbe %r4,64
diff --git a/gas/testsuite/gas/bpf/alu32-pseudoc.d b/gas/testsuite/gas/bpf/alu32-pseudoc.d
new file mode 100644
index 00000000000..98b99215b27
--- /dev/null
+++ b/gas/testsuite/gas/bpf/alu32-pseudoc.d
@@ -0,0 +1,5 @@
+#as: --EL
+#objdump: -dr
+#source: alu32-pseudoc.s
+#dump: alu32.dump
+#name: eBPF ALU instructions, pseudo-c syntax
diff --git a/gas/testsuite/gas/bpf/alu32.d b/gas/testsuite/gas/bpf/alu32.d
index ac5c8341e52..87efc20ba30 100644
--- a/gas/testsuite/gas/bpf/alu32.d
+++ b/gas/testsuite/gas/bpf/alu32.d
@@ -1,66 +1,5 @@
#as: --EL
#objdump: -dr
#source: alu32.s
-#source: alu32-pseudoc.s
-#name: eBPF ALU instructions
-
-.*: +file format .*bpf.*
-
-Disassembly of section .text:
-
-0+ <.text>:
- 0: 04 02 00 00 9a 02 00 00 add32 %r2,0x29a
- 8: 04 03 00 00 66 fd ff ff add32 %r3,-666
- 10: 04 04 00 00 ef be ad 7e add32 %r4,0x7eadbeef
- 18: 0c 65 00 00 00 00 00 00 add32 %r5,%r6
- 20: 14 02 00 00 9a 02 00 00 sub32 %r2,0x29a
- 28: 14 03 00 00 66 fd ff ff sub32 %r3,-666
- 30: 14 04 00 00 ef be ad 7e sub32 %r4,0x7eadbeef
- 38: 1c 65 00 00 00 00 00 00 sub32 %r5,%r6
- 40: 24 02 00 00 9a 02 00 00 mul32 %r2,0x29a
- 48: 24 03 00 00 66 fd ff ff mul32 %r3,-666
- 50: 24 04 00 00 ef be ad 7e mul32 %r4,0x7eadbeef
- 58: 2c 65 00 00 00 00 00 00 mul32 %r5,%r6
- 60: 34 02 00 00 9a 02 00 00 div32 %r2,0x29a
- 68: 34 03 00 00 66 fd ff ff div32 %r3,-666
- 70: 34 04 00 00 ef be ad 7e div32 %r4,0x7eadbeef
- 78: 3c 65 00 00 00 00 00 00 div32 %r5,%r6
- 80: 44 02 00 00 9a 02 00 00 or32 %r2,0x29a
- 88: 44 03 00 00 66 fd ff ff or32 %r3,-666
- 90: 44 04 00 00 ef be ad 7e or32 %r4,0x7eadbeef
- 98: 4c 65 00 00 00 00 00 00 or32 %r5,%r6
- a0: 54 02 00 00 9a 02 00 00 and32 %r2,0x29a
- a8: 54 03 00 00 66 fd ff ff and32 %r3,-666
- b0: 54 04 00 00 ef be ad 7e and32 %r4,0x7eadbeef
- b8: 5c 65 00 00 00 00 00 00 and32 %r5,%r6
- c0: 64 02 00 00 9a 02 00 00 lsh32 %r2,0x29a
- c8: 64 03 00 00 66 fd ff ff lsh32 %r3,-666
- d0: 64 04 00 00 ef be ad 7e lsh32 %r4,0x7eadbeef
- d8: 6c 65 00 00 00 00 00 00 lsh32 %r5,%r6
- e0: 74 02 00 00 9a 02 00 00 rsh32 %r2,0x29a
- e8: 74 03 00 00 66 fd ff ff rsh32 %r3,-666
- f0: 74 04 00 00 ef be ad 7e rsh32 %r4,0x7eadbeef
- f8: 7c 65 00 00 00 00 00 00 rsh32 %r5,%r6
- 100: 94 02 00 00 9a 02 00 00 mod32 %r2,0x29a
- 108: 94 03 00 00 66 fd ff ff mod32 %r3,-666
- 110: 94 04 00 00 ef be ad 7e mod32 %r4,0x7eadbeef
- 118: 9c 65 00 00 00 00 00 00 mod32 %r5,%r6
- 120: a4 02 00 00 9a 02 00 00 xor32 %r2,0x29a
- 128: a4 03 00 00 66 fd ff ff xor32 %r3,-666
- 130: a4 04 00 00 ef be ad 7e xor32 %r4,0x7eadbeef
- 138: ac 65 00 00 00 00 00 00 xor32 %r5,%r6
- 140: b4 02 00 00 9a 02 00 00 mov32 %r2,0x29a
- 148: b4 03 00 00 66 fd ff ff mov32 %r3,-666
- 150: b4 04 00 00 ef be ad 7e mov32 %r4,0x7eadbeef
- 158: bc 65 00 00 00 00 00 00 mov32 %r5,%r6
- 160: c4 02 00 00 9a 02 00 00 arsh32 %r2,0x29a
- 168: c4 03 00 00 66 fd ff ff arsh32 %r3,-666
- 170: c4 04 00 00 ef be ad 7e arsh32 %r4,0x7eadbeef
- 178: cc 65 00 00 00 00 00 00 arsh32 %r5,%r6
- 180: 84 02 00 00 00 00 00 00 neg32 %r2
- 188: d4 09 00 00 10 00 00 00 endle %r9,16
- 190: d4 08 00 00 20 00 00 00 endle %r8,32
- 198: d4 07 00 00 40 00 00 00 endle %r7,64
- 1a0: dc 06 00 00 10 00 00 00 endbe %r6,16
- 1a8: dc 05 00 00 20 00 00 00 endbe %r5,32
- 1b0: dc 04 00 00 40 00 00 00 endbe %r4,64
+#dump: alu32.dump
+#name: eBPF ALU instructions, normal syntax
diff --git a/gas/testsuite/gas/bpf/alu32.dump b/gas/testsuite/gas/bpf/alu32.dump
new file mode 100644
index 00000000000..223f74f1f5d
--- /dev/null
+++ b/gas/testsuite/gas/bpf/alu32.dump
@@ -0,0 +1,60 @@
+.*: +file format .*bpf.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ 0: 04 02 00 00 9a 02 00 00 add32 %r2,0x29a
+ 8: 04 03 00 00 66 fd ff ff add32 %r3,-666
+ 10: 04 04 00 00 ef be ad 7e add32 %r4,0x7eadbeef
+ 18: 0c 65 00 00 00 00 00 00 add32 %r5,%r6
+ 20: 14 02 00 00 9a 02 00 00 sub32 %r2,0x29a
+ 28: 14 03 00 00 66 fd ff ff sub32 %r3,-666
+ 30: 14 04 00 00 ef be ad 7e sub32 %r4,0x7eadbeef
+ 38: 1c 65 00 00 00 00 00 00 sub32 %r5,%r6
+ 40: 24 02 00 00 9a 02 00 00 mul32 %r2,0x29a
+ 48: 24 03 00 00 66 fd ff ff mul32 %r3,-666
+ 50: 24 04 00 00 ef be ad 7e mul32 %r4,0x7eadbeef
+ 58: 2c 65 00 00 00 00 00 00 mul32 %r5,%r6
+ 60: 34 02 00 00 9a 02 00 00 div32 %r2,0x29a
+ 68: 34 03 00 00 66 fd ff ff div32 %r3,-666
+ 70: 34 04 00 00 ef be ad 7e div32 %r4,0x7eadbeef
+ 78: 3c 65 00 00 00 00 00 00 div32 %r5,%r6
+ 80: 44 02 00 00 9a 02 00 00 or32 %r2,0x29a
+ 88: 44 03 00 00 66 fd ff ff or32 %r3,-666
+ 90: 44 04 00 00 ef be ad 7e or32 %r4,0x7eadbeef
+ 98: 4c 65 00 00 00 00 00 00 or32 %r5,%r6
+ a0: 54 02 00 00 9a 02 00 00 and32 %r2,0x29a
+ a8: 54 03 00 00 66 fd ff ff and32 %r3,-666
+ b0: 54 04 00 00 ef be ad 7e and32 %r4,0x7eadbeef
+ b8: 5c 65 00 00 00 00 00 00 and32 %r5,%r6
+ c0: 64 02 00 00 9a 02 00 00 lsh32 %r2,0x29a
+ c8: 64 03 00 00 66 fd ff ff lsh32 %r3,-666
+ d0: 64 04 00 00 ef be ad 7e lsh32 %r4,0x7eadbeef
+ d8: 6c 65 00 00 00 00 00 00 lsh32 %r5,%r6
+ e0: 74 02 00 00 9a 02 00 00 rsh32 %r2,0x29a
+ e8: 74 03 00 00 66 fd ff ff rsh32 %r3,-666
+ f0: 74 04 00 00 ef be ad 7e rsh32 %r4,0x7eadbeef
+ f8: 7c 65 00 00 00 00 00 00 rsh32 %r5,%r6
+ 100: 94 02 00 00 9a 02 00 00 mod32 %r2,0x29a
+ 108: 94 03 00 00 66 fd ff ff mod32 %r3,-666
+ 110: 94 04 00 00 ef be ad 7e mod32 %r4,0x7eadbeef
+ 118: 9c 65 00 00 00 00 00 00 mod32 %r5,%r6
+ 120: a4 02 00 00 9a 02 00 00 xor32 %r2,0x29a
+ 128: a4 03 00 00 66 fd ff ff xor32 %r3,-666
+ 130: a4 04 00 00 ef be ad 7e xor32 %r4,0x7eadbeef
+ 138: ac 65 00 00 00 00 00 00 xor32 %r5,%r6
+ 140: b4 02 00 00 9a 02 00 00 mov32 %r2,0x29a
+ 148: b4 03 00 00 66 fd ff ff mov32 %r3,-666
+ 150: b4 04 00 00 ef be ad 7e mov32 %r4,0x7eadbeef
+ 158: bc 65 00 00 00 00 00 00 mov32 %r5,%r6
+ 160: c4 02 00 00 9a 02 00 00 arsh32 %r2,0x29a
+ 168: c4 03 00 00 66 fd ff ff arsh32 %r3,-666
+ 170: c4 04 00 00 ef be ad 7e arsh32 %r4,0x7eadbeef
+ 178: cc 65 00 00 00 00 00 00 arsh32 %r5,%r6
+ 180: 84 02 00 00 00 00 00 00 neg32 %r2
+ 188: d4 09 00 00 10 00 00 00 endle %r9,16
+ 190: d4 08 00 00 20 00 00 00 endle %r8,32
+ 198: d4 07 00 00 40 00 00 00 endle %r7,64
+ 1a0: dc 06 00 00 10 00 00 00 endbe %r6,16
+ 1a8: dc 05 00 00 20 00 00 00 endbe %r5,32
+ 1b0: dc 04 00 00 40 00 00 00 endbe %r4,64
diff --git a/gas/testsuite/gas/bpf/atomic-pseudoc.d b/gas/testsuite/gas/bpf/atomic-pseudoc.d
new file mode 100644
index 00000000000..3b0e5c567be
--- /dev/null
+++ b/gas/testsuite/gas/bpf/atomic-pseudoc.d
@@ -0,0 +1,5 @@
+#as: --EL
+#objdump: -dr
+#source: atomic-pseudoc.s
+#dump: atomic.dump
+#name: eBPF atomic instructions, normal syntax
diff --git a/gas/testsuite/gas/bpf/atomic.d b/gas/testsuite/gas/bpf/atomic.d
index e22d54283de..c48ba9aabda 100644
--- a/gas/testsuite/gas/bpf/atomic.d
+++ b/gas/testsuite/gas/bpf/atomic.d
@@ -1,13 +1,5 @@
#as: --EL
#objdump: -dr
#source: atomic.s
-#source: atomic-pseudoc.s
-#name: eBPF atomic instructions
-
-.*: +file format .*bpf.*
-
-Disassembly of section .text:
-
-0+ <.text>:
- 0: db 21 ef 1e 00 00 00 00 xadddw \[%r1\+0x1eef\],%r2
- 8: c3 21 ef 1e 00 00 00 00 xaddw \[%r1\+0x1eef\],%r2
+#dump: atomic.dump
+#name: eBPF atomic instructions, normal syntax
diff --git a/gas/testsuite/gas/bpf/atomic.dump b/gas/testsuite/gas/bpf/atomic.dump
new file mode 100644
index 00000000000..45dd25bafc4
--- /dev/null
+++ b/gas/testsuite/gas/bpf/atomic.dump
@@ -0,0 +1,7 @@
+.*: +file format .*bpf.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ 0: db 21 ef 1e 00 00 00 00 xadddw \[%r1\+0x1eef\],%r2
+ 8: c3 21 ef 1e 00 00 00 00 xaddw \[%r1\+0x1eef\],%r2
diff --git a/gas/testsuite/gas/bpf/bpf.exp b/gas/testsuite/gas/bpf/bpf.exp
index 1cdaf6dcc08..5d91805f478 100644
--- a/gas/testsuite/gas/bpf/bpf.exp
+++ b/gas/testsuite/gas/bpf/bpf.exp
@@ -19,20 +19,30 @@
if {[istarget bpf*-*-*]} {
run_dump_test lddw
+ run_dump_test lddw-pseudoc
run_dump_test alu
+ run_dump_test alu-pseudoc
run_dump_test alu32
+ run_dump_test alu32-pseudoc
run_dump_test mem
+ run_dump_test mem-pseudoc
run_dump_test jump
+ run_dump_test jump-pseudoc
run_dump_test jump32
+ run_dump_test jump32-pseudoc
run_dump_test call
run_dump_test exit
run_dump_test atomic
+ run_dump_test atomic-pseudoc
run_dump_test data
run_dump_test pseudoc-normal
run_dump_test lddw-be
+ run_dump_test lddw-be-pseudoc
run_dump_test alu-be
+ run_dump_test alu-be-pseudoc
run_dump_test alu32-be
+ run_dump_test alu32-be-pseudoc
run_dump_test mem-be
run_dump_test jump-be
run_dump_test call-be
@@ -42,6 +52,7 @@ if {[istarget bpf*-*-*]} {
run_dump_test pseudoc-normal-be
run_dump_test indcall-1
+ run_dump_test indcall-1-pseudoc
run_list_test indcall-bad-1
run_dump_test alu-xbpf
diff --git a/gas/testsuite/gas/bpf/indcall-1-pseudoc.d b/gas/testsuite/gas/bpf/indcall-1-pseudoc.d
new file mode 100644
index 00000000000..b04e656bd82
--- /dev/null
+++ b/gas/testsuite/gas/bpf/indcall-1-pseudoc.d
@@ -0,0 +1,5 @@
+#as: -mxbpf --EL
+#objdump: -mxbpf -dr
+#source: indcall-1-pseudoc.s
+#dump: indcall-1.dump
+#name: BPF indirect call 1, pseudoc syntax
diff --git a/gas/testsuite/gas/bpf/indcall-1-pseudoc.s b/gas/testsuite/gas/bpf/indcall-1-pseudoc.s
index ede3eac58ef..2042697f15b 100644
--- a/gas/testsuite/gas/bpf/indcall-1-pseudoc.s
+++ b/gas/testsuite/gas/bpf/indcall-1-pseudoc.s
@@ -5,7 +5,7 @@ main:
r0 = 1
r1 = 1
r2 = 2
- r6 = 56 ll
+ r6 = bar ll
callx r6
exit
bar:
diff --git a/gas/testsuite/gas/bpf/indcall-1.d b/gas/testsuite/gas/bpf/indcall-1.d
index 158c75438d7..e04b98b175b 100644
--- a/gas/testsuite/gas/bpf/indcall-1.d
+++ b/gas/testsuite/gas/bpf/indcall-1.d
@@ -1,24 +1,5 @@
#as: -mxbpf --EL
#objdump: -mxbpf -dr
#source: indcall-1.s
-#source: indcall-1-pseudoc.s
-#name: BPF indirect call 1
-
-.*: +file format .*bpf.*
-
-Disassembly of section \.text:
-
-0000000000000000 <main>:
- 0: b7 00 00 00 01 00 00 00 mov %r0,1
- 8: b7 01 00 00 01 00 00 00 mov %r1,1
- 10: b7 02 00 00 02 00 00 00 mov %r2,2
- 18: 18 06 00 00 38 00 00 00 lddw %r6,0x38
- 20: 00 00 00 00 00 00 00 00[ ]*
- 18: R_BPF_64_64 .text
- 28: 8d 06 00 00 00 00 00 00 call %r6
- 30: 95 00 00 00 00 00 00 00 exit
-
-0000000000000038 <bar>:
- 38: b7 00 00 00 00 00 00 00 mov %r0,0
- 40: 95 00 00 00 00 00 00 00 exit
-#pass
+#dump: indcall-1.dump
+#name: BPF indirect call 1, normal syntax
diff --git a/gas/testsuite/gas/bpf/indcall-1.dump b/gas/testsuite/gas/bpf/indcall-1.dump
new file mode 100644
index 00000000000..7793574ac35
--- /dev/null
+++ b/gas/testsuite/gas/bpf/indcall-1.dump
@@ -0,0 +1,18 @@
+.*: +file format .*bpf.*
+
+Disassembly of section \.text:
+
+0000000000000000 <main>:
+ 0: b7 00 00 00 01 00 00 00 mov %r0,1
+ 8: b7 01 00 00 01 00 00 00 mov %r1,1
+ 10: b7 02 00 00 02 00 00 00 mov %r2,2
+ 18: 18 06 00 00 38 00 00 00 lddw %r6,0x38
+ 20: 00 00 00 00 00 00 00 00[ ]*
+ 18: R_BPF_64_64 .text
+ 28: 8d 06 00 00 00 00 00 00 call %r6
+ 30: 95 00 00 00 00 00 00 00 exit
+
+0000000000000038 <bar>:
+ 38: b7 00 00 00 00 00 00 00 mov %r0,0
+ 40: 95 00 00 00 00 00 00 00 exit
+#pass
diff --git a/gas/testsuite/gas/bpf/jump-pseudoc.d b/gas/testsuite/gas/bpf/jump-pseudoc.d
new file mode 100644
index 00000000000..bc172665af8
--- /dev/null
+++ b/gas/testsuite/gas/bpf/jump-pseudoc.d
@@ -0,0 +1,5 @@
+#as: --EL
+#objdump: -dr
+#source: jump-pseudoc.s
+#dump: jump.dump
+#name: eBPF JUMP instructions, pseudoc syntax
diff --git a/gas/testsuite/gas/bpf/jump.d b/gas/testsuite/gas/bpf/jump.d
index 903f70e8043..082b3c3018e 100644
--- a/gas/testsuite/gas/bpf/jump.d
+++ b/gas/testsuite/gas/bpf/jump.d
@@ -1,33 +1,5 @@
#as: --EL
#objdump: -dr
#source: jump.s
-#source: jump-pseudoc.s
-#name: eBPF JUMP instructions
-
-.*: +file format .*bpf.*
-
-Disassembly of section .text:
-
-0+ <.text>:
- 0: 05 00 03 00 00 00 00 00 ja 3
- 8: 0f 11 00 00 00 00 00 00 add %r1,%r1
- 10: 15 03 01 00 03 00 00 00 jeq %r3,3,1
- 18: 1d 43 00 00 00 00 00 00 jeq %r3,%r4,0
- 20: 35 03 fd ff 03 00 00 00 jge %r3,3,-3
- 28: 3d 43 fc ff 00 00 00 00 jge %r3,%r4,-4
- 30: a5 03 01 00 03 00 00 00 jlt %r3,3,1
- 38: ad 43 00 00 00 00 00 00 jlt %r3,%r4,0
- 40: b5 03 01 00 03 00 00 00 jle %r3,3,1
- 48: bd 43 00 00 00 00 00 00 jle %r3,%r4,0
- 50: 45 03 01 00 03 00 00 00 jset %r3,3,1
- 58: 4d 43 00 00 00 00 00 00 jset %r3,%r4,0
- 60: 55 03 01 00 03 00 00 00 jne %r3,3,1
- 68: 5d 43 00 00 00 00 00 00 jne %r3,%r4,0
- 70: 65 03 01 00 03 00 00 00 jsgt %r3,3,1
- 78: 6d 43 00 00 00 00 00 00 jsgt %r3,%r4,0
- 80: 75 03 01 00 03 00 00 00 jsge %r3,3,1
- 88: 7d 43 00 00 00 00 00 00 jsge %r3,%r4,0
- 90: c5 03 01 00 03 00 00 00 jslt %r3,3,1
- 98: cd 43 00 00 00 00 00 00 jslt %r3,%r4,0
- a0: d5 03 01 00 03 00 00 00 jsle %r3,3,1
- a8: dd 43 00 00 00 00 00 00 jsle %r3,%r4,0
+#dump: jump.dump
+#name: eBPF JUMP instructions, normal syntax
diff --git a/gas/testsuite/gas/bpf/jump.dump b/gas/testsuite/gas/bpf/jump.dump
new file mode 100644
index 00000000000..6baad65bfa5
--- /dev/null
+++ b/gas/testsuite/gas/bpf/jump.dump
@@ -0,0 +1,27 @@
+.*: +file format .*bpf.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ 0: 05 00 03 00 00 00 00 00 ja 3
+ 8: 0f 11 00 00 00 00 00 00 add %r1,%r1
+ 10: 15 03 01 00 03 00 00 00 jeq %r3,3,1
+ 18: 1d 43 00 00 00 00 00 00 jeq %r3,%r4,0
+ 20: 35 03 fd ff 03 00 00 00 jge %r3,3,-3
+ 28: 3d 43 fc ff 00 00 00 00 jge %r3,%r4,-4
+ 30: a5 03 01 00 03 00 00 00 jlt %r3,3,1
+ 38: ad 43 00 00 00 00 00 00 jlt %r3,%r4,0
+ 40: b5 03 01 00 03 00 00 00 jle %r3,3,1
+ 48: bd 43 00 00 00 00 00 00 jle %r3,%r4,0
+ 50: 45 03 01 00 03 00 00 00 jset %r3,3,1
+ 58: 4d 43 00 00 00 00 00 00 jset %r3,%r4,0
+ 60: 55 03 01 00 03 00 00 00 jne %r3,3,1
+ 68: 5d 43 00 00 00 00 00 00 jne %r3,%r4,0
+ 70: 65 03 01 00 03 00 00 00 jsgt %r3,3,1
+ 78: 6d 43 00 00 00 00 00 00 jsgt %r3,%r4,0
+ 80: 75 03 01 00 03 00 00 00 jsge %r3,3,1
+ 88: 7d 43 00 00 00 00 00 00 jsge %r3,%r4,0
+ 90: c5 03 01 00 03 00 00 00 jslt %r3,3,1
+ 98: cd 43 00 00 00 00 00 00 jslt %r3,%r4,0
+ a0: d5 03 01 00 03 00 00 00 jsle %r3,3,1
+ a8: dd 43 00 00 00 00 00 00 jsle %r3,%r4,0
diff --git a/gas/testsuite/gas/bpf/jump32-pseudoc.d b/gas/testsuite/gas/bpf/jump32-pseudoc.d
new file mode 100644
index 00000000000..55fb97b82db
--- /dev/null
+++ b/gas/testsuite/gas/bpf/jump32-pseudoc.d
@@ -0,0 +1,5 @@
+#as: --EL
+#objdump: -dr
+#source: jump32-pseudoc.s
+#dump: jump32.dump
+#name: eBPF JUMP32 instructions, pseudoc syntax
diff --git a/gas/testsuite/gas/bpf/jump32.d b/gas/testsuite/gas/bpf/jump32.d
index ae8683dd69b..c5efb41cc08 100644
--- a/gas/testsuite/gas/bpf/jump32.d
+++ b/gas/testsuite/gas/bpf/jump32.d
@@ -1,33 +1,5 @@
#as: --EL
#objdump: -dr
#source: jump32.s
-#source: jump32-pseudoc.s
-#name: eBPF JUMP32 instructions
-
-.*: +file format .*bpf.*
-
-Disassembly of section .text:
-
-0+ <.text>:
- 0: 05 00 03 00 00 00 00 00 ja 3
- 8: 0f 11 00 00 00 00 00 00 add %r1,%r1
- 10: 16 03 01 00 03 00 00 00 jeq32 %r3,3,1
- 18: 1e 43 00 00 00 00 00 00 jeq32 %r3,%r4,0
- 20: 36 03 fd ff 03 00 00 00 jge32 %r3,3,-3
- 28: 3e 43 fc ff 00 00 00 00 jge32 %r3,%r4,-4
- 30: a6 03 01 00 03 00 00 00 jlt32 %r3,3,1
- 38: ae 43 00 00 00 00 00 00 jlt32 %r3,%r4,0
- 40: b6 03 01 00 03 00 00 00 jle32 %r3,3,1
- 48: be 43 00 00 00 00 00 00 jle32 %r3,%r4,0
- 50: 46 03 01 00 03 00 00 00 jset32 %r3,3,1
- 58: 4e 43 00 00 00 00 00 00 jset32 %r3,%r4,0
- 60: 56 03 01 00 03 00 00 00 jne32 %r3,3,1
- 68: 5e 43 00 00 00 00 00 00 jne32 %r3,%r4,0
- 70: 66 03 01 00 03 00 00 00 jsgt32 %r3,3,1
- 78: 6e 43 00 00 00 00 00 00 jsgt32 %r3,%r4,0
- 80: 76 03 01 00 03 00 00 00 jsge32 %r3,3,1
- 88: 7e 43 00 00 00 00 00 00 jsge32 %r3,%r4,0
- 90: c6 03 01 00 03 00 00 00 jslt32 %r3,3,1
- 98: ce 43 00 00 00 00 00 00 jslt32 %r3,%r4,0
- a0: d6 03 01 00 03 00 00 00 jsle32 %r3,3,1
- a8: de 43 00 00 00 00 00 00 jsle32 %r3,%r4,0
+#dump: jump32.dump
+#name: eBPF JUMP32 instructions, normal syntax
diff --git a/gas/testsuite/gas/bpf/jump32.dump b/gas/testsuite/gas/bpf/jump32.dump
new file mode 100644
index 00000000000..d99b92b3222
--- /dev/null
+++ b/gas/testsuite/gas/bpf/jump32.dump
@@ -0,0 +1,27 @@
+.*: +file format .*bpf.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ 0: 05 00 03 00 00 00 00 00 ja 3
+ 8: 0f 11 00 00 00 00 00 00 add %r1,%r1
+ 10: 16 03 01 00 03 00 00 00 jeq32 %r3,3,1
+ 18: 1e 43 00 00 00 00 00 00 jeq32 %r3,%r4,0
+ 20: 36 03 fd ff 03 00 00 00 jge32 %r3,3,-3
+ 28: 3e 43 fc ff 00 00 00 00 jge32 %r3,%r4,-4
+ 30: a6 03 01 00 03 00 00 00 jlt32 %r3,3,1
+ 38: ae 43 00 00 00 00 00 00 jlt32 %r3,%r4,0
+ 40: b6 03 01 00 03 00 00 00 jle32 %r3,3,1
+ 48: be 43 00 00 00 00 00 00 jle32 %r3,%r4,0
+ 50: 46 03 01 00 03 00 00 00 jset32 %r3,3,1
+ 58: 4e 43 00 00 00 00 00 00 jset32 %r3,%r4,0
+ 60: 56 03 01 00 03 00 00 00 jne32 %r3,3,1
+ 68: 5e 43 00 00 00 00 00 00 jne32 %r3,%r4,0
+ 70: 66 03 01 00 03 00 00 00 jsgt32 %r3,3,1
+ 78: 6e 43 00 00 00 00 00 00 jsgt32 %r3,%r4,0
+ 80: 76 03 01 00 03 00 00 00 jsge32 %r3,3,1
+ 88: 7e 43 00 00 00 00 00 00 jsge32 %r3,%r4,0
+ 90: c6 03 01 00 03 00 00 00 jslt32 %r3,3,1
+ 98: ce 43 00 00 00 00 00 00 jslt32 %r3,%r4,0
+ a0: d6 03 01 00 03 00 00 00 jsle32 %r3,3,1
+ a8: de 43 00 00 00 00 00 00 jsle32 %r3,%r4,0
diff --git a/gas/testsuite/gas/bpf/lddw-be-pseudoc.d b/gas/testsuite/gas/bpf/lddw-be-pseudoc.d
new file mode 100644
index 00000000000..e7b477ac4ca
--- /dev/null
+++ b/gas/testsuite/gas/bpf/lddw-be-pseudoc.d
@@ -0,0 +1,5 @@
+#as: --EB
+#source: lddw-pseudoc.s
+#objdump: -dr
+#dump: lddw-be.dump
+#name: eBPF LDDW, big-endian, pseudoc syntax
diff --git a/gas/testsuite/gas/bpf/lddw-be.d b/gas/testsuite/gas/bpf/lddw-be.d
index b9e60457cde..cf1bfba9b3d 100644
--- a/gas/testsuite/gas/bpf/lddw-be.d
+++ b/gas/testsuite/gas/bpf/lddw-be.d
@@ -1,19 +1,5 @@
#as: --EB
#source: lddw.s
-#source: lddw-pseudoc.s
#objdump: -dr
-#name: eBPF LDDW, big-endian
-
-.*: +file format .*bpf.*
-
-Disassembly of section .text:
-
-0+ <.text>:
- 0: 18 30 00 00 00 00 00 01 lddw %r3,1
- 8: 00 00 00 00 00 00 00 00
- 10: 18 40 00 00 de ad be ef lddw %r4,0xdeadbeef
- 18: 00 00 00 00 00 00 00 00
- 20: 18 50 00 00 55 66 77 88 lddw %r5,0x1122334455667788
- 28: 00 00 00 00 11 22 33 44
- 30: 18 60 00 00 ff ff ff fe lddw %r6,-2
- 38: 00 00 00 00 ff ff ff ff
+#dump: lddw-be.dump
+#name: eBPF LDDW, big-endian, normal syntax
diff --git a/gas/testsuite/gas/bpf/lddw-be.dump b/gas/testsuite/gas/bpf/lddw-be.dump
new file mode 100644
index 00000000000..4de10f81fda
--- /dev/null
+++ b/gas/testsuite/gas/bpf/lddw-be.dump
@@ -0,0 +1,13 @@
+.*: +file format .*bpf.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ 0: 18 30 00 00 00 00 00 01 lddw %r3,1
+ 8: 00 00 00 00 00 00 00 00
+ 10: 18 40 00 00 de ad be ef lddw %r4,0xdeadbeef
+ 18: 00 00 00 00 00 00 00 00
+ 20: 18 50 00 00 55 66 77 88 lddw %r5,0x1122334455667788
+ 28: 00 00 00 00 11 22 33 44
+ 30: 18 60 00 00 ff ff ff fe lddw %r6,-2
+ 38: 00 00 00 00 ff ff ff ff
diff --git a/gas/testsuite/gas/bpf/lddw-pseudoc.d b/gas/testsuite/gas/bpf/lddw-pseudoc.d
new file mode 100644
index 00000000000..838e012be0b
--- /dev/null
+++ b/gas/testsuite/gas/bpf/lddw-pseudoc.d
@@ -0,0 +1,5 @@
+#as: --EL
+#objdump: -dr
+#source: lddw-pseudoc.s
+#dump: lddw.dump
+#name: eBPF LDDW, pseudoc syntax
diff --git a/gas/testsuite/gas/bpf/lddw.d b/gas/testsuite/gas/bpf/lddw.d
index 042e4dead30..82ff1b47bc4 100644
--- a/gas/testsuite/gas/bpf/lddw.d
+++ b/gas/testsuite/gas/bpf/lddw.d
@@ -1,19 +1,5 @@
#as: --EL
#objdump: -dr
#source: lddw.s
-#source: lddw-pseudoc.s
-#name: eBPF LDDW
-
-.*: +file format .*bpf.*
-
-Disassembly of section .text:
-
-0+ <.text>:
- 0: 18 03 00 00 01 00 00 00 lddw %r3,1
- 8: 00 00 00 00 00 00 00 00
- 10: 18 04 00 00 ef be ad de lddw %r4,0xdeadbeef
- 18: 00 00 00 00 00 00 00 00
- 20: 18 05 00 00 88 77 66 55 lddw %r5,0x1122334455667788
- 28: 00 00 00 00 44 33 22 11
- 30: 18 06 00 00 fe ff ff ff lddw %r6,-2
- 38: 00 00 00 00 ff ff ff ff
+#dump: lddw.dump
+#name: eBPF LDDW, normal syntax
diff --git a/gas/testsuite/gas/bpf/lddw.dump b/gas/testsuite/gas/bpf/lddw.dump
new file mode 100644
index 00000000000..9f1485d5fa6
--- /dev/null
+++ b/gas/testsuite/gas/bpf/lddw.dump
@@ -0,0 +1,13 @@
+.*: +file format .*bpf.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ 0: 18 03 00 00 01 00 00 00 lddw %r3,1
+ 8: 00 00 00 00 00 00 00 00
+ 10: 18 04 00 00 ef be ad de lddw %r4,0xdeadbeef
+ 18: 00 00 00 00 00 00 00 00
+ 20: 18 05 00 00 88 77 66 55 lddw %r5,0x1122334455667788
+ 28: 00 00 00 00 44 33 22 11
+ 30: 18 06 00 00 fe ff ff ff lddw %r6,-2
+ 38: 00 00 00 00 ff ff ff ff
diff --git a/gas/testsuite/gas/bpf/mem-pseudoc.d b/gas/testsuite/gas/bpf/mem-pseudoc.d
new file mode 100644
index 00000000000..ef5b8957d64
--- /dev/null
+++ b/gas/testsuite/gas/bpf/mem-pseudoc.d
@@ -0,0 +1,5 @@
+#as: --EL
+#objdump: -dr
+#source: mem-pseudoc.s
+#dump: mem.dump
+#name: eBPF MEM instructions, modulus lddw, pseudo-c syntax
diff --git a/gas/testsuite/gas/bpf/mem.d b/gas/testsuite/gas/bpf/mem.d
index 5f257317057..b01bdaaf241 100644
--- a/gas/testsuite/gas/bpf/mem.d
+++ b/gas/testsuite/gas/bpf/mem.d
@@ -1,31 +1,5 @@
#as: --EL
#objdump: -dr
#source: mem.s
-#source: mem-pseudoc.s
-#name: eBPF MEM instructions, modulus lddw
-
-.*: +file format .*bpf.*
-
-Disassembly of section .text:
-
-0+ <.text>:
- 0: 20 00 00 00 ef be 00 00 ldabsw 0xbeef
- 8: 28 00 00 00 ef be 00 00 ldabsh 0xbeef
- 10: 30 00 00 00 ef be 00 00 ldabsb 0xbeef
- 18: 38 00 00 00 ef be 00 00 ldabsdw 0xbeef
- 20: 40 30 00 00 ef be 00 00 ldindw %r3,0xbeef
- 28: 48 50 00 00 ef be 00 00 ldindh %r5,0xbeef
- 30: 50 70 00 00 ef be 00 00 ldindb %r7,0xbeef
- 38: 58 90 00 00 ef be 00 00 ldinddw %r9,0xbeef
- 40: 61 12 ef 7e 00 00 00 00 ldxw %r2,\[%r1\+0x7eef\]
- 48: 69 12 ef 7e 00 00 00 00 ldxh %r2,\[%r1\+0x7eef\]
- 50: 71 12 ef 7e 00 00 00 00 ldxb %r2,\[%r1\+0x7eef\]
- 58: 79 12 fe ff 00 00 00 00 ldxdw %r2,\[%r1\+-2\]
- 60: 63 21 ef 7e 00 00 00 00 stxw \[%r1\+0x7eef\],%r2
- 68: 6b 21 ef 7e 00 00 00 00 stxh \[%r1\+0x7eef\],%r2
- 70: 73 21 ef 7e 00 00 00 00 stxb \[%r1\+0x7eef\],%r2
- 78: 7b 21 fe ff 00 00 00 00 stxdw \[%r1\+-2\],%r2
- 80: 72 01 ef 7e 44 33 22 11 stb \[%r1\+0x7eef\],0x11223344
- 88: 6a 01 ef 7e 44 33 22 11 sth \[%r1\+0x7eef\],0x11223344
- 90: 62 01 ef 7e 44 33 22 11 stw \[%r1\+0x7eef\],0x11223344
- 98: 7a 01 fe ff 44 33 22 11 stdw \[%r1\+-2\],0x11223344
+#dump: mem.dump
+#name: eBPF MEM instructions, modulus lddw, normal syntax
diff --git a/gas/testsuite/gas/bpf/mem.dump b/gas/testsuite/gas/bpf/mem.dump
new file mode 100644
index 00000000000..6ad26bcbb95
--- /dev/null
+++ b/gas/testsuite/gas/bpf/mem.dump
@@ -0,0 +1,25 @@
+.*: +file format .*bpf.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ 0: 20 00 00 00 ef be 00 00 ldabsw 0xbeef
+ 8: 28 00 00 00 ef be 00 00 ldabsh 0xbeef
+ 10: 30 00 00 00 ef be 00 00 ldabsb 0xbeef
+ 18: 38 00 00 00 ef be 00 00 ldabsdw 0xbeef
+ 20: 40 30 00 00 ef be 00 00 ldindw %r3,0xbeef
+ 28: 48 50 00 00 ef be 00 00 ldindh %r5,0xbeef
+ 30: 50 70 00 00 ef be 00 00 ldindb %r7,0xbeef
+ 38: 58 90 00 00 ef be 00 00 ldinddw %r9,0xbeef
+ 40: 61 12 ef 7e 00 00 00 00 ldxw %r2,\[%r1\+0x7eef\]
+ 48: 69 12 ef 7e 00 00 00 00 ldxh %r2,\[%r1\+0x7eef\]
+ 50: 71 12 ef 7e 00 00 00 00 ldxb %r2,\[%r1\+0x7eef\]
+ 58: 79 12 fe ff 00 00 00 00 ldxdw %r2,\[%r1\+-2\]
+ 60: 63 21 ef 7e 00 00 00 00 stxw \[%r1\+0x7eef\],%r2
+ 68: 6b 21 ef 7e 00 00 00 00 stxh \[%r1\+0x7eef\],%r2
+ 70: 73 21 ef 7e 00 00 00 00 stxb \[%r1\+0x7eef\],%r2
+ 78: 7b 21 fe ff 00 00 00 00 stxdw \[%r1\+-2\],%r2
+ 80: 72 01 ef 7e 44 33 22 11 stb \[%r1\+0x7eef\],0x11223344
+ 88: 6a 01 ef 7e 44 33 22 11 sth \[%r1\+0x7eef\],0x11223344
+ 90: 62 01 ef 7e 44 33 22 11 stw \[%r1\+0x7eef\],0x11223344
+ 98: 7a 01 fe ff 44 33 22 11 stdw \[%r1\+-2\],0x11223344
On 27.04.2023 20:07, Jose E. Marchesi wrote:
>
>> On 27.04.2023 11:59, Jose E. Marchesi wrote:
>>>
>>>> On 26.04.2023 19:31, Jose E. Marchesi via Binutils wrote:
>>>>> --- a/gas/testsuite/gas/bpf/alu-be.d
>>>>> +++ b/gas/testsuite/gas/bpf/alu-be.d
>>>>> @@ -1,5 +1,6 @@
>>>>> #as: --EB
>>>>> #source: alu.s
>>>>> +#source: alu-pseudoc.s
>>>>> #objdump: -dr
>>>>> #name: eBPF ALU64 instructions, big endian
>>>>
>>>> I may of course be reading binutils-common.exp's run_dump_test wrong,
>>>> but is this having the intended effect of assembling each of the files
>>>> once and checking objdump output for each of them? It looks to me as
>>>> if only the assembling step would be performed for both, which I don't
>>>> think is what is wanted.
>>>
>>> It was an attempt to avoid having to replicate the same contents in
>>> alu-be.d and alu-be-pseudoc.d. Will look into this too.
>>
>> I assumed that would have been the goal, but that's achieved by using
>> #dump: instead (in a new, small *.d).
>
> Thanks for the hint. I just pushed the fix below that makes use of
> #dump.
Hmm, thanks for doing this, but ...
> From 2b8c7766ea357ff9b22531d6fdf0c3bd69cc044f Mon Sep 17 00:00:00 2001
> From: "Jose E. Marchesi" <jose.marchesi@oracle.com>
> Date: Thu, 27 Apr 2023 20:05:19 +0200
> Subject: [PATCH] gas: bpf: fix tests for pseudo-c syntax
>
> This patch fixes the GAS BPF testsuite so the tests for pseudo-c
> syntax are actually executed.
>
> 2023-04-27 Jose E. Marchesi <jose.marchesi@oracle.com>
>
> * testsuite/gas/bpf/mem.dump: New file.
> * testsuite/gas/bpf/mem-pseudoc.d: Likewise.
> * testsuite/gas/bpf/mem.d: #dump mem.dump.
> * testsuite/gas/bpf/lddw.dump: New file.
> * testsuite/gas/bpf/lddw-pseudoc.d: Likewise.
> * testsuite/gas/bpf/lddw.d: #dump lddw.dump.
> * testsuite/gas/bpf/jump.dump: New file.
> * testsuite/gas/bpf/jump-pseudoc.d: Likewise
> * testsuite/gas/bpf/jump.d: #dump jump.dump.
> * testsuite/gas/bpf/jump32.dump: New file.
> * testsuite/gas/bpf/jump32-pseudoc.d: Likewise.
> * testsuite/gas/bpf/jump32.d: #dump jump32.dump.
> * testsuite/gas/bpf/lddw-be.dump: New file.
> * testsuite/gas/bpf/lddw-be-pseudoc.d: Likewise.
> * testsuite/gas/bpf/lddw-be.d: #dump lddw-be.dump.
> * testsuite/gas/bpf/indcall-1.dump: New file.
> * testsuite/gas/bpf/indcall-1-pseudoc.d: Likewise.
> * testsuite/gas/bpf/indcall-1.d: #dump indcall-1.dump.
> * testsuite/gas/bpf/indcall-1-pseudoc.s (main): Fix lddw
> instruction.
> * testsuite/gas/bpf/atomic.dump: New file.
> * testsuite/gas/bpf/atomic-pseudoc.d: Likewise.
> * testsuite/gas/bpf/atomic.d: #dump atomic.dump.
> * testsuite/gas/bpf/alu32.dump: New file.
> * testsuite/gas/bpf/alu32-pseudoc.d: Likewise.
> * testsuite/gas/bpf/alu32.d: #dump alu32.dump.
> * testsuite/gas/bpf/alu.dump: New file.
> * testsuite/gas/bpf/alu-pseudoc.d: Likewise.
> * testsuite/gas/bpf/alu.d: #dump alu.dump.
>
> * testsuite/gas/bpf/alu-be.dump: New file.
> * testsuite/gas/bpf/alu-be-pseudoc.d: Likewise.
> * testsuite/gas/bpf/alu-be.d: #dump alu-be.dump.
> * testsuite/gas/bpf/alu32-be-pseudoc.d: New file.
> * testsuite/gas/bpf/alu32-be-dump: Likewise.
> * testsuite/gas/bpf/alu32-be.d: #dump alu32-be-dump.
> * testsuite/gas/bpf/bpf.exp: Run *-pseudoc tests.
... why all the new *.dump files? That's far more code churn than was
necessary, as the original *.d files served their purpose quite fine,
while the new tests would only have needed to reference those *.d ones.
Anyway - I guess it is as it is now, but please consider (prefer) the
alternative in the future.
Jan
@@ -1,3 +1,23 @@
+2023-04-20 Guillermo E. Martinez <guillermo.e.martinez@oracle.com>
+
+ PR gas/29728
+ * testsuite/gas/all/assign-bad-recursive.d: Skip test in bpf-*
+ targets.
+ * testsuite/gas/all/eqv-dot.d: Likewise.
+ * testsuite/gas/all/gas.exp: Skip other assignment tests in bpf-*.
+ * testsuite/gas/bpf/alu-pseudoc.s: New file.
+ * testsuite/gas/bpf/pseudoc-normal.s: Likewise.
+ * testsuite/gas/bpf/pseudoc-normal.d: Likewise.
+ * testsuite/gas/bpf/pseudoc-normal-be.d: Likewise.
+ * testsuite/gas/bpf/mem-pseudoc.s: Likewise.
+ * testsuite/gas/bpf/lddw-pseudoc.s: Likewise.
+ * testsuite/gas/bpf/jump32-pseudoc.s: Likewise.
+ * testsuite/gas/bpf/jump-pseudoc.s: Likewise.
+ * testsuite/gas/bpf/indcall-1-pseudoc.s: Likewise.
+ * testsuite/gas/bpf/atomic-pseudoc.s: Likewise.
+ * testsuite/gas/bpf/alu32-pseudoc.s: Likewise.
+ * testsuite/gas/bpf/*.d: Add -pseudoc variants of the tests.
+
2023-04-20 Guillermo E. Martinez <guillermo.e.martinez@oracle.com>
PR gas/29728
@@ -1,4 +1,5 @@
#name: bad recursive assignments
#source: assign-bad-recursive.s
#xfail: bfin-*-*
+#notarget: *bpf-*-*
#error_output: assign-bad-recursive.l
@@ -2,7 +2,7 @@
#name: eqv involving dot
# bfin doesn't support 'symbol = expression'
# tic30 and tic4x have 4 octets per byte, tic54x has 2 octets per byte
-#notarget: bfin-*-* *c30-*-* *c4x-*-* *c54x-*-*
+#notarget: bfin-*-* *c30-*-* *c4x-*-* *c54x-*-* *bpf-*-*
# linkrelax targets don't handle equivalence expressions well (nor any
# other forward expression). mep uses complex relocs
#xfail: am33_2.0-*-* crx-*-* h8300-*-* mn10200-*-* mn10300-*-* mep-*-*
@@ -105,7 +105,7 @@ if { [istarget "pdp11-*-*"] } then {
run_dump_test eqv-dot
}
-if { ![istarget "bfin-*-*"] } then {
+if { ![istarget "bfin-*-*"] && ![istarget "bpf-*-*"] } then {
gas_test "assign-ok.s" "" "" "== assignment support"
}
gas_test_error "assign-bad.s" "" "== assignment for symbol already set"
@@ -403,7 +403,8 @@ if { ([istarget "i*86-*-*pe*"] && ![istarget "i*86-*-openbsd*"]) \
gas_test "fastcall.s" "" "" "fastcall labels"
}
-if { ![istarget "bfin-*-*"] && ![istarget "nds32*-*-*"] } then {
+if { ![istarget "bfin-*-*"] && ![istarget "nds32*-*-*"] \
+ && ![istarget "bpf-*-*"] } then {
run_dump_test assign
}
run_dump_test sleb128
@@ -1,5 +1,6 @@
#as: --EB
#source: alu.s
+#source: alu-pseudoc.s
#objdump: -dr
#name: eBPF ALU64 instructions, big endian
new file mode 100644
@@ -0,0 +1,51 @@
+# Tests for the ALU64 eBPF pseudo-C instructions
+ .text
+ r2 += 666
+ r3 += -666
+ r4 += 2125315823
+ r5 += r6
+ r2 -= 666
+ r3 -= -666
+ r4 -= 2125315823
+ r5 -= r6
+ r2 *= 666
+ r3 *= -666
+ r4 *= 2125315823
+ r5 *= r6
+ r2 /= 666
+ r3 /= -666
+ r4 /= 2125315823
+ r5 /= r6
+ r2 |= 666
+ r3 |= -666
+ r4 |= 2125315823
+ r5 |= r6
+ r2 &= 666
+ r3 &= -666
+ r4 &= 2125315823
+ r5 &= r6
+ r2 <<= 666
+ r3 <<= -666
+ r4 <<= 2125315823
+ r5 <<= r6
+ r2 >>= 666
+ r3 >>= -666
+ r4 >>= 2125315823
+ r5 >>= r6
+ r2 %= 0x29a
+ r3 %= -666
+ r4 %= 0x7eadbeef
+ r5 %= r6
+ r2 ^= 666
+ r3 ^= -666
+ r4 ^= 2125315823
+ r5 ^= r6
+ r2 = 666
+ r3 = -666
+ r4 = 2125315823
+ r5 = r6
+ r2 s>>= 666
+ r3 s>>= -666
+ r4 s>>= 2125315823
+ r5 s>>= r6
+ r2 = -r2
@@ -1,5 +1,6 @@
#as: --EB
#source: alu32.s
+#source: alu32-pseudoc.s
#objdump: -dr
#name: eBPF ALU instructions, big-endian
new file mode 100644
@@ -0,0 +1,57 @@
+# Tests for the ALU eBPF pseudo-C instructions
+ .text
+ W2 += 666
+ W3 += -666
+ W4 += 2125315823
+ W5 += w6
+ W2 -= 666
+ W3 -= -666
+ W4 -= 2125315823
+ W5 -= w6
+ W2 *= 666
+ W3 *= -666
+ W4 *= 2125315823
+ w5 *= w6
+ w2 /= 666
+ w3 /= -666
+ w4 /= 2125315823
+ w5 /= w6
+ w2 |= 666
+ w3 |= -666
+ w4 |= 2125315823
+ w5 |= w6
+ w2 &= 666
+ w3 &= -666
+ w4 &= 2125315823
+ w5 &= w6
+ w2 <<= 666
+ w3 <<= -666
+ w4 <<= 2125315823
+ w5 <<= w6
+ w2 >>= 666
+ w3 >>= -666
+ w4 >>= 2125315823
+ w5 >>= w6
+ w2 %= 666
+ w3 %= -666
+ w4 %= 0x7eadbeef
+ w5 %= w6
+ w2 ^= 666
+ w3 ^= -666
+ w4 ^= 2125315823
+ w5 ^= w6
+ w2 = 666
+ w3 = -666
+ w4 = 2125315823
+ w5 = w6
+ w2 s>>= 666
+ w3 s>>= -666
+ w4 s>>= 2125315823
+ w5 s>>= w6
+ w2 = -w2
+ r9 = le16 r9
+ r8 = le32 r8
+ r7 = le64 r7
+ r6 = be16 r6
+ r5 = be32 r5
+ r4 = be64 r4
@@ -1,5 +1,7 @@
#as: --EL
#objdump: -dr
+#source: alu32.s
+#source: alu32-pseudoc.s
#name: eBPF ALU instructions
.*: +file format .*bpf.*
@@ -1,5 +1,6 @@
#as: --EB
#source: atomic.s
+#source: atomic-pseudoc.s
#objdump: -dr
#name: eBPF atomic instructions, big endian
new file mode 100644
@@ -0,0 +1,4 @@
+ # Test for eBPF ADDW and ADDDW pseudo-C instructions
+ .text
+ lock *(u64 *)(r1 + 7919) += r2
+ lock *(u32 *)(r1 + 7919) += r2
@@ -1,5 +1,7 @@
#as: --EL
#objdump: -dr
+#source: atomic.s
+#source: atomic-pseudoc.s
#name: eBPF atomic instructions
.*: +file format .*bpf.*
@@ -28,6 +28,7 @@ if {[istarget bpf*-*-*]} {
run_dump_test exit
run_dump_test atomic
run_dump_test data
+ run_dump_test pseudoc-normal
run_dump_test lddw-be
run_dump_test alu-be
@@ -38,6 +39,7 @@ if {[istarget bpf*-*-*]} {
run_dump_test exit-be
run_dump_test atomic-be
run_dump_test data-be
+ run_dump_test pseudoc-normal-be
run_dump_test indcall-1
run_list_test indcall-bad-1
new file mode 100644
@@ -0,0 +1,13 @@
+
+ .text
+ .align 4
+main:
+ r0 = 1
+ r1 = 1
+ r2 = 2
+ r6 = 56 ll
+ callx r6
+ exit
+bar:
+ r0 = 0
+ exit
@@ -1,5 +1,7 @@
#as: -mxbpf --EL
#objdump: -mxbpf -dr
+#source: indcall-1.s
+#source: indcall-1-pseudoc.s
#name: BPF indirect call 1
.*: +file format .*bpf.*
@@ -1,3 +1,5 @@
.*: Assembler messages:
+.* Error: bad expression
.* Error: illegal operand `call %r6'
+.* Error: unexpected token: '%r6'
#pass
@@ -1,5 +1,6 @@
#as: --EB
#source: jump.s
+#source: jump-pseudoc.s
#objdump: -dr
#name: eBPF JUMP instructions, big endian
new file mode 100644
@@ -0,0 +1,25 @@
+# Tests for the JUMP pseudo-C instructions
+ .text
+ goto 2f
+ r1 += r1
+1: if r3 == 3 goto 2f
+ if r3 == r4 goto 2f
+2: if r3 >= 3 goto 1b
+ if r3 >= r4 goto 1b
+1: if r3 < 3 goto 1f
+ if r3 < r4 goto 1f
+1: if r3 <= 3 goto 1f
+ if r3 <= r4 goto 1f
+1: if r3 & 3 goto 1f
+ if r3 & r4 goto 1f
+1: if r3 != 3 goto 1f
+ if r3 != r4 goto 1f
+1: if r3 s> 3 goto 1f
+ if r3 s> r4 goto 1f
+1: if r3 s>= 3 goto 1f
+ if r3 s>= r4 goto 1f
+1: if r3 s< 3 goto 1f
+ if r3 s< r4 goto 1f
+1: if r3 s<= 3 goto 1f
+ if r3 s<= r4 goto 1f
+1:
@@ -1,5 +1,7 @@
#as: --EL
#objdump: -dr
+#source: jump.s
+#source: jump-pseudoc.s
#name: eBPF JUMP instructions
.*: +file format .*bpf.*
@@ -28,4 +30,4 @@ Disassembly of section .text:
90: c5 03 01 00 03 00 00 00 jslt %r3,3,1
98: cd 43 00 00 00 00 00 00 jslt %r3,%r4,0
a0: d5 03 01 00 03 00 00 00 jsle %r3,3,1
- a8: dd 43 00 00 00 00 00 00 jsle %r3,%r4,0
\ No newline at end of file
+ a8: dd 43 00 00 00 00 00 00 jsle %r3,%r4,0
new file mode 100644
@@ -0,0 +1,25 @@
+# Tests for the eBPF JUMP32 pseudo-C instructions
+ .text
+ goto 2f
+ r1 += r1
+1: if w3 == 3 goto 2f
+ if w3 == w4 goto 2f
+2: if w3 >= 3 goto 1b
+ if w3 >= w4 goto 1b
+1: if w3 < 3 goto 1f
+ if w3 < w4 goto 1f
+1: if w3 <= 3 goto 1f
+ if w3 <= w4 goto 1f
+1: if w3 & 3 goto 1f
+ if w3 & w4 goto 1f
+1: if w3 != 3 goto 1f
+ if w3 != w4 goto 1f
+1: if w3 s> 3 goto 1f
+ if w3 s> w4 goto 1f
+1: if w3 s>= 3 goto 1f
+ if w3 s>= w4 goto 1f
+1: if w3 s< 3 goto 1f
+ if w3 s< w4 goto 1f
+1: if w3 s<= 3 goto 1f
+ if w3 s<= w4 goto 1f
+1:
@@ -1,5 +1,7 @@
#as: --EL
#objdump: -dr
+#source: jump32.s
+#source: jump32-pseudoc.s
#name: eBPF JUMP32 instructions
.*: +file format .*bpf.*
@@ -1,5 +1,6 @@
#as: --EB
#source: lddw.s
+#source: lddw-pseudoc.s
#objdump: -dr
#name: eBPF LDDW, big-endian
new file mode 100644
@@ -0,0 +1,6 @@
+# Tests for the LDDW pseudo-C instruction
+ .text
+ r3 = 1 ll
+ r4 = 0xdeadbeef ll
+ r5 = 0x1122334455667788 ll
+ r6 = -2 ll
@@ -1,5 +1,7 @@
#as: --EL
#objdump: -dr
+#source: lddw.s
+#source: lddw-pseudoc.s
#name: eBPF LDDW
.*: +file format .*bpf.*
@@ -1,5 +1,6 @@
#as: --EB
#source: mem.s
+#source: mem-pseudoc.s
#objdump: -dr
#name: eBPF MEM instructions, modulus lddw, big endian
@@ -27,4 +28,4 @@ Disassembly of section .text:
80: 72 10 7e ef 11 22 33 44 stb \[%r1\+0x7eef\],0x11223344
88: 6a 10 7e ef 11 22 33 44 sth \[%r1\+0x7eef\],0x11223344
90: 62 10 7e ef 11 22 33 44 stw \[%r1\+0x7eef\],0x11223344
- 98: 7a 10 ff fe 11 22 33 44 stdw \[%r1\+-2\],0x11223344
\ No newline at end of file
+ 98: 7a 10 ff fe 11 22 33 44 stdw \[%r1\+-2\],0x11223344
new file mode 100644
@@ -0,0 +1,23 @@
+# eBPF tests for MEM pseudo-C instructions, modulus lddw.
+
+ .text
+ r0 = *(u32 *)skb[48879]
+ r0 = *(u16 *)skb[48879]
+ r0 = *(u8 *)skb[48879]
+ r0 = *(u64 *)skb[48879]
+ r0 = *(u32 *)skb[r3 + 0xbeef]
+ r0 = *(u16 *)skb[r5 + 0xbeef]
+ r0 = *(u8 *)skb[r7 + 0xbeef]
+ r0 = *(u64 *)skb[r9 + 0xbeef]
+ r2 = *(u32 *)(r1 + 32495)
+ r2 = *(u16 *)(r1 + 32495)
+ r2 = *(u8 *)(r1 + 32495)
+ r2 = *(u64 *)(r1 - 2)
+ *(u32 *)(r1 + 32495) = r2
+ *(u16 *)(r1 + 32495) = r2
+ *(u8 *)(r1 + 32495) = r2
+ *(u64 *)(r1 - 2) = r2
+ stb [%r1+0x7eef], 0x11223344
+ sth [%r1+0x7eef], 0x11223344
+ stw [%r1+0x7eef], 0x11223344
+ stdw [%r1+-2], 0x11223344
@@ -1,5 +1,7 @@
#as: --EL
#objdump: -dr
+#source: mem.s
+#source: mem-pseudoc.s
#name: eBPF MEM instructions, modulus lddw
.*: +file format .*bpf.*
new file mode 100644
@@ -0,0 +1,214 @@
+#as: --EB
+#objdump: -dr
+#source: pseudoc-normal.s
+#name: eBPF clang (pseudo-C)/gas (normal) instructions
+
+.*: +file format .*bpf.*
+
+Disassembly of section .text:
+
+0+ <beg>:
+ 0: 07 10 00 00 00 00 00 aa add %r1,0xaa
+ 8: 07 10 00 00 00 00 00 aa add %r1,0xaa
+ 10: 0f 12 00 00 00 00 00 00 add %r1,%r2
+ 18: 0f 12 00 00 00 00 00 00 add %r1,%r2
+ 20: 17 10 00 00 00 00 00 aa sub %r1,0xaa
+ 28: 17 10 00 00 00 00 00 aa sub %r1,0xaa
+ 30: 1f 12 00 00 00 00 00 00 sub %r1,%r2
+ 38: 1f 12 00 00 00 00 00 00 sub %r1,%r2
+ 40: 27 10 00 00 00 00 00 aa mul %r1,0xaa
+ 48: 27 10 00 00 00 00 00 aa mul %r1,0xaa
+ 50: 2f 12 00 00 00 00 00 00 mul %r1,%r2
+ 58: 2f 12 00 00 00 00 00 00 mul %r1,%r2
+ 60: 37 10 00 00 00 00 00 aa div %r1,0xaa
+ 68: 37 10 00 00 00 00 00 aa div %r1,0xaa
+ 70: 3f 12 00 00 00 00 00 00 div %r1,%r2
+ 78: 3f 12 00 00 00 00 00 00 div %r1,%r2
+ 80: 47 10 00 00 00 00 00 aa or %r1,0xaa
+ 88: 47 10 00 00 00 00 00 aa or %r1,0xaa
+ 90: 4f 12 00 00 00 00 00 00 or %r1,%r2
+ 98: 4f 12 00 00 00 00 00 00 or %r1,%r2
+ a0: 57 10 00 00 00 00 00 aa and %r1,0xaa
+ a8: 57 10 00 00 00 00 00 aa and %r1,0xaa
+ b0: 5f 12 00 00 00 00 00 00 and %r1,%r2
+ b8: 5f 12 00 00 00 00 00 00 and %r1,%r2
+ c0: 67 10 00 00 00 00 00 aa lsh %r1,0xaa
+ c8: 67 10 00 00 00 00 00 aa lsh %r1,0xaa
+ d0: 6f 12 00 00 00 00 00 00 lsh %r1,%r2
+ d8: 6f 12 00 00 00 00 00 00 lsh %r1,%r2
+ e0: 77 10 00 00 00 00 00 aa rsh %r1,0xaa
+ e8: 77 10 00 00 00 00 00 aa rsh %r1,0xaa
+ f0: 7f 12 00 00 00 00 00 00 rsh %r1,%r2
+ f8: 7f 12 00 00 00 00 00 00 rsh %r1,%r2
+ 100: a7 10 00 00 00 00 00 aa xor %r1,0xaa
+ 108: a7 10 00 00 00 00 00 aa xor %r1,0xaa
+ 110: af 12 00 00 00 00 00 00 xor %r1,%r2
+ 118: af 12 00 00 00 00 00 00 xor %r1,%r2
+ 120: b7 10 00 00 00 00 00 aa mov %r1,0xaa
+ 128: b7 10 00 00 00 00 00 aa mov %r1,0xaa
+ 130: bf 12 00 00 00 00 00 00 mov %r1,%r2
+ 138: bf 12 00 00 00 00 00 00 mov %r1,%r2
+ 140: c7 10 00 00 00 00 00 aa arsh %r1,0xaa
+ 148: c7 10 00 00 00 00 00 aa arsh %r1,0xaa
+ 150: cf 12 00 00 00 00 00 00 arsh %r1,%r2
+ 158: cf 12 00 00 00 00 00 00 arsh %r1,%r2
+ 160: 87 10 00 00 00 00 00 00 neg %r1
+ 168: 87 10 00 00 00 00 00 00 neg %r1
+ 170: 04 10 00 00 00 00 00 aa add32 %r1,0xaa
+ 178: 04 10 00 00 00 00 00 aa add32 %r1,0xaa
+ 180: 0c 12 00 00 00 00 00 00 add32 %r1,%r2
+ 188: 0c 12 00 00 00 00 00 00 add32 %r1,%r2
+ 190: 14 10 00 00 00 00 00 aa sub32 %r1,0xaa
+ 198: 14 10 00 00 00 00 00 aa sub32 %r1,0xaa
+ 1a0: 1c 12 00 00 00 00 00 00 sub32 %r1,%r2
+ 1a8: 1c 12 00 00 00 00 00 00 sub32 %r1,%r2
+ 1b0: 24 10 00 00 00 00 00 aa mul32 %r1,0xaa
+ 1b8: 24 10 00 00 00 00 00 aa mul32 %r1,0xaa
+ 1c0: 2c 12 00 00 00 00 00 00 mul32 %r1,%r2
+ 1c8: 2c 12 00 00 00 00 00 00 mul32 %r1,%r2
+ 1d0: 34 10 00 00 00 00 00 aa div32 %r1,0xaa
+ 1d8: 34 10 00 00 00 00 00 aa div32 %r1,0xaa
+ 1e0: 3c 12 00 00 00 00 00 00 div32 %r1,%r2
+ 1e8: 3c 12 00 00 00 00 00 00 div32 %r1,%r2
+ 1f0: 44 10 00 00 00 00 00 aa or32 %r1,0xaa
+ 1f8: 44 10 00 00 00 00 00 aa or32 %r1,0xaa
+ 200: 4c 12 00 00 00 00 00 00 or32 %r1,%r2
+ 208: 4c 12 00 00 00 00 00 00 or32 %r1,%r2
+ 210: 54 10 00 00 00 00 00 aa and32 %r1,0xaa
+ 218: 54 10 00 00 00 00 00 aa and32 %r1,0xaa
+ 220: 5c 12 00 00 00 00 00 00 and32 %r1,%r2
+ 228: 5c 12 00 00 00 00 00 00 and32 %r1,%r2
+ 230: 64 10 00 00 00 00 00 aa lsh32 %r1,0xaa
+ 238: 64 10 00 00 00 00 00 aa lsh32 %r1,0xaa
+ 240: 6c 12 00 00 00 00 00 00 lsh32 %r1,%r2
+ 248: 6c 12 00 00 00 00 00 00 lsh32 %r1,%r2
+ 250: 74 10 00 00 00 00 00 aa rsh32 %r1,0xaa
+ 258: 74 10 00 00 00 00 00 aa rsh32 %r1,0xaa
+ 260: 7c 12 00 00 00 00 00 00 rsh32 %r1,%r2
+ 268: 7c 12 00 00 00 00 00 00 rsh32 %r1,%r2
+ 270: a4 10 00 00 00 00 00 aa xor32 %r1,0xaa
+ 278: a4 10 00 00 00 00 00 aa xor32 %r1,0xaa
+ 280: ac 12 00 00 00 00 00 00 xor32 %r1,%r2
+ 288: ac 12 00 00 00 00 00 00 xor32 %r1,%r2
+ 290: b4 10 00 00 00 00 00 aa mov32 %r1,0xaa
+ 298: b4 10 00 00 00 00 00 aa mov32 %r1,0xaa
+ 2a0: bc 12 00 00 00 00 00 00 mov32 %r1,%r2
+ 2a8: bc 12 00 00 00 00 00 00 mov32 %r1,%r2
+ 2b0: c4 10 00 00 00 00 00 aa arsh32 %r1,0xaa
+ 2b8: c4 10 00 00 00 00 00 aa arsh32 %r1,0xaa
+ 2c0: cc 12 00 00 00 00 00 00 arsh32 %r1,%r2
+ 2c8: cc 12 00 00 00 00 00 00 arsh32 %r1,%r2
+ 2d0: 84 10 00 00 00 00 00 00 neg32 %r1
+ 2d8: 84 10 00 00 00 00 00 00 neg32 %r1
+ 2e0: d4 10 00 00 00 00 00 10 endle %r1,16
+ 2e8: d4 10 00 00 00 00 00 10 endle %r1,16
+ 2f0: d4 10 00 00 00 00 00 20 endle %r1,32
+ 2f8: d4 10 00 00 00 00 00 20 endle %r1,32
+ 300: d4 10 00 00 00 00 00 40 endle %r1,64
+ 308: d4 10 00 00 00 00 00 40 endle %r1,64
+ 310: dc 10 00 00 00 00 00 10 endbe %r1,16
+ 318: dc 10 00 00 00 00 00 10 endbe %r1,16
+ 320: dc 10 00 00 00 00 00 20 endbe %r1,32
+ 328: dc 10 00 00 00 00 00 20 endbe %r1,32
+ 330: dc 10 00 00 00 00 00 40 endbe %r1,64
+ 338: dc 10 00 00 00 00 00 40 endbe %r1,64
+ 340: 71 12 00 aa 00 00 00 00 ldxb %r1,\[%r2\+0xaa\]
+ 348: 71 12 00 aa 00 00 00 00 ldxb %r1,\[%r2\+0xaa\]
+ 350: 69 12 00 aa 00 00 00 00 ldxh %r1,\[%r2\+0xaa\]
+ 358: 69 12 00 aa 00 00 00 00 ldxh %r1,\[%r2\+0xaa\]
+ 360: 61 12 00 aa 00 00 00 00 ldxw %r1,\[%r2\+0xaa\]
+ 368: 61 12 00 aa 00 00 00 00 ldxw %r1,\[%r2\+0xaa\]
+ 370: 79 12 00 aa 00 00 00 00 ldxdw %r1,\[%r2\+0xaa\]
+ 378: 79 12 00 aa 00 00 00 00 ldxdw %r1,\[%r2\+0xaa\]
+ 380: 73 12 00 aa 00 00 00 00 stxb \[%r1\+0xaa\],%r2
+ 388: 73 12 00 aa 00 00 00 00 stxb \[%r1\+0xaa\],%r2
+ 390: 6b 12 00 aa 00 00 00 00 stxh \[%r1\+0xaa\],%r2
+ 398: 6b 12 00 aa 00 00 00 00 stxh \[%r1\+0xaa\],%r2
+ 3a0: 63 12 00 aa 00 00 00 00 stxw \[%r1\+0xaa\],%r2
+ 3a8: 63 12 00 aa 00 00 00 00 stxw \[%r1\+0xaa\],%r2
+ 3b0: 7b 12 00 aa 00 00 00 00 stxdw \[%r1\+0xaa\],%r2
+ 3b8: 7b 12 00 aa 00 00 00 00 stxdw \[%r1\+0xaa\],%r2
+ 3c0: 05 00 00 bb 00 00 00 00 ja 187
+ 3c8: 05 00 00 bb 00 00 00 00 ja 187
+ 3d0: 15 10 00 bb 00 00 00 aa jeq %r1,0xaa,187
+ 3d8: 15 10 00 bb 00 00 00 aa jeq %r1,0xaa,187
+ 3e0: 1d 12 00 bb 00 00 00 00 jeq %r1,%r2,187
+ 3e8: 1d 12 00 bb 00 00 00 00 jeq %r1,%r2,187
+ 3f0: 25 10 00 bb 00 00 00 aa jgt %r1,0xaa,187
+ 3f8: 25 10 00 bb 00 00 00 aa jgt %r1,0xaa,187
+ 400: 2d 12 00 bb 00 00 00 00 jgt %r1,%r2,187
+ 408: 2d 12 00 bb 00 00 00 00 jgt %r1,%r2,187
+ 410: 35 10 00 bb 00 00 00 aa jge %r1,0xaa,187
+ 418: 35 10 00 bb 00 00 00 aa jge %r1,0xaa,187
+ 420: 3d 12 00 bb 00 00 00 00 jge %r1,%r2,187
+ 428: 3d 12 00 bb 00 00 00 00 jge %r1,%r2,187
+ 430: a5 10 00 bb 00 00 00 aa jlt %r1,0xaa,187
+ 438: a5 10 00 bb 00 00 00 aa jlt %r1,0xaa,187
+ 440: ad 12 00 bb 00 00 00 00 jlt %r1,%r2,187
+ 448: ad 12 00 bb 00 00 00 00 jlt %r1,%r2,187
+ 450: b5 10 00 bb 00 00 00 aa jle %r1,0xaa,187
+ 458: b5 10 00 bb 00 00 00 aa jle %r1,0xaa,187
+ 460: bd 12 00 bb 00 00 00 00 jle %r1,%r2,187
+ 468: bd 12 00 bb 00 00 00 00 jle %r1,%r2,187
+ 470: 45 10 00 bb 00 00 00 aa jset %r1,0xaa,187
+ 478: 45 10 00 bb 00 00 00 aa jset %r1,0xaa,187
+ 480: 4d 12 00 bb 00 00 00 00 jset %r1,%r2,187
+ 488: 4d 12 00 bb 00 00 00 00 jset %r1,%r2,187
+ 490: 55 10 00 bb 00 00 00 aa jne %r1,0xaa,187
+ 498: 55 10 00 bb 00 00 00 aa jne %r1,0xaa,187
+ 4a0: 5d 12 00 bb 00 00 00 00 jne %r1,%r2,187
+ 4a8: 5d 12 00 bb 00 00 00 00 jne %r1,%r2,187
+ 4b0: 65 10 00 bb 00 00 00 aa jsgt %r1,0xaa,187
+ 4b8: 65 10 00 bb 00 00 00 aa jsgt %r1,0xaa,187
+ 4c0: 6d 12 00 bb 00 00 00 00 jsgt %r1,%r2,187
+ 4c8: 6d 12 00 bb 00 00 00 00 jsgt %r1,%r2,187
+ 4d0: 75 10 00 bb 00 00 00 aa jsge %r1,0xaa,187
+ 4d8: 75 10 00 bb 00 00 00 aa jsge %r1,0xaa,187
+ 4e0: 7d 12 00 bb 00 00 00 00 jsge %r1,%r2,187
+ 4e8: 7d 12 00 bb 00 00 00 00 jsge %r1,%r2,187
+ 4f0: c5 10 00 bb 00 00 00 aa jslt %r1,0xaa,187
+ 4f8: c5 10 00 bb 00 00 00 aa jslt %r1,0xaa,187
+ 500: cd 12 00 bb 00 00 00 00 jslt %r1,%r2,187
+ 508: cd 12 00 bb 00 00 00 00 jslt %r1,%r2,187
+ 510: d5 10 00 bb 00 00 00 aa jsle %r1,0xaa,187
+ 518: d5 10 00 bb 00 00 00 aa jsle %r1,0xaa,187
+ 520: dd 12 00 bb 00 00 00 00 jsle %r1,%r2,187
+ 528: dd 12 00 bb 00 00 00 00 jsle %r1,%r2,187
+ 530: 85 00 00 00 00 00 00 aa call 170
+ 538: 85 00 00 00 00 00 00 aa call 170
+ 540: 95 00 00 00 00 00 00 00 exit
+ 548: 95 00 00 00 00 00 00 00 exit
+ 550: b7 60 00 00 00 00 06 20 mov %r6,0x620
+ 558: 95 00 00 00 00 00 00 00 exit
+ 560: 20 00 00 00 00 00 00 aa ldabsw 0xaa
+ 568: 20 00 00 00 00 00 00 aa ldabsw 0xaa
+ 570: 50 07 00 00 00 00 00 aa ldindb %r7,0xaa
+ 578: 50 07 00 00 00 00 00 aa ldindb %r7,0xaa
+ 580: 20 00 00 00 00 00 00 aa ldabsw 0xaa
+ 588: 20 00 00 00 00 00 00 aa ldabsw 0xaa
+ 590: 50 07 00 00 00 00 00 aa ldindb %r7,0xaa
+ 598: 50 07 00 00 00 00 00 aa ldindb %r7,0xaa
+ 5a0: 18 30 00 00 00 00 00 01 lddw %r3,1
+ 5a8: 00 00 00 00 00 00 00 00
+ 5b0: 18 30 00 00 00 00 00 01 lddw %r3,1
+ 5b8: 00 00 00 00 00 00 00 00
+ 5c0: 18 40 00 00 ee ff 77 88 lddw %r4,-6144092013047351416
+ 5c8: 00 00 00 00 aa bb cc dd
+ 5d0: 18 40 00 00 ee ff 77 88 lddw %r4,-6144092013047351416
+ 5d8: 00 00 00 00 aa bb cc dd
+ 5e0: 18 50 00 00 55 66 77 88 lddw %r5,0x1122334455667788
+ 5e8: 00 00 00 00 11 22 33 44
+ 5f0: 18 50 00 00 55 66 77 88 lddw %r5,0x1122334455667788
+ 5f8: 00 00 00 00 11 22 33 44
+ 600: 18 60 00 00 00 00 06 20 lddw %r6,0x620
+ 608: 00 00 00 00 00 00 00 00
+ 600: R_BPF_64_64 .text
+ 610: 18 60 00 00 00 00 06 20 lddw %r6,0x620
+ 618: 00 00 00 00 00 00 00 00
+ 610: R_BPF_64_64 .text
+
+0000000000000620 <main>:
+ 620: c3 12 00 aa 00 00 00 00 xaddw \[%r1\+0xaa\],%r2
+ 628: c3 12 00 aa 00 00 00 00 xaddw \[%r1\+0xaa\],%r2
+ 630: db 12 00 aa 00 00 00 00 xadddw \[%r1\+0xaa\],%r2
+ 638: db 12 00 aa 00 00 00 00 xadddw \[%r1\+0xaa\],%r2
new file mode 100644
@@ -0,0 +1,214 @@
+#as: --EL
+#objdump: -dr
+#source: pseudoc-normal.s
+#name: eBPF clang (pseudo-C)/gas (normal) instructions
+
+.*: +file format .*bpf.*
+
+Disassembly of section .text:
+
+0+ <beg>:
+ 0: 07 01 00 00 aa 00 00 00 add %r1,0xaa
+ 8: 07 01 00 00 aa 00 00 00 add %r1,0xaa
+ 10: 0f 21 00 00 00 00 00 00 add %r1,%r2
+ 18: 0f 21 00 00 00 00 00 00 add %r1,%r2
+ 20: 17 01 00 00 aa 00 00 00 sub %r1,0xaa
+ 28: 17 01 00 00 aa 00 00 00 sub %r1,0xaa
+ 30: 1f 21 00 00 00 00 00 00 sub %r1,%r2
+ 38: 1f 21 00 00 00 00 00 00 sub %r1,%r2
+ 40: 27 01 00 00 aa 00 00 00 mul %r1,0xaa
+ 48: 27 01 00 00 aa 00 00 00 mul %r1,0xaa
+ 50: 2f 21 00 00 00 00 00 00 mul %r1,%r2
+ 58: 2f 21 00 00 00 00 00 00 mul %r1,%r2
+ 60: 37 01 00 00 aa 00 00 00 div %r1,0xaa
+ 68: 37 01 00 00 aa 00 00 00 div %r1,0xaa
+ 70: 3f 21 00 00 00 00 00 00 div %r1,%r2
+ 78: 3f 21 00 00 00 00 00 00 div %r1,%r2
+ 80: 47 01 00 00 aa 00 00 00 or %r1,0xaa
+ 88: 47 01 00 00 aa 00 00 00 or %r1,0xaa
+ 90: 4f 21 00 00 00 00 00 00 or %r1,%r2
+ 98: 4f 21 00 00 00 00 00 00 or %r1,%r2
+ a0: 57 01 00 00 aa 00 00 00 and %r1,0xaa
+ a8: 57 01 00 00 aa 00 00 00 and %r1,0xaa
+ b0: 5f 21 00 00 00 00 00 00 and %r1,%r2
+ b8: 5f 21 00 00 00 00 00 00 and %r1,%r2
+ c0: 67 01 00 00 aa 00 00 00 lsh %r1,0xaa
+ c8: 67 01 00 00 aa 00 00 00 lsh %r1,0xaa
+ d0: 6f 21 00 00 00 00 00 00 lsh %r1,%r2
+ d8: 6f 21 00 00 00 00 00 00 lsh %r1,%r2
+ e0: 77 01 00 00 aa 00 00 00 rsh %r1,0xaa
+ e8: 77 01 00 00 aa 00 00 00 rsh %r1,0xaa
+ f0: 7f 21 00 00 00 00 00 00 rsh %r1,%r2
+ f8: 7f 21 00 00 00 00 00 00 rsh %r1,%r2
+ 100: a7 01 00 00 aa 00 00 00 xor %r1,0xaa
+ 108: a7 01 00 00 aa 00 00 00 xor %r1,0xaa
+ 110: af 21 00 00 00 00 00 00 xor %r1,%r2
+ 118: af 21 00 00 00 00 00 00 xor %r1,%r2
+ 120: b7 01 00 00 aa 00 00 00 mov %r1,0xaa
+ 128: b7 01 00 00 aa 00 00 00 mov %r1,0xaa
+ 130: bf 21 00 00 00 00 00 00 mov %r1,%r2
+ 138: bf 21 00 00 00 00 00 00 mov %r1,%r2
+ 140: c7 01 00 00 aa 00 00 00 arsh %r1,0xaa
+ 148: c7 01 00 00 aa 00 00 00 arsh %r1,0xaa
+ 150: cf 21 00 00 00 00 00 00 arsh %r1,%r2
+ 158: cf 21 00 00 00 00 00 00 arsh %r1,%r2
+ 160: 87 01 00 00 00 00 00 00 neg %r1
+ 168: 87 01 00 00 00 00 00 00 neg %r1
+ 170: 04 01 00 00 aa 00 00 00 add32 %r1,0xaa
+ 178: 04 01 00 00 aa 00 00 00 add32 %r1,0xaa
+ 180: 0c 21 00 00 00 00 00 00 add32 %r1,%r2
+ 188: 0c 21 00 00 00 00 00 00 add32 %r1,%r2
+ 190: 14 01 00 00 aa 00 00 00 sub32 %r1,0xaa
+ 198: 14 01 00 00 aa 00 00 00 sub32 %r1,0xaa
+ 1a0: 1c 21 00 00 00 00 00 00 sub32 %r1,%r2
+ 1a8: 1c 21 00 00 00 00 00 00 sub32 %r1,%r2
+ 1b0: 24 01 00 00 aa 00 00 00 mul32 %r1,0xaa
+ 1b8: 24 01 00 00 aa 00 00 00 mul32 %r1,0xaa
+ 1c0: 2c 21 00 00 00 00 00 00 mul32 %r1,%r2
+ 1c8: 2c 21 00 00 00 00 00 00 mul32 %r1,%r2
+ 1d0: 34 01 00 00 aa 00 00 00 div32 %r1,0xaa
+ 1d8: 34 01 00 00 aa 00 00 00 div32 %r1,0xaa
+ 1e0: 3c 21 00 00 00 00 00 00 div32 %r1,%r2
+ 1e8: 3c 21 00 00 00 00 00 00 div32 %r1,%r2
+ 1f0: 44 01 00 00 aa 00 00 00 or32 %r1,0xaa
+ 1f8: 44 01 00 00 aa 00 00 00 or32 %r1,0xaa
+ 200: 4c 21 00 00 00 00 00 00 or32 %r1,%r2
+ 208: 4c 21 00 00 00 00 00 00 or32 %r1,%r2
+ 210: 54 01 00 00 aa 00 00 00 and32 %r1,0xaa
+ 218: 54 01 00 00 aa 00 00 00 and32 %r1,0xaa
+ 220: 5c 21 00 00 00 00 00 00 and32 %r1,%r2
+ 228: 5c 21 00 00 00 00 00 00 and32 %r1,%r2
+ 230: 64 01 00 00 aa 00 00 00 lsh32 %r1,0xaa
+ 238: 64 01 00 00 aa 00 00 00 lsh32 %r1,0xaa
+ 240: 6c 21 00 00 00 00 00 00 lsh32 %r1,%r2
+ 248: 6c 21 00 00 00 00 00 00 lsh32 %r1,%r2
+ 250: 74 01 00 00 aa 00 00 00 rsh32 %r1,0xaa
+ 258: 74 01 00 00 aa 00 00 00 rsh32 %r1,0xaa
+ 260: 7c 21 00 00 00 00 00 00 rsh32 %r1,%r2
+ 268: 7c 21 00 00 00 00 00 00 rsh32 %r1,%r2
+ 270: a4 01 00 00 aa 00 00 00 xor32 %r1,0xaa
+ 278: a4 01 00 00 aa 00 00 00 xor32 %r1,0xaa
+ 280: ac 21 00 00 00 00 00 00 xor32 %r1,%r2
+ 288: ac 21 00 00 00 00 00 00 xor32 %r1,%r2
+ 290: b4 01 00 00 aa 00 00 00 mov32 %r1,0xaa
+ 298: b4 01 00 00 aa 00 00 00 mov32 %r1,0xaa
+ 2a0: bc 21 00 00 00 00 00 00 mov32 %r1,%r2
+ 2a8: bc 21 00 00 00 00 00 00 mov32 %r1,%r2
+ 2b0: c4 01 00 00 aa 00 00 00 arsh32 %r1,0xaa
+ 2b8: c4 01 00 00 aa 00 00 00 arsh32 %r1,0xaa
+ 2c0: cc 21 00 00 00 00 00 00 arsh32 %r1,%r2
+ 2c8: cc 21 00 00 00 00 00 00 arsh32 %r1,%r2
+ 2d0: 84 01 00 00 00 00 00 00 neg32 %r1
+ 2d8: 84 01 00 00 00 00 00 00 neg32 %r1
+ 2e0: d4 01 00 00 10 00 00 00 endle %r1,16
+ 2e8: d4 01 00 00 10 00 00 00 endle %r1,16
+ 2f0: d4 01 00 00 20 00 00 00 endle %r1,32
+ 2f8: d4 01 00 00 20 00 00 00 endle %r1,32
+ 300: d4 01 00 00 40 00 00 00 endle %r1,64
+ 308: d4 01 00 00 40 00 00 00 endle %r1,64
+ 310: dc 01 00 00 10 00 00 00 endbe %r1,16
+ 318: dc 01 00 00 10 00 00 00 endbe %r1,16
+ 320: dc 01 00 00 20 00 00 00 endbe %r1,32
+ 328: dc 01 00 00 20 00 00 00 endbe %r1,32
+ 330: dc 01 00 00 40 00 00 00 endbe %r1,64
+ 338: dc 01 00 00 40 00 00 00 endbe %r1,64
+ 340: 71 21 aa 00 00 00 00 00 ldxb %r1,\[%r2\+0xaa\]
+ 348: 71 21 aa 00 00 00 00 00 ldxb %r1,\[%r2\+0xaa\]
+ 350: 69 21 aa 00 00 00 00 00 ldxh %r1,\[%r2\+0xaa\]
+ 358: 69 21 aa 00 00 00 00 00 ldxh %r1,\[%r2\+0xaa\]
+ 360: 61 21 aa 00 00 00 00 00 ldxw %r1,\[%r2\+0xaa\]
+ 368: 61 21 aa 00 00 00 00 00 ldxw %r1,\[%r2\+0xaa\]
+ 370: 79 21 aa 00 00 00 00 00 ldxdw %r1,\[%r2\+0xaa\]
+ 378: 79 21 aa 00 00 00 00 00 ldxdw %r1,\[%r2\+0xaa\]
+ 380: 73 21 aa 00 00 00 00 00 stxb \[%r1\+0xaa\],%r2
+ 388: 73 21 aa 00 00 00 00 00 stxb \[%r1\+0xaa\],%r2
+ 390: 6b 21 aa 00 00 00 00 00 stxh \[%r1\+0xaa\],%r2
+ 398: 6b 21 aa 00 00 00 00 00 stxh \[%r1\+0xaa\],%r2
+ 3a0: 63 21 aa 00 00 00 00 00 stxw \[%r1\+0xaa\],%r2
+ 3a8: 63 21 aa 00 00 00 00 00 stxw \[%r1\+0xaa\],%r2
+ 3b0: 7b 21 aa 00 00 00 00 00 stxdw \[%r1\+0xaa\],%r2
+ 3b8: 7b 21 aa 00 00 00 00 00 stxdw \[%r1\+0xaa\],%r2
+ 3c0: 05 00 bb 00 00 00 00 00 ja 187
+ 3c8: 05 00 bb 00 00 00 00 00 ja 187
+ 3d0: 15 01 bb 00 aa 00 00 00 jeq %r1,0xaa,187
+ 3d8: 15 01 bb 00 aa 00 00 00 jeq %r1,0xaa,187
+ 3e0: 1d 21 bb 00 00 00 00 00 jeq %r1,%r2,187
+ 3e8: 1d 21 bb 00 00 00 00 00 jeq %r1,%r2,187
+ 3f0: 25 01 bb 00 aa 00 00 00 jgt %r1,0xaa,187
+ 3f8: 25 01 bb 00 aa 00 00 00 jgt %r1,0xaa,187
+ 400: 2d 21 bb 00 00 00 00 00 jgt %r1,%r2,187
+ 408: 2d 21 bb 00 00 00 00 00 jgt %r1,%r2,187
+ 410: 35 01 bb 00 aa 00 00 00 jge %r1,0xaa,187
+ 418: 35 01 bb 00 aa 00 00 00 jge %r1,0xaa,187
+ 420: 3d 21 bb 00 00 00 00 00 jge %r1,%r2,187
+ 428: 3d 21 bb 00 00 00 00 00 jge %r1,%r2,187
+ 430: a5 01 bb 00 aa 00 00 00 jlt %r1,0xaa,187
+ 438: a5 01 bb 00 aa 00 00 00 jlt %r1,0xaa,187
+ 440: ad 21 bb 00 00 00 00 00 jlt %r1,%r2,187
+ 448: ad 21 bb 00 00 00 00 00 jlt %r1,%r2,187
+ 450: b5 01 bb 00 aa 00 00 00 jle %r1,0xaa,187
+ 458: b5 01 bb 00 aa 00 00 00 jle %r1,0xaa,187
+ 460: bd 21 bb 00 00 00 00 00 jle %r1,%r2,187
+ 468: bd 21 bb 00 00 00 00 00 jle %r1,%r2,187
+ 470: 45 01 bb 00 aa 00 00 00 jset %r1,0xaa,187
+ 478: 45 01 bb 00 aa 00 00 00 jset %r1,0xaa,187
+ 480: 4d 21 bb 00 00 00 00 00 jset %r1,%r2,187
+ 488: 4d 21 bb 00 00 00 00 00 jset %r1,%r2,187
+ 490: 55 01 bb 00 aa 00 00 00 jne %r1,0xaa,187
+ 498: 55 01 bb 00 aa 00 00 00 jne %r1,0xaa,187
+ 4a0: 5d 21 bb 00 00 00 00 00 jne %r1,%r2,187
+ 4a8: 5d 21 bb 00 00 00 00 00 jne %r1,%r2,187
+ 4b0: 65 01 bb 00 aa 00 00 00 jsgt %r1,0xaa,187
+ 4b8: 65 01 bb 00 aa 00 00 00 jsgt %r1,0xaa,187
+ 4c0: 6d 21 bb 00 00 00 00 00 jsgt %r1,%r2,187
+ 4c8: 6d 21 bb 00 00 00 00 00 jsgt %r1,%r2,187
+ 4d0: 75 01 bb 00 aa 00 00 00 jsge %r1,0xaa,187
+ 4d8: 75 01 bb 00 aa 00 00 00 jsge %r1,0xaa,187
+ 4e0: 7d 21 bb 00 00 00 00 00 jsge %r1,%r2,187
+ 4e8: 7d 21 bb 00 00 00 00 00 jsge %r1,%r2,187
+ 4f0: c5 01 bb 00 aa 00 00 00 jslt %r1,0xaa,187
+ 4f8: c5 01 bb 00 aa 00 00 00 jslt %r1,0xaa,187
+ 500: cd 21 bb 00 00 00 00 00 jslt %r1,%r2,187
+ 508: cd 21 bb 00 00 00 00 00 jslt %r1,%r2,187
+ 510: d5 01 bb 00 aa 00 00 00 jsle %r1,0xaa,187
+ 518: d5 01 bb 00 aa 00 00 00 jsle %r1,0xaa,187
+ 520: dd 21 bb 00 00 00 00 00 jsle %r1,%r2,187
+ 528: dd 21 bb 00 00 00 00 00 jsle %r1,%r2,187
+ 530: 85 00 00 00 aa 00 00 00 call 170
+ 538: 85 00 00 00 aa 00 00 00 call 170
+ 540: 95 00 00 00 00 00 00 00 exit
+ 548: 95 00 00 00 00 00 00 00 exit
+ 550: b7 06 00 00 20 06 00 00 mov %r6,0x620
+ 558: 95 00 00 00 00 00 00 00 exit
+ 560: 20 00 00 00 aa 00 00 00 ldabsw 0xaa
+ 568: 20 00 00 00 aa 00 00 00 ldabsw 0xaa
+ 570: 50 70 00 00 aa 00 00 00 ldindb %r7,0xaa
+ 578: 50 70 00 00 aa 00 00 00 ldindb %r7,0xaa
+ 580: 20 00 00 00 aa 00 00 00 ldabsw 0xaa
+ 588: 20 00 00 00 aa 00 00 00 ldabsw 0xaa
+ 590: 50 70 00 00 aa 00 00 00 ldindb %r7,0xaa
+ 598: 50 70 00 00 aa 00 00 00 ldindb %r7,0xaa
+ 5a0: 18 03 00 00 01 00 00 00 lddw %r3,1
+ 5a8: 00 00 00 00 00 00 00 00
+ 5b0: 18 03 00 00 01 00 00 00 lddw %r3,1
+ 5b8: 00 00 00 00 00 00 00 00
+ 5c0: 18 04 00 00 88 77 ff ee lddw %r4,-6144092013047351416
+ 5c8: 00 00 00 00 dd cc bb aa
+ 5d0: 18 04 00 00 88 77 ff ee lddw %r4,-6144092013047351416
+ 5d8: 00 00 00 00 dd cc bb aa
+ 5e0: 18 05 00 00 88 77 66 55 lddw %r5,0x1122334455667788
+ 5e8: 00 00 00 00 44 33 22 11
+ 5f0: 18 05 00 00 88 77 66 55 lddw %r5,0x1122334455667788
+ 5f8: 00 00 00 00 44 33 22 11
+ 600: 18 06 00 00 20 06 00 00 lddw %r6,0x620
+ 608: 00 00 00 00 00 00 00 00
+ 600: R_BPF_64_64 .text
+ 610: 18 06 00 00 20 06 00 00 lddw %r6,0x620
+ 618: 00 00 00 00 00 00 00 00
+ 610: R_BPF_64_64 .text
+
+0000000000000620 <main>:
+ 620: c3 21 aa 00 00 00 00 00 xaddw \[%r1\+0xaa\],%r2
+ 628: c3 21 aa 00 00 00 00 00 xaddw \[%r1\+0xaa\],%r2
+ 630: db 21 aa 00 00 00 00 00 xadddw \[%r1\+0xaa\],%r2
+ 638: db 21 aa 00 00 00 00 00 xadddw \[%r1\+0xaa\],%r2
new file mode 100644
@@ -0,0 +1,196 @@
+# Tests for mixing pseudo-C and normal eBPF instructions
+beg:
+ .text
+ add %r1,0xaa
+ r1 += 0xaa
+ add %r1,%r2
+ r1 += r2
+ sub %r1,0xaa
+ r1 -= 0xaa
+ sub %r1,%r2
+ r1 -= r2
+ mul %r1,0xaa
+ r1 *= 0xaa
+ mul %r1,%r2
+ r1 *= r2
+ div %r1,0xaa
+ r1 /= 0xaa
+ div %r1,%r2
+ r1 /= r2
+ or %r1,0xaa
+ r1 |= 0xaa
+ or %r1,%r2
+ r1 |= r2
+ and %r1,0xaa
+ r1 &= 0xaa
+ and %r1,%r2
+ r1 &= r2
+ lsh %r1,0xaa
+ r1 <<= 0xaa
+ lsh %r1,%r2
+ r1 <<= r2
+ rsh %r1,0xaa
+ r1 >>= 0xaa
+ rsh %r1,%r2
+ r1 >>= r2
+ xor %r1,0xaa
+ r1 ^= 0xaa
+ xor %r1,%r2
+ r1 ^= r2
+ mov %r1,0xaa
+ r1 = 0xaa
+ mov %r1,%r2
+ r1 = r2
+ arsh %r1,0xaa
+ r1 s>>= 0xaa
+ arsh %r1,%r2
+ r1 s>>= r2
+ neg %r1
+ r1 = -r1
+ add32 %r1,0xaa
+ w1 += 0xaa
+ add32 %r1,%r2
+ w1 += w2
+ sub32 %r1,0xaa
+ w1 -= 0xaa
+ sub32 %r1,%r2
+ w1 -= w2
+ mul32 %r1,0xaa
+ w1 *= 0xaa
+ mul32 %r1,%r2
+ w1 *= w2
+ div32 %r1,0xaa
+ w1 /= 0xaa
+ div32 %r1,%r2
+ w1 /= w2
+ or32 %r1,0xaa
+ w1 |= 0xaa
+ or32 %r1,%r2
+ w1 |= w2
+ and32 %r1,0xaa
+ w1 &= 0xaa
+ and32 %r1,%r2
+ w1 &= w2
+ lsh32 %r1,0xaa
+ w1 <<= 0xaa
+ lsh32 %r1,%r2
+ w1 <<= w2
+ rsh32 %r1,0xaa
+ w1 >>= 0xaa
+ rsh32 %r1,%r2
+ w1 >>= w2
+ xor32 %r1,0xaa
+ w1 ^= 0xaa
+ xor32 %r1,%r2
+ w1 ^= w2
+ mov32 %r1,0xaa
+ w1 = 0xaa
+ mov32 %r1,%r2
+ w1 = w2
+ arsh32 %r1,0xaa
+ w1 s>>= 0xaa
+ arsh32 %r1,%r2
+ w1 s>>= w2
+ neg32 %r1
+ w1 = -w1
+ endle %r1,16
+ r1 = le16 r1
+ endle %r1,32
+ r1 = le32 r1
+ endle %r1,64
+ r1 = le64 r1
+ endbe %r1,16
+ r1 = be16 r1
+ endbe %r1,32
+ r1 = be32 r1
+ endbe %r1,64
+ r1 = be64 r1
+ ldxb %r1,[%r2+0xaa]
+ r1 = *(u8 *)(r2 + 0xaa)
+ ldxh %r1,[%r2+0xaa]
+ r1 = *(u16 *)(r2 + 0xaa)
+ ldxw %r1,[%r2+0xaa]
+ r1 = *(u32 *)(r2 + 0xaa)
+ ldxdw %r1,[%r2+0xaa]
+ r1 = *(u64 *)(r2 + 0xaa)
+ stxb [%r1+0xaa],%r2
+ *(u8 *)(r1 + 0xaa) = r2
+ stxh [%r1+0xaa],%r2
+ *(u16 *)(r1 + 0xaa) = r2
+ stxw [%r1+0xaa],%r2
+ *(u32 *)(r1 + 0xaa) = r2
+ stxdw [%r1+0xaa],%r2
+ *(u64 *)(r1 + 0xaa) = r2
+ ja 187
+ goto 0xbb
+ jeq %r1,0xaa,187
+ if r1 == 0xaa goto 0xbb
+ jeq %r1,%r2,187
+ if r1 == r2 goto 0xbb
+ jgt %r1,0xaa,187
+ if r1 > 0xaa goto 0xbb
+ jgt %r1,%r2,187
+ if r1 > r2 goto 0xbb
+ jge %r1,0xaa,187
+ if r1 >= 0xaa goto 0xbb
+ jge %r1,%r2,187
+ if r1 >= r2 goto 0xbb
+ jlt %r1,0xaa,187
+ if r1 < 0xaa goto 0xbb
+ jlt %r1,%r2,187
+ if r1 < r2 goto 0xbb
+ jle %r1,0xaa,187
+ if r1 <= 0xaa goto 0xbb
+ jle %r1,%r2,187
+ if r1 <= r2 goto 0xbb
+ jset %r1,0xaa,187
+ if r1 & 0xaa goto 0xbb
+ jset %r1,%r2,187
+ if r1 & r2 goto 0xbb
+ jne %r1,0xaa,187
+ if r1 != 0xaa goto 0xbb
+ jne %r1,%r2,187
+ if r1 != r2 goto 0xbb
+ jsgt %r1,0xaa,187
+ if r1 s> 0xaa goto 0xbb
+ jsgt %r1,%r2,187
+ if r1 s> r2 goto 0xbb
+ jsge %r1,0xaa,187
+ if r1 s>= 0xaa goto 0xbb
+ jsge %r1,%r2,187
+ if r1 s>= r2 goto 0xbb
+ jslt %r1,0xaa,187
+ if r1 s< 0xaa goto 0xbb
+ jslt %r1,%r2,187
+ if r1 s< r2 goto 0xbb
+ jsle %r1,0xaa,187
+ if r1 s<= 0xaa goto 0xbb
+ jsle %r1,%r2,187
+ if r1 s<= r2 goto 0xbb
+ call 170
+ call 0xaa
+ exit
+ exit
+ mov %r6,main - beg
+ exit
+ ldabsw 0xaa
+ r0 = *(u32 *)skb[0xaa]
+ ldindb %r7,0xaa
+ r0 = *(u8 *)skb[r7 + 0xaa]
+ ldabsw 0xaa
+ r0 = *(u32 *)skb[0xaa]
+ ldindb %r7,0xaa
+ r0 = *(u8 *)skb[r7 + 0xaa]
+ lddw %r3,1
+ r3 = 1 ll
+ lddw %r4,0xaabbccddeeff7788
+ r4 = 0xaabbccddeeff7788 ll
+ r5 = 0x1122334455667788 ll
+ lddw %r5,0x1122334455667788
+ lddw %r6,main
+ r6 = main ll
+ main:
+ lock *(u32 *)(r1 + 0xaa) += r2
+ xaddw [%r1+0xaa],%r2
+ lock *(u64 *)(r1 + 0xaa) += r2
+ xadddw [%r1+0xaa],%r2
@@ -82,6 +82,7 @@ switch -glob $target_triplet {
rl78-*-* { }
rx-*-* { }
vax-*-* { }
+ bpf-*-* { }
default { run_list_test dot "-alm" }
}
run_list_test end ""