diff mbox series

[2/2] RISC-V: Enable x0 base relaxation for relax_pc even if --no-relax-gp.

Message ID 20230421082839.41542-2-nelson@rivosinc.com
State Unresolved
Headers
Series [1/2] RISC-V: Relax R_RISCV_[PCREL_]LO12_I/S to R_RISCV_GPREL_I/S for undefined weak. |

Checks

Context Check Description
snail/binutils-gdb-check warning Git am fail log

Commit Message

Nelson Chu April 21, 2023, 8:28 a.m. UTC 
  Let --no-relax-gp only disable the gp relaxation for lui and pcrel
relaxations, since x0 base and gp relaxations are different optimizations
in fact, but just use the same function to handle.

bfd/
	* elfnn-riscv.c (_bfd_riscv_relax_pc): Like _bfd_riscv_relax_lui,
	set gp to zero when --no-relax-gp, then we should still keep the
	x0 base relaxation.
	(_bfd_riscv_relax_section): Enable _bfd_riscv_relax_pc when
	--no-relax-gp, we will disable the gp relaxation in the
	_bfd_riscv_relax_pc.
---
 bfd/elfnn-riscv.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

Comments

Nelson Chu April 28, 2023, 6:29 a.m. UTC | #1 
Committed, thanks.

Nelson

On Fri, Apr 21, 2023 at 4:28 PM Nelson Chu <nelson@rivosinc.com> wrote:

> Let --no-relax-gp only disable the gp relaxation for lui and pcrel
> relaxations, since x0 base and gp relaxations are different optimizations
> in fact, but just use the same function to handle.
>
> bfd/
>         * elfnn-riscv.c (_bfd_riscv_relax_pc): Like _bfd_riscv_relax_lui,
>         set gp to zero when --no-relax-gp, then we should still keep the
>         x0 base relaxation.
>         (_bfd_riscv_relax_section): Enable _bfd_riscv_relax_pc when
>         --no-relax-gp, we will disable the gp relaxation in the
>         _bfd_riscv_relax_pc.
> ---
>  bfd/elfnn-riscv.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
> index 499f51ee857..77a732b6a08 100644
> --- a/bfd/elfnn-riscv.c
> +++ b/bfd/elfnn-riscv.c
> @@ -4721,7 +4721,9 @@ _bfd_riscv_relax_pc (bfd *abfd ATTRIBUTE_UNUSED,
>                      bool undefined_weak)
>  {
>    struct riscv_elf_link_hash_table *htab = riscv_elf_hash_table
> (link_info);
> -  bfd_vma gp = riscv_global_pointer_value (link_info);
> +  bfd_vma gp = htab->params->relax_gp
> +              ? riscv_global_pointer_value (link_info)
> +              : 0;
>
>    BFD_ASSERT (rel->r_offset + 4 <= sec->size);
>
> @@ -4942,7 +4944,7 @@ _bfd_riscv_relax_section (bfd *abfd, asection *sec,
>                    || type == R_RISCV_TPREL_LO12_I
>                    || type == R_RISCV_TPREL_LO12_S)
>             relax_func = _bfd_riscv_relax_tls_le;
> -         else if (!bfd_link_pic (info) && htab->params->relax_gp
> +         else if (!bfd_link_pic (info)
>                    && (type == R_RISCV_PCREL_HI20
>                        || type == R_RISCV_PCREL_LO12_I
>                        || type == R_RISCV_PCREL_LO12_S))
> --
> 2.39.2 (Apple Git-143)
>
>
Fangrui Song April 28, 2023, 7:09 a.m. UTC | #2 
On Thu, Apr 27, 2023 at 11:29 PM Nelson Chu <nelson@rivosinc.com> wrote:
>
> Committed, thanks.
>
> Nelson

Thanks. I cannot find any information about "x0 base relaxation" on
the Internet.
It is worth a test: if I force `bfd_vma gp = 0;`, check-ld
RUNTESTFLAGS='ld-riscv-elf.exp' will still pass :)

> On Fri, Apr 21, 2023 at 4:28 PM Nelson Chu <nelson@rivosinc.com> wrote:
>
> > Let --no-relax-gp only disable the gp relaxation for lui and pcrel
> > relaxations, since x0 base and gp relaxations are different optimizations
> > in fact, but just use the same function to handle.
> >
> > bfd/
> >         * elfnn-riscv.c (_bfd_riscv_relax_pc): Like _bfd_riscv_relax_lui,
> >         set gp to zero when --no-relax-gp, then we should still keep the
> >         x0 base relaxation.
> >         (_bfd_riscv_relax_section): Enable _bfd_riscv_relax_pc when
> >         --no-relax-gp, we will disable the gp relaxation in the
> >         _bfd_riscv_relax_pc.
> > ---
> >  bfd/elfnn-riscv.c | 6 ++++--
> >  1 file changed, 4 insertions(+), 2 deletions(-)
> >
> > diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
> > index 499f51ee857..77a732b6a08 100644
> > --- a/bfd/elfnn-riscv.c
> > +++ b/bfd/elfnn-riscv.c
> > @@ -4721,7 +4721,9 @@ _bfd_riscv_relax_pc (bfd *abfd ATTRIBUTE_UNUSED,
> >                      bool undefined_weak)
> >  {
> >    struct riscv_elf_link_hash_table *htab = riscv_elf_hash_table
> > (link_info);
> > -  bfd_vma gp = riscv_global_pointer_value (link_info);
> > +  bfd_vma gp = htab->params->relax_gp
> > +              ? riscv_global_pointer_value (link_info)
> > +              : 0;
> >
> >    BFD_ASSERT (rel->r_offset + 4 <= sec->size);
> >
> > @@ -4942,7 +4944,7 @@ _bfd_riscv_relax_section (bfd *abfd, asection *sec,
> >                    || type == R_RISCV_TPREL_LO12_I
> >                    || type == R_RISCV_TPREL_LO12_S)
> >             relax_func = _bfd_riscv_relax_tls_le;
> > -         else if (!bfd_link_pic (info) && htab->params->relax_gp
> > +         else if (!bfd_link_pic (info)
> >                    && (type == R_RISCV_PCREL_HI20
> >                        || type == R_RISCV_PCREL_LO12_I
> >                        || type == R_RISCV_PCREL_LO12_S))
> > --
> > 2.39.2 (Apple Git-143)
> >
> >
Kito Cheng April 28, 2023, 7:14 a.m. UTC | #3 
it called Zero-page Relaxation on psABI spec
 https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#zero-page-relaxation

On Fri, Apr 28, 2023 at 3:11 PM Fangrui Song <i@maskray.me> wrote:
>
> On Thu, Apr 27, 2023 at 11:29 PM Nelson Chu <nelson@rivosinc.com> wrote:
> >
> > Committed, thanks.
> >
> > Nelson
>
> Thanks. I cannot find any information about "x0 base relaxation" on
> the Internet.
> It is worth a test: if I force `bfd_vma gp = 0;`, check-ld
> RUNTESTFLAGS='ld-riscv-elf.exp' will still pass :)
>
> > On Fri, Apr 21, 2023 at 4:28 PM Nelson Chu <nelson@rivosinc.com> wrote:
> >
> > > Let --no-relax-gp only disable the gp relaxation for lui and pcrel
> > > relaxations, since x0 base and gp relaxations are different optimizations
> > > in fact, but just use the same function to handle.
> > >
> > > bfd/
> > >         * elfnn-riscv.c (_bfd_riscv_relax_pc): Like _bfd_riscv_relax_lui,
> > >         set gp to zero when --no-relax-gp, then we should still keep the
> > >         x0 base relaxation.
> > >         (_bfd_riscv_relax_section): Enable _bfd_riscv_relax_pc when
> > >         --no-relax-gp, we will disable the gp relaxation in the
> > >         _bfd_riscv_relax_pc.
> > > ---
> > >  bfd/elfnn-riscv.c | 6 ++++--
> > >  1 file changed, 4 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
> > > index 499f51ee857..77a732b6a08 100644
> > > --- a/bfd/elfnn-riscv.c
> > > +++ b/bfd/elfnn-riscv.c
> > > @@ -4721,7 +4721,9 @@ _bfd_riscv_relax_pc (bfd *abfd ATTRIBUTE_UNUSED,
> > >                      bool undefined_weak)
> > >  {
> > >    struct riscv_elf_link_hash_table *htab = riscv_elf_hash_table
> > > (link_info);
> > > -  bfd_vma gp = riscv_global_pointer_value (link_info);
> > > +  bfd_vma gp = htab->params->relax_gp
> > > +              ? riscv_global_pointer_value (link_info)
> > > +              : 0;
> > >
> > >    BFD_ASSERT (rel->r_offset + 4 <= sec->size);
> > >
> > > @@ -4942,7 +4944,7 @@ _bfd_riscv_relax_section (bfd *abfd, asection *sec,
> > >                    || type == R_RISCV_TPREL_LO12_I
> > >                    || type == R_RISCV_TPREL_LO12_S)
> > >             relax_func = _bfd_riscv_relax_tls_le;
> > > -         else if (!bfd_link_pic (info) && htab->params->relax_gp
> > > +         else if (!bfd_link_pic (info)
> > >                    && (type == R_RISCV_PCREL_HI20
> > >                        || type == R_RISCV_PCREL_LO12_I
> > >                        || type == R_RISCV_PCREL_LO12_S))
> > > --
> > > 2.39.2 (Apple Git-143)
> > >
> > >
diff mbox series

Patch

diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
index 499f51ee857..77a732b6a08 100644
--- a/bfd/elfnn-riscv.c
+++ b/bfd/elfnn-riscv.c
@@ -4721,7 +4721,9 @@  _bfd_riscv_relax_pc (bfd *abfd ATTRIBUTE_UNUSED,
 		     bool undefined_weak)
 {
   struct riscv_elf_link_hash_table *htab = riscv_elf_hash_table (link_info);
-  bfd_vma gp = riscv_global_pointer_value (link_info);
+  bfd_vma gp = htab->params->relax_gp
+	       ? riscv_global_pointer_value (link_info)
+	       : 0;
 
   BFD_ASSERT (rel->r_offset + 4 <= sec->size);
 
@@ -4942,7 +4944,7 @@  _bfd_riscv_relax_section (bfd *abfd, asection *sec,
 		   || type == R_RISCV_TPREL_LO12_I
 		   || type == R_RISCV_TPREL_LO12_S)
 	    relax_func = _bfd_riscv_relax_tls_le;
-	  else if (!bfd_link_pic (info) && htab->params->relax_gp
+	  else if (!bfd_link_pic (info)
 		   && (type == R_RISCV_PCREL_HI20
 		       || type == R_RISCV_PCREL_LO12_I
 		       || type == R_RISCV_PCREL_LO12_S))