diff mbox series

Symbols with GOT relocatios do not fix adjustbale

Message ID 20230414061935.1252692-1-mengqinggang@loongson.cn
State Accepted
Headers
Series Symbols with GOT relocatios do not fix adjustbale |

Checks

Context Check Description
snail/binutils-gdb-check success Github commit url

Commit Message

mengqinggang April 14, 2023, 6:19 a.m. UTC 
  If a local symbol loaded by GOT, do not fix adjustbale to avoid GOT
relocations' addend not equal to zero.

gas/ChangeLog:

	* config/tc-loongarch.c (loongarch_fix_adjustable): Symbols with
	GOT relocatios do not fix adjustbale.
	* testsuite/gas/loongarch/macro_op_large_abs.d: Regenerated.
	* testsuite/gas/loongarch/macro_op_large_pc.d: Regenerated.

ld/ChangeLog:

	* testsuite/ld-loongarch-elf/macro_op.d: Regenerated.
---
 gas/config/tc-loongarch.c                     |  15 +++
 .../gas/loongarch/macro_op_large_abs.d        | 120 +++++++++---------
 .../gas/loongarch/macro_op_large_pc.d         |  18 +--
 ld/testsuite/ld-loongarch-elf/macro_op.d      |  54 ++++----
 4 files changed, 111 insertions(+), 96 deletions(-)

Comments

Nick Clifton April 18, 2023, 10:51 a.m. UTC | #1 
Hi mengqinggang,

> If a local symbol loaded by GOT, do not fix adjustbale to avoid GOT
> relocations' addend not equal to zero.
> 
> gas/ChangeLog:
> 
> 	* config/tc-loongarch.c (loongarch_fix_adjustable): Symbols with
> 	GOT relocatios do not fix adjustbale.
> 	* testsuite/gas/loongarch/macro_op_large_abs.d: Regenerated.
> 	* testsuite/gas/loongarch/macro_op_large_pc.d: Regenerated.
> 
> ld/ChangeLog:
> 
> 	* testsuite/ld-loongarch-elf/macro_op.d: Regenerated.
  Patch approved and applied.

Thanks very much for contributing to the binutils.

Cheers
   Nick
diff mbox series

Patch

diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c
index dd47581ed7a..7d8749c5951 100644
--- a/gas/config/tc-loongarch.c
+++ b/gas/config/tc-loongarch.c
@@ -1270,6 +1270,21 @@  loongarch_fix_adjustable (fixS *fix)
       || S_FORCE_RELOC (fix->fx_addsy, true))
     return 0;
 
+  /* Loongarch loads extern symbols by GOT, and if there are embedded
+     asm(".local S"), gcc just output ".local S" to assembly file.
+     For a local symbol with GOT relocations, this adjustments will make
+     GOT relocation's addend not equal to zero. So this adjustments is
+     forbidden for got relocs.  */
+  if(fix->fx_r_type == BFD_RELOC_LARCH_GOT_PC_HI20
+      || fix->fx_r_type == BFD_RELOC_LARCH_GOT_PC_LO12
+      || fix->fx_r_type == BFD_RELOC_LARCH_GOT64_PC_LO20
+      || fix->fx_r_type == BFD_RELOC_LARCH_GOT64_PC_HI12
+      || fix->fx_r_type == BFD_RELOC_LARCH_GOT_HI20
+      || fix->fx_r_type == BFD_RELOC_LARCH_GOT_LO12
+      || fix->fx_r_type == BFD_RELOC_LARCH_GOT64_LO20
+      || fix->fx_r_type == BFD_RELOC_LARCH_GOT64_HI12)
+    return 0;
+
   return 1;
 }
 
diff --git a/gas/testsuite/gas/loongarch/macro_op_large_abs.d b/gas/testsuite/gas/loongarch/macro_op_large_abs.d
index c3214a859e6..c0b98dbbea2 100644
--- a/gas/testsuite/gas/loongarch/macro_op_large_abs.d
+++ b/gas/testsuite/gas/loongarch/macro_op_large_abs.d
@@ -1,4 +1,4 @@ 
-#as:
+#as: -mla-global-with-abs
 #objdump: -dr
 #skip: loongarch32-*-*
 
@@ -7,7 +7,7 @@ 
 
 Disassembly of section .text:
 
-00000000.* <.text>:
+00000000.* <.L1>:
 [ 	]+0:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0,[ 	]+0
 [ 	]+0:[ 	]+R_LARCH_PCALA_HI20[ 	]+.text
 [ 	]+4:[ 	]+02c00005[ 	]+addi.d[ 	]+\$a1,[ 	]+\$zero,[ 	]+0
@@ -17,61 +17,61 @@  Disassembly of section .text:
 [ 	]+c:[ 	]+030000a5[ 	]+lu52i.d[ 	]+\$a1,[ 	]+\$a1,[ 	]+0
 [ 	]+c:[ 	]+R_LARCH_PCALA64_HI12[ 	]+.text
 [ 	]+10:[ 	]+00109484[ 	]+add.d[ 	]+\$a0,[ 	]+\$a0,[ 	]+\$a1
-[ 	]+14:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0,[ 	]+0
-[ 	]+14:[ 	]+R_LARCH_GOT_PC_HI20[ 	]+.text
-[ 	]+18:[ 	]+02c00005[ 	]+addi.d[ 	]+\$a1,[ 	]+\$zero,[ 	]+0
-[ 	]+18:[ 	]+R_LARCH_GOT_PC_LO12[ 	]+.text
-[ 	]+1c:[ 	]+16000005[ 	]+lu32i.d[ 	]+\$a1,[ 	]+0
-[ 	]+1c:[ 	]+R_LARCH_GOT64_PC_LO20[ 	]+.text
-[ 	]+20:[ 	]+030000a5[ 	]+lu52i.d[ 	]+\$a1,[ 	]+\$a1,[ 	]+0
-[ 	]+20:[ 	]+R_LARCH_GOT64_PC_HI12[ 	]+.text
-[ 	]+24:[ 	]+380c1484[ 	]+ldx.d[ 	]+\$a0,[ 	]+\$a0,[ 	]+\$a1
-[ 	]+28:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0,[ 	]+0
-[ 	]+28:[ 	]+R_LARCH_PCALA_HI20[ 	]+.text
-[ 	]+2c:[ 	]+02c00005[ 	]+addi.d[ 	]+\$a1,[ 	]+\$zero,[ 	]+0
-[ 	]+2c:[ 	]+R_LARCH_PCALA_LO12[ 	]+.text
-[ 	]+30:[ 	]+16000005[ 	]+lu32i.d[ 	]+\$a1,[ 	]+0
-[ 	]+30:[ 	]+R_LARCH_PCALA64_LO20[ 	]+.text
-[ 	]+34:[ 	]+030000a5[ 	]+lu52i.d[ 	]+\$a1,[ 	]+\$a1,[ 	]+0
-[ 	]+34:[ 	]+R_LARCH_PCALA64_HI12[ 	]+.text
-[ 	]+38:[ 	]+00109484[ 	]+add.d[ 	]+\$a0,[ 	]+\$a0,[ 	]+\$a1
-[ 	]+3c:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0,[ 	]+0
-[ 	]+3c:[ 	]+R_LARCH_GOT_PC_HI20[ 	]+.text
-[ 	]+40:[ 	]+02c00005[ 	]+addi.d[ 	]+\$a1,[ 	]+\$zero,[ 	]+0
-[ 	]+40:[ 	]+R_LARCH_GOT_PC_LO12[ 	]+.text
-[ 	]+44:[ 	]+16000005[ 	]+lu32i.d[ 	]+\$a1,[ 	]+0
-[ 	]+44:[ 	]+R_LARCH_GOT64_PC_LO20[ 	]+.text
-[ 	]+48:[ 	]+030000a5[ 	]+lu52i.d[ 	]+\$a1,[ 	]+\$a1,[ 	]+0
-[ 	]+48:[ 	]+R_LARCH_GOT64_PC_HI12[ 	]+.text
-[ 	]+4c:[ 	]+380c1484[ 	]+ldx.d[ 	]+\$a0,[ 	]+\$a0,[ 	]+\$a1
-[ 	]+50:[ 	]+14000004[ 	]+lu12i.w[ 	]+\$a0,[ 	]+0
-[ 	]+50:[ 	]+R_LARCH_TLS_LE_HI20[ 	]+TLS1
-[ 	]+54:[ 	]+03800084[ 	]+ori[ 	]+\$a0,[ 	]+\$a0,[ 	]+0x0
-[ 	]+54:[ 	]+R_LARCH_TLS_LE_LO12[ 	]+TLS1
-[ 	]+58:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0,[ 	]+0
-[ 	]+58:[ 	]+R_LARCH_TLS_IE_PC_HI20[ 	]+TLS1
-[ 	]+5c:[ 	]+02c00005[ 	]+addi.d[ 	]+\$a1,[ 	]+\$zero,[ 	]+0
-[ 	]+5c:[ 	]+R_LARCH_TLS_IE_PC_LO12[ 	]+TLS1
-[ 	]+60:[ 	]+16000005[ 	]+lu32i.d[ 	]+\$a1,[ 	]+0
-[ 	]+60:[ 	]+R_LARCH_TLS_IE64_PC_LO20[ 	]+TLS1
-[ 	]+64:[ 	]+030000a5[ 	]+lu52i.d[ 	]+\$a1,[ 	]+\$a1,[ 	]+0
-[ 	]+64:[ 	]+R_LARCH_TLS_IE64_PC_HI12[ 	]+TLS1
-[ 	]+68:[ 	]+380c1484[ 	]+ldx.d[ 	]+\$a0,[ 	]+\$a0,[ 	]+\$a1
-[ 	]+6c:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0,[ 	]+0
-[ 	]+6c:[ 	]+R_LARCH_TLS_LD_PC_HI20[ 	]+TLS1
-[ 	]+70:[ 	]+02c00005[ 	]+addi.d[ 	]+\$a1,[ 	]+\$zero,[ 	]+0
-[ 	]+70:[ 	]+R_LARCH_GOT_PC_LO12[ 	]+TLS1
-[ 	]+74:[ 	]+16000005[ 	]+lu32i.d[ 	]+\$a1,[ 	]+0
-[ 	]+74:[ 	]+R_LARCH_GOT64_PC_LO20[ 	]+TLS1
-[ 	]+78:[ 	]+030000a5[ 	]+lu52i.d[ 	]+\$a1,[ 	]+\$a1,[ 	]+0
-[ 	]+78:[ 	]+R_LARCH_GOT64_PC_HI12[ 	]+TLS1
-[ 	]+7c:[ 	]+00109484[ 	]+add.d[ 	]+\$a0,[ 	]+\$a0,[ 	]+\$a1
-[ 	]+80:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0,[ 	]+0
-[ 	]+80:[ 	]+R_LARCH_TLS_GD_PC_HI20[ 	]+TLS1
-[ 	]+84:[ 	]+02c00005[ 	]+addi.d[ 	]+\$a1,[ 	]+\$zero,[ 	]+0
-[ 	]+84:[ 	]+R_LARCH_GOT_PC_LO12[ 	]+TLS1
-[ 	]+88:[ 	]+16000005[ 	]+lu32i.d[ 	]+\$a1,[ 	]+0
-[ 	]+88:[ 	]+R_LARCH_GOT64_PC_LO20[ 	]+TLS1
-[ 	]+8c:[ 	]+030000a5[ 	]+lu52i.d[ 	]+\$a1,[ 	]+\$a1,[ 	]+0
-[ 	]+8c:[ 	]+R_LARCH_GOT64_PC_HI12[ 	]+TLS1
-[ 	]+90:[ 	]+00109484[ 	]+add.d[ 	]+\$a0,[ 	]+\$a0,[ 	]+\$a1
+[ 	]+14:[ 	]+14000004[ 	]+lu12i.w[ 	]+\$a0,[ 	]+0
+[ 	]+14:[ 	]+R_LARCH_MARK_LA[ 	]+\*ABS\*
+[ 	]+14:[ 	]+R_LARCH_ABS_HI20[ 	]+.text
+[ 	]+18:[ 	]+03800084[ 	]+ori[ 	]+\$a0,[ 	]+\$a0,[ 	]+0x0
+[ 	]+18:[ 	]+R_LARCH_ABS_LO12[ 	]+.text
+[ 	]+1c:[ 	]+16000004[ 	]+lu32i.d[ 	]+\$a0,[ 	]+0
+[ 	]+1c:[ 	]+R_LARCH_ABS64_LO20[ 	]+.text
+[ 	]+20:[ 	]+03000084[ 	]+lu52i.d[ 	]+\$a0,[ 	]+\$a0,[ 	]+0
+[ 	]+20:[ 	]+R_LARCH_ABS64_HI12[ 	]+.text
+[ 	]+24:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0,[ 	]+0
+[ 	]+24:[ 	]+R_LARCH_PCALA_HI20[ 	]+.text
+[ 	]+28:[ 	]+02c00005[ 	]+addi.d[ 	]+\$a1,[ 	]+\$zero,[ 	]+0
+[ 	]+28:[ 	]+R_LARCH_PCALA_LO12[ 	]+.text
+[ 	]+2c:[ 	]+16000005[ 	]+lu32i.d[ 	]+\$a1,[ 	]+0
+[ 	]+2c:[ 	]+R_LARCH_PCALA64_LO20[ 	]+.text
+[ 	]+30:[ 	]+030000a5[ 	]+lu52i.d[ 	]+\$a1,[ 	]+\$a1,[ 	]+0
+[ 	]+30:[ 	]+R_LARCH_PCALA64_HI12[ 	]+.text
+[ 	]+34:[ 	]+00109484[ 	]+add.d[ 	]+\$a0,[ 	]+\$a0,[ 	]+\$a1
+[ 	]+38:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0,[ 	]+0
+[ 	]+38:[ 	]+R_LARCH_GOT_PC_HI20[ 	]+.L1
+[ 	]+3c:[ 	]+02c00005[ 	]+addi.d[ 	]+\$a1,[ 	]+\$zero,[ 	]+0
+[ 	]+3c:[ 	]+R_LARCH_GOT_PC_LO12[ 	]+.L1
+[ 	]+40:[ 	]+16000005[ 	]+lu32i.d[ 	]+\$a1,[ 	]+0
+[ 	]+40:[ 	]+R_LARCH_GOT64_PC_LO20[ 	]+.L1
+[ 	]+44:[ 	]+030000a5[ 	]+lu52i.d[ 	]+\$a1,[ 	]+\$a1,[ 	]+0
+[ 	]+44:[ 	]+R_LARCH_GOT64_PC_HI12[ 	]+.L1
+[ 	]+48:[ 	]+380c1484[ 	]+ldx.d[ 	]+\$a0,[ 	]+\$a0,[ 	]+\$a1
+[ 	]+4c:[ 	]+14000004[ 	]+lu12i.w[ 	]+\$a0,[ 	]+0
+[ 	]+4c:[ 	]+R_LARCH_TLS_LE_HI20[ 	]+TLS1
+[ 	]+50:[ 	]+03800084[ 	]+ori[ 	]+\$a0,[ 	]+\$a0,[ 	]+0x0
+[ 	]+50:[ 	]+R_LARCH_TLS_LE_LO12[ 	]+TLS1
+[ 	]+54:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0,[ 	]+0
+[ 	]+54:[ 	]+R_LARCH_TLS_IE_PC_HI20[ 	]+TLS1
+[ 	]+58:[ 	]+02c00005[ 	]+addi.d[ 	]+\$a1,[ 	]+\$zero,[ 	]+0
+[ 	]+58:[ 	]+R_LARCH_TLS_IE_PC_LO12[ 	]+TLS1
+[ 	]+5c:[ 	]+16000005[ 	]+lu32i.d[ 	]+\$a1,[ 	]+0
+[ 	]+5c:[ 	]+R_LARCH_TLS_IE64_PC_LO20[ 	]+TLS1
+[ 	]+60:[ 	]+030000a5[ 	]+lu52i.d[ 	]+\$a1,[ 	]+\$a1,[ 	]+0
+[ 	]+60:[ 	]+R_LARCH_TLS_IE64_PC_HI12[ 	]+TLS1
+[ 	]+64:[ 	]+380c1484[ 	]+ldx.d[ 	]+\$a0,[ 	]+\$a0,[ 	]+\$a1
+[ 	]+68:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0,[ 	]+0
+[ 	]+68:[ 	]+R_LARCH_TLS_LD_PC_HI20[ 	]+TLS1
+[ 	]+6c:[ 	]+02c00005[ 	]+addi.d[ 	]+\$a1,[ 	]+\$zero,[ 	]+0
+[ 	]+6c:[ 	]+R_LARCH_GOT_PC_LO12[ 	]+TLS1
+[ 	]+70:[ 	]+16000005[ 	]+lu32i.d[ 	]+\$a1,[ 	]+0
+[ 	]+70:[ 	]+R_LARCH_GOT64_PC_LO20[ 	]+TLS1
+[ 	]+74:[ 	]+030000a5[ 	]+lu52i.d[ 	]+\$a1,[ 	]+\$a1,[ 	]+0
+[ 	]+74:[ 	]+R_LARCH_GOT64_PC_HI12[ 	]+TLS1
+[ 	]+78:[ 	]+00109484[ 	]+add.d[ 	]+\$a0,[ 	]+\$a0,[ 	]+\$a1
+[ 	]+7c:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0,[ 	]+0
+[ 	]+7c:[ 	]+R_LARCH_TLS_GD_PC_HI20[ 	]+TLS1
+[ 	]+80:[ 	]+02c00005[ 	]+addi.d[ 	]+\$a1,[ 	]+\$zero,[ 	]+0
+[ 	]+80:[ 	]+R_LARCH_GOT_PC_LO12[ 	]+TLS1
+[ 	]+84:[ 	]+16000005[ 	]+lu32i.d[ 	]+\$a1,[ 	]+0
+[ 	]+84:[ 	]+R_LARCH_GOT64_PC_LO20[ 	]+TLS1
+[ 	]+88:[ 	]+030000a5[ 	]+lu52i.d[ 	]+\$a1,[ 	]+\$a1,[ 	]+0
+[ 	]+88:[ 	]+R_LARCH_GOT64_PC_HI12[ 	]+TLS1
+[ 	]+8c:[ 	]+00109484[ 	]+add.d[ 	]+\$a0,[ 	]+\$a0,[ 	]+\$a1
diff --git a/gas/testsuite/gas/loongarch/macro_op_large_pc.d b/gas/testsuite/gas/loongarch/macro_op_large_pc.d
index c3214a859e6..3b532755b6c 100644
--- a/gas/testsuite/gas/loongarch/macro_op_large_pc.d
+++ b/gas/testsuite/gas/loongarch/macro_op_large_pc.d
@@ -7,7 +7,7 @@ 
 
 Disassembly of section .text:
 
-00000000.* <.text>:
+00000000.* <.L1>:
 [ 	]+0:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0,[ 	]+0
 [ 	]+0:[ 	]+R_LARCH_PCALA_HI20[ 	]+.text
 [ 	]+4:[ 	]+02c00005[ 	]+addi.d[ 	]+\$a1,[ 	]+\$zero,[ 	]+0
@@ -18,13 +18,13 @@  Disassembly of section .text:
 [ 	]+c:[ 	]+R_LARCH_PCALA64_HI12[ 	]+.text
 [ 	]+10:[ 	]+00109484[ 	]+add.d[ 	]+\$a0,[ 	]+\$a0,[ 	]+\$a1
 [ 	]+14:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0,[ 	]+0
-[ 	]+14:[ 	]+R_LARCH_GOT_PC_HI20[ 	]+.text
+[ 	]+14:[ 	]+R_LARCH_GOT_PC_HI20[ 	]+.L1
 [ 	]+18:[ 	]+02c00005[ 	]+addi.d[ 	]+\$a1,[ 	]+\$zero,[ 	]+0
-[ 	]+18:[ 	]+R_LARCH_GOT_PC_LO12[ 	]+.text
+[ 	]+18:[ 	]+R_LARCH_GOT_PC_LO12[ 	]+.L1
 [ 	]+1c:[ 	]+16000005[ 	]+lu32i.d[ 	]+\$a1,[ 	]+0
-[ 	]+1c:[ 	]+R_LARCH_GOT64_PC_LO20[ 	]+.text
+[ 	]+1c:[ 	]+R_LARCH_GOT64_PC_LO20[ 	]+.L1
 [ 	]+20:[ 	]+030000a5[ 	]+lu52i.d[ 	]+\$a1,[ 	]+\$a1,[ 	]+0
-[ 	]+20:[ 	]+R_LARCH_GOT64_PC_HI12[ 	]+.text
+[ 	]+20:[ 	]+R_LARCH_GOT64_PC_HI12[ 	]+.L1
 [ 	]+24:[ 	]+380c1484[ 	]+ldx.d[ 	]+\$a0,[ 	]+\$a0,[ 	]+\$a1
 [ 	]+28:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0,[ 	]+0
 [ 	]+28:[ 	]+R_LARCH_PCALA_HI20[ 	]+.text
@@ -36,13 +36,13 @@  Disassembly of section .text:
 [ 	]+34:[ 	]+R_LARCH_PCALA64_HI12[ 	]+.text
 [ 	]+38:[ 	]+00109484[ 	]+add.d[ 	]+\$a0,[ 	]+\$a0,[ 	]+\$a1
 [ 	]+3c:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0,[ 	]+0
-[ 	]+3c:[ 	]+R_LARCH_GOT_PC_HI20[ 	]+.text
+[ 	]+3c:[ 	]+R_LARCH_GOT_PC_HI20[ 	]+.L1
 [ 	]+40:[ 	]+02c00005[ 	]+addi.d[ 	]+\$a1,[ 	]+\$zero,[ 	]+0
-[ 	]+40:[ 	]+R_LARCH_GOT_PC_LO12[ 	]+.text
+[ 	]+40:[ 	]+R_LARCH_GOT_PC_LO12[ 	]+.L1
 [ 	]+44:[ 	]+16000005[ 	]+lu32i.d[ 	]+\$a1,[ 	]+0
-[ 	]+44:[ 	]+R_LARCH_GOT64_PC_LO20[ 	]+.text
+[ 	]+44:[ 	]+R_LARCH_GOT64_PC_LO20[ 	]+.L1
 [ 	]+48:[ 	]+030000a5[ 	]+lu52i.d[ 	]+\$a1,[ 	]+\$a1,[ 	]+0
-[ 	]+48:[ 	]+R_LARCH_GOT64_PC_HI12[ 	]+.text
+[ 	]+48:[ 	]+R_LARCH_GOT64_PC_HI12[ 	]+.L1
 [ 	]+4c:[ 	]+380c1484[ 	]+ldx.d[ 	]+\$a0,[ 	]+\$a0,[ 	]+\$a1
 [ 	]+50:[ 	]+14000004[ 	]+lu12i.w[ 	]+\$a0,[ 	]+0
 [ 	]+50:[ 	]+R_LARCH_TLS_LE_HI20[ 	]+TLS1
diff --git a/ld/testsuite/ld-loongarch-elf/macro_op.d b/ld/testsuite/ld-loongarch-elf/macro_op.d
index a1c64fcf00f..39aa1fb929f 100644
--- a/ld/testsuite/ld-loongarch-elf/macro_op.d
+++ b/ld/testsuite/ld-loongarch-elf/macro_op.d
@@ -6,53 +6,53 @@ 
 
 Disassembly of section .text:
 
-00000000.* <.text>:
+00000000.* <.L1>:
 [ 	]+0:[ 	]+00150004[ 	]+move[ 	]+\$a0,[ 	]+\$zero
 [ 	]+4:[ 	]+02bffc04[ 	]+addi.w[ 	]+\$a0,[ 	]+\$zero,[ 	]+-1\(0xfff\)
 [ 	]+8:[ 	]+00150004[ 	]+move[ 	]+\$a0,[ 	]+\$zero
 [ 	]+c:[ 	]+02bffc04[ 	]+addi.w[ 	]+\$a0,[ 	]+\$zero,[ 	]+-1\(0xfff\)
 [ 	]+10:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0,[ 	]+0
-[ 	]+10:[ 	]+R_LARCH_GOT_PC_HI20[ 	]+.text
+[ 	]+10:[ 	]+R_LARCH_GOT_PC_HI20[ 	]+.L1
 [ 	]+14:[ 	]+28c00084[ 	]+ld.d[ 	]+\$a0,[ 	]+\$a0,[ 	]+0
-[ 	]+14:[ 	]+R_LARCH_GOT_PC_LO12[ 	]+.text
+[ 	]+14:[ 	]+R_LARCH_GOT_PC_LO12[ 	]+.L1
 [ 	]+18:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0,[ 	]+0
-[ 	]+18:[ 	]+R_LARCH_GOT_PC_HI20[ 	]+.text
+[ 	]+18:[ 	]+R_LARCH_GOT_PC_HI20[ 	]+.L1
 [ 	]+1c:[ 	]+28c00084[ 	]+ld.d[ 	]+\$a0,[ 	]+\$a0,[ 	]+0
-[ 	]+1c:[ 	]+R_LARCH_GOT_PC_LO12[ 	]+.text
+[ 	]+1c:[ 	]+R_LARCH_GOT_PC_LO12[ 	]+.L1
 [ 	]+20:[ 	]+1a000004[ 	]+pcalau12i[ 	]+\$a0,[ 	]+0
-[ 	]+20:[ 	]+R_LARCH_GOT_PC_HI20[ 	]+.text
+[ 	]+20:[ 	]+R_LARCH_GOT_PC_HI20[ 	]+.L1
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 [ 	]+44:[ 	]+16000005[ 	]+lu32i.d[ 	]+\$a1,[ 	]+0
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 [ 	]+48:[ 	]+030000a5[ 	]+lu52i.d[ 	]+\$a1,[ 	]+\$a1,[ 	]+0
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-[ 	]+5c:[ 	]+R_LARCH_GOT_PC_LO12[ 	]+.text
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 [ 	]+60:[ 	]+16000005[ 	]+lu32i.d[ 	]+\$a1,[ 	]+0
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 [ 	]+64:[ 	]+030000a5[ 	]+lu52i.d[ 	]+\$a1,[ 	]+\$a1,[ 	]+0
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@@ -107,17 +107,17 @@  Disassembly of section .text:
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