From patchwork Mon Apr 3 11:06:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: YunQiang Su X-Patchwork-Id: 78496 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp2214836vqo; Mon, 3 Apr 2023 04:07:17 -0700 (PDT) X-Google-Smtp-Source: AKy350bcI7bJGwQnYc5D2kbG0Nbr5+lmaA4w5ynbHNhhTwPMc0jACMzuhcVQ/gePCMxEYjWx+ryF X-Received: by 2002:a17:906:7193:b0:931:7adf:547e with SMTP id h19-20020a170906719300b009317adf547emr37001325ejk.70.1680520036841; Mon, 03 Apr 2023 04:07:16 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1680520036; cv=pass; d=google.com; s=arc-20160816; b=oQDt7dunureSndjfPbV2B3x5qcVG4nlBOveDAqJUBXTUNtEUXopB2xJGX1Qh7DYgno 0r2DhhjCBwMZv+S6JTzzvfr61xpmh5CUXDv+fMSFAxRwlrDWeDT7jFICtpAJbbZS3spw AxgrCQ2SsWANQP960t+yk4tSeCzfYIg9DBoLMZfefmvXu6cf7tIhkQiilxKXcjU7QNIz wK5WktwcwWBCkRiu3VockT3eIBYncYmNPT+WvQaIJv6xJF+oTRfdmQCfmmDPmED0y3km NCDyMt00uGKkH/EzUX7QNBhlA3246jYiGnt1hxQ1Lfo/ludQYtvrKsSSYNSL0sM0vLBE dVcA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:mime-version :content-transfer-encoding:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dmarc-filter:delivered-to; bh=hyCz/poNeV+wLVU9Y2RAWbvml0AeYeA8H6usq6rk5yw=; b=vPNxDZzB8mASsEaD0tN7J08f/2QlNAhatw6ECG79RYPBZVRV0eeg1e8Y4XfxLQUPLw SuHiXqAUTMb6CIGxjuO7a/MYXx+UwS7nk8Kl3HMLd5c5ePV3FglJEpjQbUX2A8DpZr+i NAXEyqiktL50rfo794lppulEjPbF415Uh0y81oV9tI/jOM1fF5fUTmyHj+W+I8EpLKKh OI5hUUpzBBs4EW0gPJys9mTLGCKp+A8SEewKS5yKKkmxa0u8RmSEn1K+QAo8+RNPKvRE J/bRNS3kd5Llo1RLVUFreiOUHjMhVwgJwDlwwYdvBr0bP8Kz774Xc215uShfZyFPybGt 53Rw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@cipunited.onmicrosoft.com header.s=selector1-cipunited-onmicrosoft-com header.b=R4aRaVTC; arc=pass (i=1 spf=pass spfdomain=cipunited.com dkim=pass dkdomain=cipunited.com dmarc=pass fromdomain=cipunited.com); spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org" Received: from sourceware.org (ip-8-43-85-97.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id j16-20020a17090643d000b009476ce98aedsi7552413ejn.612.2023.04.03.04.07.16 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Apr 2023 04:07:16 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@cipunited.onmicrosoft.com header.s=selector1-cipunited-onmicrosoft-com header.b=R4aRaVTC; arc=pass (i=1 spf=pass spfdomain=cipunited.com dkim=pass dkdomain=cipunited.com dmarc=pass fromdomain=cipunited.com); spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 726193858017 for ; Mon, 3 Apr 2023 11:07:13 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from APC01-PSA-obe.outbound.protection.outlook.com (mail-psaapc01on2111.outbound.protection.outlook.com [40.107.255.111]) by sourceware.org (Postfix) with ESMTPS id 910303858D37 for ; Mon, 3 Apr 2023 11:07:02 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 910303858D37 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=cipunited.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=cipunited.com ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=g48htAmiv1RO3iW8ebl2baDYakOn0t2cz28fj923wcUsW/iw81C2dm2v4UI6Fmdfb7iBvshf7+iAzxn0AUMqJzkYEGfTqg8y4H9N6bOiBTwa3zRmNG/c1n38rghPWGexTeuy++rLX/kZiAoNgwt5PLMbyMSI6RQhDrSUV7wADl/zCJh8JLoyvx4XsSHumXwesob6aywjJAIPM0f3Uw8i+8iuZ34Ovs/lMsYDU5wp96vh02EEjzoyi7EDi1igH0S33uF1Xh8eryWLX5l4H8qY/x7C8f62SE0Qf6uDcGAiqbp7X12D6beh01NfWOU53lBn0MaJoJ9D9oNEbsedAcjy7w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=hyCz/poNeV+wLVU9Y2RAWbvml0AeYeA8H6usq6rk5yw=; b=Vw6wdJrHlljlgp0RN+otnTYHHf5/KA+Km5NV3cIBK+4qcanzhNqNOA9H3JwFZCDG/sAkgwVheIHVkKlMGkF/zoRJT7rRHyAF8M94bs7Mmk+2VTHvAqPUvFFiJoTCpeBGRxUy8hNZH3Y8wk2ENqbZzUgZAOfamIbDTXzgzd+7AFSKFsYuntE5V6cuwSrBvvw8hlES/cSUh9nT75ZlIEBQ3PGmoZ3dZQA4wF7WJxydTQjgqJi8nQ4M2c99iSDGGAVF5BKvA4wWnK3FlE/eO4M+lae6nQ7gIb11VOqhszdgD7V3/XVnJ0TSu0GPGwPIKE/l9VNnJpI3zrlchdcRohXAMw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=cipunited.com; dmarc=pass action=none header.from=cipunited.com; dkim=pass header.d=cipunited.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cipunited.onmicrosoft.com; s=selector1-cipunited-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=hyCz/poNeV+wLVU9Y2RAWbvml0AeYeA8H6usq6rk5yw=; b=R4aRaVTCX7GzgX3oimKEd9fY81u0p6BCB1dKM6GQsmtHy9BsroDD6jEDaHKGnBrntiD+GqtbhfK7stRP49xygF+0342mAIoNLyTC0pPy1rXjHD1oqGWdYVkjubjumehVAwYkAeUy1CX3svVMrn3EYnd5Xki+r1orXbfadgs6Oho= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=cipunited.com; Received: from TYZPR04MB6117.apcprd04.prod.outlook.com (2603:1096:400:25a::9) by SEZPR04MB5699.apcprd04.prod.outlook.com (2603:1096:101:3b::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6254.26; Mon, 3 Apr 2023 11:06:56 +0000 Received: from TYZPR04MB6117.apcprd04.prod.outlook.com ([fe80::351b:75af:3dc5:6c46]) by TYZPR04MB6117.apcprd04.prod.outlook.com ([fe80::351b:75af:3dc5:6c46%8]) with mapi id 15.20.6254.032; Mon, 3 Apr 2023 11:06:56 +0000 From: YunQiang Su To: binutils@sourceware.org Cc: syq@debian.org, macro@orcam.me.uk, xry111@xry111.site, richard.sandiford@arm.com, jiaxun.yang@flygoat.com, amodra@gmail.com, YunQiang Su Subject: [PATCH v2] MIPS: the default output fellows triple and with-arch Date: Mon, 3 Apr 2023 19:06:35 +0800 Message-Id: <20230403110635.23391-1-yunqiang.su@cipunited.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230223111115.3752443-1-yunqiang.su@cipunited.com> References: <20230223111115.3752443-1-yunqiang.su@cipunited.com> X-ClientProxiedBy: TYCP286CA0247.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:456::18) To TYZPR04MB6117.apcprd04.prod.outlook.com (2603:1096:400:25a::9) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: TYZPR04MB6117:EE_|SEZPR04MB5699:EE_ X-MS-Office365-Filtering-Correlation-Id: 9fa4560c-46d7-42d1-e599-08db34338989 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: u3HuuuN/UG0mcsdOfS3NtuAcDhiQN6XvaA6xtpgJIJNx8+n5IxknLnL3YxMCzE46PAOnb9KQa4djSVrkuAn13i/lEc7eWlRRB+iR7tVnSsH6wee8imaxHNlR0JCR4HZTj5rvIemVd7MC1jTYqtAm2U7K+sxRYpqAJ8L293A5MV3tmKDQ4OWUTLtn9x2TtiVP2WDqqDYO60Eq99VDH/dRYpz+SX1/k2kYtpG0PbllA3bePinuvkAd3JxAi/C/O52/Q2e9TmXLxPeK2arqf9+r7d5Qgc687AN8Ee6W5+ch0deWnL9NXznKdj3K25W0DF+cKAp3YqzmmMM7bURMKL/WdMM9YhYMD4f1qKA+V0FolM2/7cf1ICbnAE3WouTf3b1z8T7EV7rVuoJVU34B23F45xFpXikyEXs949sTNyK1627YuOSyw/dvBR41toXKM9ejIqiQXM9dmMWY2xr7x+jga4d2cYjflS9pHLfZz7W9HUp0PEKhz+67XVwRCNEa2KIjjPNAc8gc+u/fAm0ueHUTRqyuSrsixPWIUpkYXHA+enzgXbqtrkZolvKAq8tP3BXjv7ZXxn9w0wfV4PDKaYRjD7jZkvvVN77XuObYBf4uHyPH3VFa5fa2cBffpxT5V/21 X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:TYZPR04MB6117.apcprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230028)(39830400003)(396003)(136003)(376002)(346002)(366004)(451199021)(66476007)(66556008)(1076003)(66946007)(6512007)(86362001)(6506007)(8676002)(6916009)(4326008)(26005)(186003)(36756003)(6486002)(316002)(52116002)(107886003)(478600001)(6666004)(38100700002)(38350700002)(8936002)(5660300002)(2616005)(2906002)(30864003)(83380400001)(41300700001); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: XfUxGFv0dtulkqb0jXDXnylvO3HPEqhyUz3e3xYW4BAiBRuMgN9+n/udU+ZMXdBKYY5MbfIsCfec/u4YVU424+UG39H9ib8grZAjKACAUihJHtMBoKUg/8jhTQLMOSFiojIy7sHXSx2819GXJiM5jUyMtGH/zW0T8UVc7nPgvZFfDmLLwmEjTVqNZq25ja42vC4q+dFdcAn3r8hgcpvmkZJi3Y4CRIVhkzcLgp80SNVeoXfN87Q1JWIH1ReXRkIr5FWgzjEXbHtWBh0egB2VTKl/h9Fli0xk36Mqz5wxGhdUuDYOqvqD689PnijtLUi9ar7c85fWxDX0QJrDD8+5SpobCZndudVdkufFRF9eUrZq3FhH+fiLKynVz6DPrYoOAe4mk9UyyrequMeELF10CVCsJqRAPsEsig9wp2lu94W6ZYy+JHIu6v6efEoPabKVP5rc9L+2ucq9dK5sbuNjlVyLEVMgK5kHgusbiPh8GLB+2+SCpx+iXkjS8SI/2fvCYiy+X6hHIfsE3TTjXgkKbjVb6hyg/2xHaC1AyTtwHxNlDtETwTy2Hu8xkv579eQOb5zsiRhL3GorL5vs4A83ccrlz8Em3uMjduqLJA1EvyNqcYmpek40n0Bex9Z+7pAGkfnv0hUeIiqJf5WABhMSMnsQZxYzBrNVNKjUPWa8SuwVTOpLn1BomEJJjUDzOuFPvNoWQVq0yD6C7RdwrR2GjoLjOHFFO+ZwD/i4VX8fWbm6TWYrJ9xuTx5HGB9PvIWZcDg3z6SpLCZWDniVrgcn390IaE7OxbQKhR2eJ+DnmEZ6hI4fT0r5NCHlAMz+8KR+mlCfXhHOfQGppu95musPs+yofOxqI42DKBAIaKfWQmpE36OhkkXKcgweIgwOUarEQeVZRV4Z5Yc8rbknUSqA3yBUIyaQU/+BpU4JFmffhTIOG0/ftZIgG4OKPYqRH15JXxVcmnSWmH7H47CQUxB19+Df4j5KlHswUMRlOdWrmTeSS8ZoFwL3ktC620O6SQAvDXbnHrzxR8WXFvsVhex+nASWBOrmpGy/TjN4HjJu98CYmz9S4/fZJpbwQW8qU3FDPgH5Qm9xXhxp9eyN1AefY51aTZRfyYTPBBBiRHZ+33TDOTjQj8s/MQQLHKNL9lAsaWI0GS/ETCcWCzjuzrDn/YgwlYyHkssK9CBN0GDlvJAalZjHxMNYhbTXxxhnMVXyATZlvl7UiMelGrIUWlLYFFSsuZPxXXft1/KHSZilZd+QxXzLxSY1BQZLQRt8yY8I5EOxAwW2/j1iX1AKFY5NyTRDvRTV02S89jgl/rc6k3BcI7j11VRKdJPlFaap5jdoz4OljWs++AP+EZ+8izHRVAojDicuFU+QPF3X3Ye2l1XnNfbu6qMLtNhP+LqwxKcsaFfcTt6q1TrAY1yO+KfBGk7wABmLUTA1lAHnoHp6mViYnrHitlaAQlof5GsEvlnLGB2WJZHYfn48wfAieCNYEsm3viO3jbmhROf/EHMhVkJkL700+D6yLc+L7/NLRPQRdaR/vXU4uJ/gAKMr0eioqDpltT3DZaC5loBCMN5gBbocLb+mLOAJuG3glMi9h2LCnoSoQjllHOlXBUP6FQwMtQ== X-OriginatorOrg: cipunited.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9fa4560c-46d7-42d1-e599-08db34338989 X-MS-Exchange-CrossTenant-AuthSource: TYZPR04MB6117.apcprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Apr 2023 11:06:56.2226 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: e31cf5b5-ee69-4d5f-9c69-edeeda2458c0 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: H2Sw2eToELpQs1HHLBmH350aNMalZJa/QD3fuK4e4WMD5IUw6jqpGAFT4YMPjDzXQP4OQMH7eBDPaN/NIV5NGk25CuoofyAJkiNcCBlJ+y4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SEZPR04MB5699 X-Spam-Status: No, score=-13.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1762152977730855553?= X-GMAIL-MSGID: =?utf-8?q?1762152977730855553?= PR 25494. 1. as fellows the isa level in triple of target and the --with-arch buildtime option: > as -march=from-abi xx.s > as xx.s 2. ld fellows the isa level in triple of target > ld -r -b binary xx.dat -o xx.o --- bfd/Makefile.in | 1 + bfd/config.bfd | 48 ++++++++++++- bfd/configure | 5 ++ bfd/configure.ac | 4 ++ bfd/elfxx-mips.c | 61 +++++++++++++++- .../binutils-all/mips/mips-note-2-n32.d | 1 + gas/config/tc-mips.c | 70 +++++++++++++++++-- gas/configure | 20 +++++- gas/configure.ac | 18 ++++- gold/configure.tgt | 14 ++++ ld/configure.tgt | 12 +++- 11 files changed, 241 insertions(+), 13 deletions(-) diff --git a/bfd/Makefile.in b/bfd/Makefile.in index 82aa96f30e5..7b7b262d64e 100644 --- a/bfd/Makefile.in +++ b/bfd/Makefile.in @@ -332,6 +332,7 @@ CPPFLAGS = @CPPFLAGS@ CYGPATH_W = @CYGPATH_W@ DATADIRNAME = @DATADIRNAME@ DEBUGDIR = @DEBUGDIR@ +DEFAULT_ARCH = @DEFAULT_ARCH@ DEFS = @DEFS@ DEPDIR = @DEPDIR@ DSYMUTIL = @DSYMUTIL@ diff --git a/bfd/config.bfd b/bfd/config.bfd index 7af481048db..f5f3b08e50b 100644 --- a/bfd/config.bfd +++ b/bfd/config.bfd @@ -227,6 +227,40 @@ z8k*) targ_archs=bfd_z8k_arch ;; *) targ_archs=bfd_${targ_cpu}_arch ;; esac +case "${targ}" in + mipsisa64r6*) + DEFAULT_ARCH=mips64r6 + ;; + mipsisa64r5*) + DEFAULT_ARCH=mips64r5 + ;; + mipsisa64r3*) + DEFAULT_ARCH=mips64r3 + ;; + mipsisa64r2*) + DEFAULT_ARCH=mips64r2 + ;; + mipsisa64*) + DEFAULT_ARCH=mips64 + ;; + mipsisa32r6*) + DEFAULT_ARCH=mips32r6 + ;; + mipsisa32r5*) + DEFAULT_ARCH=mips32r5 + ;; + mipsisa32r3*) + DEFAULT_ARCH=mips32r3 + ;; + mipsisa32r2*) + DEFAULT_ARCH=mips32r2 + ;; + mipsisa32*) + DEFAULT_ARCH=mips32 + ;; + *) + ;; +esac # WHEN ADDING ENTRIES TO THIS MATRIX: # Make sure that the left side always has two dashes. Otherwise you @@ -941,11 +975,21 @@ case "${targ}" in targ_defvec=mips_elf32_be_vec targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec mips_ecoff_be_vec mips_ecoff_le_vec" ;; - mips64*el-*-linux*) + mips*64*el-*-linux*-gnuabi64) + targ_defvec=mips_elf64_trad_le_vec + targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec" + want64=true + ;; + mips*64*-*-linux*-gnuabi64) + targ_defvec=mips_elf64_trad_be_vec + targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_le_vec" + want64=true + ;; + mips*64*el-*-linux*) targ_defvec=mips_elf32_ntrad_le_vec targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_trad_le_vec mips_elf32_trad_be_vec mips_elf64_trad_le_vec mips_elf64_trad_be_vec" ;; - mips64*-*-linux*) + mips*64*-*-linux*) targ_defvec=mips_elf32_ntrad_be_vec targ_selvecs="mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec mips_elf64_trad_le_vec" ;; diff --git a/bfd/configure b/bfd/configure index 41d280ef461..3fc9aa6fdc2 100755 --- a/bfd/configure +++ b/bfd/configure @@ -695,6 +695,7 @@ WARN_CFLAGS REPORT_BUGS_TEXI REPORT_BUGS_TO PKGVERSION +DEFAULT_ARCH DEBUGDIR ENABLE_BFD_64_BIT_FALSE ENABLE_BFD_64_BIT_TRUE @@ -13775,6 +13776,10 @@ do fi done +if test -n "$DEFAULT_ARCH"; then + TDEFINES="$TDEFINES -DDEFAULT_ARCH=\\\"${DEFAULT_ARCH}\\\"" +fi + # This processing still needs to be done if we're to decide properly whether # 64-bit support needs to be compiled in. Currently, it will be included if diff --git a/bfd/configure.ac b/bfd/configure.ac index f044616f4d9..b432d7cf10f 100644 --- a/bfd/configure.ac +++ b/bfd/configure.ac @@ -341,6 +341,10 @@ do TDEFINES="$TDEFINES $targ_cflags" fi done + +if test -n "$DEFAULT_ARCH"; then + TDEFINES="$TDEFINES -DDEFAULT_ARCH=\\\"${DEFAULT_ARCH}\\\"" +fi AC_SUBST(TDEFINES) # This processing still needs to be done if we're to decide properly whether diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c index d34a755807b..61f00981bfc 100644 --- a/bfd/elfxx-mips.c +++ b/bfd/elfxx-mips.c @@ -47,6 +47,15 @@ #include "hashtab.h" +/* A table describing all ISA and its 32bit and 64bit version for best matching */ +struct mips_eflags_32_64 +{ + const char *name; + flagword e_mips_arch; + flagword e_mips_arch32; + flagword e_mips_arch64; +}; + /* Types of TLS GOT entry. */ enum mips_got_tls_type { GOT_TLS_NONE, @@ -1306,6 +1315,28 @@ bfd_get_micromips_32 (const bfd *abfd, const bfd_byte *ptr) #define TP_OFFSET 0x7000 #define DTP_OFFSET 0x8000 +/* A table describing all ISA and its 32bit and 64bit version for best matching */ +__attribute__ ((unused)) +static const struct mips_eflags_32_64 mips_eflags_32_64_table[] = +{ + { "mips1", E_MIPS_ARCH_1, E_MIPS_ARCH_1, E_MIPS_ARCH_3}, + { "mips2", E_MIPS_ARCH_2, E_MIPS_ARCH_2, E_MIPS_ARCH_3}, + { "mips3", E_MIPS_ARCH_3, E_MIPS_ARCH_2, E_MIPS_ARCH_3}, + { "mips4", E_MIPS_ARCH_3, E_MIPS_ARCH_2, E_MIPS_ARCH_4}, + { "mips5", E_MIPS_ARCH_5, E_MIPS_ARCH_2, E_MIPS_ARCH_5}, + { "mips32", E_MIPS_ARCH_32, E_MIPS_ARCH_32, E_MIPS_ARCH_64}, + { "mips32r2", E_MIPS_ARCH_32R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2}, + { "mips32r3", E_MIPS_ARCH_32R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2}, + { "mips32r5", E_MIPS_ARCH_32R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2}, + { "mips32r6", E_MIPS_ARCH_32R6, E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6}, + { "mips64", E_MIPS_ARCH_64, E_MIPS_ARCH_32, E_MIPS_ARCH_64}, + { "mips64r2", E_MIPS_ARCH_64R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2}, + { "mips64r3", E_MIPS_ARCH_64R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2}, + { "mips64r5", E_MIPS_ARCH_64R2, E_MIPS_ARCH_32R2, E_MIPS_ARCH_64R2}, + { "mips64r6", E_MIPS_ARCH_64R6, E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6}, + { NULL, 0, 0, 0 } +}; + static bfd_vma dtprel_base (struct bfd_link_info *info) { @@ -12316,6 +12347,30 @@ _bfd_mips_elf_finish_dynamic_sections (bfd *output_bfd, } +/* Get the E_MIPA_ARCH_?? value for the DEFAULT_ARCH + The value of bits can be 32/64 or 0 (guess from DEFAULT_ARCH) + */ +static flagword mips_get_default_arch_eflags(int bits) +{ +#ifdef DEFAULT_ARCH + int i; + + for (i = 0; mips_eflags_32_64_table[i].name; i++) + if (strcasecmp (mips_eflags_32_64_table[i].name, DEFAULT_ARCH) != 0) + continue; + else if (bits == 32) + return mips_eflags_32_64_table[i].e_mips_arch32; + else if (bits == 64) + return mips_eflags_32_64_table[i].e_mips_arch64; + else if (bits == 0) + return mips_eflags_32_64_table[i].e_mips_arch; +#endif + + if (bits == 64) + return E_MIPS_ARCH_3; + return E_MIPS_ARCH_1; +} + /* Set ABFD's EF_MIPS_ARCH and EF_MIPS_MACH flags. */ static void @@ -12327,9 +12382,11 @@ mips_set_isa_flags (bfd *abfd) { default: if (ABI_N32_P (abfd) || ABI_64_P (abfd)) - val = E_MIPS_ARCH_3; + val = mips_get_default_arch_eflags(64); + else if (ABI_O32_P (abfd)) + val = mips_get_default_arch_eflags(32); else - val = E_MIPS_ARCH_1; + val = mips_get_default_arch_eflags(0); break; case bfd_mach_mips3000: diff --git a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d index c2a581858ed..5e24e7a115e 100644 --- a/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d +++ b/binutils/testsuite/binutils-all/mips/mips-note-2-n32.d @@ -1,4 +1,5 @@ #PROG: objcopy +#as: -n32 #readelf: --notes --wide #objcopy: --merge-notes #name: MIPS merge notes section (n32) diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index e911aaa904a..c906471eb92 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -1422,6 +1422,15 @@ static int relaxed_micromips_16bit_branch_length (fragS *, asection *, int); static int relaxed_micromips_32bit_branch_length (fragS *, asection *, int); static void file_mips_check_options (void); +/* A table describing all ISA and its 32bit and 64bit version for best matching */ + +struct mips_isa_32_64 +{ + int isa; + int isa_32; + int isa_64; +}; + /* Table and functions used to map between CPU/ISA names, and ISA levels, and CPU numbers. */ @@ -1439,6 +1448,7 @@ struct mips_cpu_info static const struct mips_cpu_info *mips_parse_cpu (const char *, const char *); static const struct mips_cpu_info *mips_cpu_info_from_isa (int); static const struct mips_cpu_info *mips_cpu_info_from_arch (int); +static int mips_cpu_isa_32_64(int isa, int bits); /* Command-line options. */ const char *md_shortopts = "O::g::G:"; @@ -19979,6 +19989,28 @@ s_mips_mask (int reg_type) } } + +/* A table describing all ISA and its 32bit and 64bit version for best matching */ +static const struct mips_isa_32_64 mips_isa_32_64_table[] = +{ + { ISA_MIPS1, ISA_MIPS1, ISA_MIPS3 }, + { ISA_MIPS2, ISA_MIPS2, ISA_MIPS3 }, + { ISA_MIPS3, ISA_MIPS2, ISA_MIPS3 }, + { ISA_MIPS4, ISA_MIPS2, ISA_MIPS4 }, + { ISA_MIPS5, ISA_MIPS2, ISA_MIPS5 }, + { ISA_MIPS32, ISA_MIPS32, ISA_MIPS64 }, + { ISA_MIPS32R2, ISA_MIPS32R2, ISA_MIPS64R2 }, + { ISA_MIPS32R3, ISA_MIPS32R3, ISA_MIPS64R3 }, + { ISA_MIPS32R5, ISA_MIPS32R5, ISA_MIPS64R5 }, + { ISA_MIPS32R6, ISA_MIPS32R6, ISA_MIPS64R6 }, + { ISA_MIPS64, ISA_MIPS32, ISA_MIPS64 }, + { ISA_MIPS64R2, ISA_MIPS32R2, ISA_MIPS64R2 }, + { ISA_MIPS64R3, ISA_MIPS32R3, ISA_MIPS64R3 }, + { ISA_MIPS64R5, ISA_MIPS32R5, ISA_MIPS64R5 }, + { ISA_MIPS64R6, ISA_MIPS32R6, ISA_MIPS64R6 }, + { 0, 0, 0 } +}; + /* A table describing all the processors gas knows about. Names are matched in the order listed. @@ -20223,6 +20255,9 @@ static const struct mips_cpu_info * mips_parse_cpu (const char *option, const char *cpu_string) { const struct mips_cpu_info *p; + const struct mips_cpu_info *default_cpu; + int default_isa32 = ISA_MIPS1; + int default_isa64 = ISA_MIPS3; /* 'from-abi' selects the most compatible architecture for the given ABI: MIPS I for 32-bit ABIs and MIPS III for 64-bit ABIs. For the @@ -20236,19 +20271,26 @@ mips_parse_cpu (const char *option, const char *cpu_string) 'mips64', just as we did in the days before 'from-abi'. */ if (strcasecmp (cpu_string, "from-abi") == 0) { + for (default_cpu = mips_cpu_info_table; default_cpu->name != 0; default_cpu++) + if (mips_matching_cpu_name_p (default_cpu->name, MIPS_CPU_STRING_DEFAULT)) + { + default_isa32 = mips_cpu_isa_32_64 (default_cpu->isa, 32); + default_isa64 = mips_cpu_isa_32_64 (default_cpu->isa, 64); + break; + } if (ABI_NEEDS_32BIT_REGS (mips_abi)) - return mips_cpu_info_from_isa (ISA_MIPS1); + return mips_cpu_info_from_isa (default_isa32); if (ABI_NEEDS_64BIT_REGS (mips_abi)) - return mips_cpu_info_from_isa (ISA_MIPS3); + return mips_cpu_info_from_isa (default_isa64); if (file_mips_opts.gp >= 0) return mips_cpu_info_from_isa (file_mips_opts.gp == 32 - ? ISA_MIPS1 : ISA_MIPS3); + ? default_isa32 : default_isa64); return mips_cpu_info_from_isa (MIPS_DEFAULT_64BIT - ? ISA_MIPS3 - : ISA_MIPS1); + ? default_isa64 + : default_isa32); } /* 'default' has traditionally been a no-op. Probably not very useful. */ @@ -20263,6 +20305,24 @@ mips_parse_cpu (const char *option, const char *cpu_string) return 0; } +/* Return the best matching 32bit/64bit ISA of a ISA, according the table + mips_isa_32_64_table */ +static int +mips_cpu_isa_32_64(int isa, int bits) +{ + int i; + + for (i = 0; mips_isa_32_64_table[i].isa != 0; i++) + if (isa != mips_isa_32_64_table[i].isa) + continue; + else if (bits == 32) + return mips_isa_32_64_table[i].isa_32; + else if (bits == 64) + return mips_isa_32_64_table[i].isa_64; + + return 0; +} + /* Return the canonical processor information for ISA (a member of the ISA_MIPS* enumeration). */ diff --git a/gas/configure b/gas/configure index b56836998ef..11b0a56bbd4 100755 --- a/gas/configure +++ b/gas/configure @@ -12201,6 +12201,21 @@ _ACEOF as_fn_error $? "$target_cpu isn't a supported MIPS CPU name" "$LINENO" 5 ;; esac + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-arch" >&5 +$as_echo_n "checking for default configuration of --with-arch... " >&6; } + if test "x${with_arch}" != x; then + case ${with_arch} in + mips1 | mips2 | mips32 | mips32r2 | mips32r3 | mips32r5 | mips32r6 | \ + mips3 | mips4 | mips5 | mips64 | mips64r2 | mips64r3 | mips64r5 | mips64r6) + mips_cpu=${with_arch} + ;; + *) + as_fn_error $? "This kind of arch name does *NOT* exist!" "$LINENO" 5 + ;; + esac + fi + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $with_arch" >&5 +$as_echo "$with_arch" >&6; } # See whether it's appropriate to set E_MIPS_ABI_O32 for o32 # binaries. It's a GNU extension that some OSes don't understand. case ${target} in @@ -12223,7 +12238,10 @@ _ACEOF esac # Decide which ABI to target by default. case ${target} in - mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \ + mips*64*-linux-gnuabi64) + mips_default_abi=N64_ABI + ;; + mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \ | mips64*-kfreebsd*-gnu | mips64*-ps2-elf*) mips_default_abi=N32_ABI ;; diff --git a/gas/configure.ac b/gas/configure.ac index 6a68fd7c4e6..a126a3fda5d 100644 --- a/gas/configure.ac +++ b/gas/configure.ac @@ -370,6 +370,19 @@ changequote([,])dnl AC_MSG_ERROR($target_cpu isn't a supported MIPS CPU name) ;; esac + AC_MSG_CHECKING(for default configuration of --with-arch) + if test "x${with_arch}" != x; then + case ${with_arch} in + mips1 | mips2 | mips32 | mips32r2 | mips32r3 | mips32r5 | mips32r6 | \ + mips3 | mips4 | mips5 | mips64 | mips64r2 | mips64r3 | mips64r5 | mips64r6) + mips_cpu=${with_arch} + ;; + *) + AC_MSG_ERROR(This kind of arch name does *NOT* exist!) + ;; + esac + fi + AC_MSG_RESULT($with_arch) # See whether it's appropriate to set E_MIPS_ABI_O32 for o32 # binaries. It's a GNU extension that some OSes don't understand. case ${target} in @@ -392,7 +405,10 @@ changequote([,])dnl esac # Decide which ABI to target by default. case ${target} in - mips64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \ + mips*64*-linux-gnuabi64) + mips_default_abi=N64_ABI + ;; + mips*64*-linux* | mips-sgi-irix6* | mips64*-freebsd* \ | mips64*-kfreebsd*-gnu | mips64*-ps2-elf*) mips_default_abi=N32_ABI ;; diff --git a/gold/configure.tgt b/gold/configure.tgt index 4b54e08d27f..ef47ce079f1 100644 --- a/gold/configure.tgt +++ b/gold/configure.tgt @@ -153,6 +153,13 @@ aarch64*-*) targ_big_endian=false targ_extra_big_endian=true ;; +mips*64*el*-*-*|mips*64*le*-*-*) + targ_obj=mips + targ_machine=EM_MIPS_RS3_LE + targ_size=64 + targ_big_endian=false + targ_extra_big_endian=true + ;; mips*el*-*-*|mips*le*-*-*) targ_obj=mips targ_machine=EM_MIPS_RS3_LE @@ -160,6 +167,13 @@ mips*el*-*-*|mips*le*-*-*) targ_big_endian=false targ_extra_big_endian=true ;; +mips*64*-*-*) + targ_obj=mips + targ_machine=EM_MIPS + targ_size=64 + targ_big_endian=true + targ_extra_big_endian=false + ;; mips*-*-*) targ_obj=mips targ_machine=EM_MIPS diff --git a/ld/configure.tgt b/ld/configure.tgt index 34c9d67c365..4a71f679e29 100644 --- a/ld/configure.tgt +++ b/ld/configure.tgt @@ -580,11 +580,19 @@ mips*-*-vxworks*) targ_emul=elf32ebmipvxworks ;; mips*-*-windiss) targ_emul=elf32mipswindiss ;; -mips64*el-*-linux-*) targ_emul=elf32ltsmipn32 +mips*64*el-*-linux-gnuabi64) targ_emul=elf64ltsmip + targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32ltsmip elf32btsmip elf64btsmip" + targ_extra_libpath=$targ_extra_emuls + ;; +mips*64*el-*-linux-*) targ_emul=elf32ltsmipn32 targ_extra_emuls="elf32btsmipn32 elf32ltsmip elf32btsmip elf64ltsmip elf64btsmip" targ_extra_libpath=$targ_extra_emuls ;; -mips64*-*-linux-*) targ_emul=elf32btsmipn32 +mips*64*-*-linux-gnuabi64) targ_emul=elf64btsmip + targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32btsmip elf32ltsmip elf64ltsmip" + targ_extra_libpath=$targ_extra_emuls + ;; +mips*64*-*-linux-*) targ_emul=elf32btsmipn32 targ_extra_emuls="elf32ltsmipn32 elf32btsmip elf32ltsmip elf64btsmip elf64ltsmip" targ_extra_libpath=$targ_extra_emuls ;;