From patchwork Thu Mar 30 10:23:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 77084 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b0ea:0:b0:3b6:4342:cba0 with SMTP id b10csp1036499vqo; Thu, 30 Mar 2023 03:59:35 -0700 (PDT) X-Google-Smtp-Source: AKy350Z0UJqpn4Oa+61OPArTXi3muZTqWBvdRukZtdccZJqe730Bf08KoRrFIaJDu5uItrrEBkOh X-Received: by 2002:aa7:cf19:0:b0:4fa:f133:54b7 with SMTP id a25-20020aa7cf19000000b004faf13354b7mr20861090edy.16.1680173975516; Thu, 30 Mar 2023 03:59:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1680173975; cv=none; d=google.com; s=arc-20160816; b=uGX1JmPnTPjf3uy8fHAD53GNFhc7Zu4D1YL7Gj5B4keHvX6SXW7dBOZ5S8AkDUq95s wWMDxs8Amsd5pQZ+OjHSuWGFv78uDoszSBSvv9hT1Wk0O4igfphmL8CK6sKi+WSzzkCZ DHvJ5gpufJhizjyZsjFW+KZsPF8pCTr+oIk7qx+y92daqYKzpJ/NTIpJeHd2777ejP4J QU/B+KZ4kDY8htS+wQiUgOt46q8gt++n48HVisMQ4hpJBrtpJVVlAUZ1e1S8SosEJt8N Hg1HYzOcXgIfBq9VxiaDiVfkA5CTcqb/F6wbSCfN9SKU8E/Gj4upXmavxz5uHBnkmzqD QbKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:reply-to:from:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:dmarc-filter:delivered-to :dkim-signature:dkim-filter; bh=Lm7lFK1sgIyQ/VMkAvi3q6mUR3hM4RDJHYprkdw2/Ps=; b=TC/pK3GQhPbgtrkdeZBd1Gg78id5hGkm0oNFwpROk8Pisvv221xyy7zYEplG0g8Wfq 0pgNb9Mi5oXcP81j3LFzNRiFCDpIbf1QoKRdGlQV6jDkns6xWK48AgXcPMpFS1D7P+95 EIBzHunY5yhjHFn7Me9opsPk3rYkXVNEcFHWFl7CiJ6XY78ou0/yg+G//0dwxuIbU6rL fn3t5DPTYEApayl4MWr11asJGsdVnXdqSkBnPM4h/BH5CDNBBC31Ln3LOueo+4DpK3n8 r8JAVGIhiHKxP+CQtrGYPP19y49izX5VjWbnv5+dmR24KmafUZJzel8YhoNVPnecS6N9 eE3Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=TIlKfBk5; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from sourceware.org (server2.sourceware.org. [2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id d2-20020a50fb02000000b00501e22f86cbsi24410690edq.245.2023.03.30.03.59.35 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Mar 2023 03:59:35 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=TIlKfBk5; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 374FF39357CF for ; Thu, 30 Mar 2023 10:41:09 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 374FF39357CF DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1680172869; bh=Lm7lFK1sgIyQ/VMkAvi3q6mUR3hM4RDJHYprkdw2/Ps=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=TIlKfBk5EgHCpLp5rbbepMZxwAv32QCSwh0VlycVgr4Vaj1ksLDizRKgFBIWW5PNh m+YcOi1ODlXcl5ul9kmhMFwLCijj26yOTSehO8yuvKqx7JOfmFC46SFmNskuQzcJ1O 1x5jve7nsAoaJWSkTRkMZppGob9KRrQmmMk8pp1k= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id DC62C3854803 for ; Thu, 30 Mar 2023 10:24:42 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org DC62C3854803 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 203C32F4; Thu, 30 Mar 2023 03:25:27 -0700 (PDT) Received: from e121540-lin.manchester.arm.com (e121540-lin.manchester.arm.com [10.32.110.72]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 576D23F663; Thu, 30 Mar 2023 03:24:42 -0700 (PDT) To: binutils@sourceware.org Cc: Richard Sandiford Subject: [PATCH 40/43] aarch64: Resync field names Date: Thu, 30 Mar 2023 11:23:56 +0100 Message-Id: <20230330102359.3327695-41-richard.sandiford@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230330102359.3327695-1-richard.sandiford@arm.com> References: <20230330102359.3327695-1-richard.sandiford@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-32.7 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Richard Sandiford via Binutils From: Richard Sandiford Reply-To: Richard Sandiford Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761790106149411078?= X-GMAIL-MSGID: =?utf-8?q?1761790106149411078?= This patch just makes the comments in aarch64-opc.c:fields match the names of the associated FLD_* enum. --- opcodes/aarch64-opc.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 46c49dd95f8..dc4df2ff20c 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -258,12 +258,12 @@ const aarch64_field fields[] = { 16, 6 }, /* immr: in bitfield and logical immediate instructions. */ { 16, 3 }, /* immb: in advsimd shift by immediate instructions. */ { 19, 4 }, /* immh: in advsimd shift by immediate instructions. */ - { 22, 1 }, /* S: in LDRAA and LDRAB instructions. */ + { 22, 1 }, /* S_imm10: in LDRAA and LDRAB instructions. */ { 22, 1 }, /* N: in logical (immediate) instructions. */ { 11, 1 }, /* index: in ld/st inst deciding the pre/post-index. */ { 24, 1 }, /* index2: in ld/st pair inst deciding the pre/post-index. */ { 31, 1 }, /* sf: in integer data processing instructions. */ - { 30, 1 }, /* lse_size: in LSE extension atomic instructions. */ + { 30, 1 }, /* lse_sz: in LSE extension atomic instructions. */ { 11, 1 }, /* H: in advsimd scalar x indexed element instructions. */ { 21, 1 }, /* L: in advsimd scalar x indexed element instructions. */ { 20, 1 }, /* M: in advsimd scalar x indexed element instructions. */ @@ -324,22 +324,22 @@ const aarch64_field fields[] = { 19, 2 }, /* SVE_tszl_19: triangular size select low, bits [20,19]. */ { 14, 1 }, /* SVE_xs_14: UXTW/SXTW select (bit 14). */ { 22, 1 }, /* SVE_xs_22: UXTW/SXTW select (bit 22). */ - { 0, 2 }, /* SME ZAda tile ZA0-ZA3. */ - { 0, 3 }, /* SME ZAda tile ZA0-ZA7. */ + { 0, 2 }, /* SME_ZAda_2b: tile ZA0-ZA3. */ + { 0, 3 }, /* SME_ZAda_3b: tile ZA0-ZA7. */ { 22, 2 }, /* SME_size_22: size<1>, size<0> class field, [23:22]. */ { 16, 1 }, /* SME_Q: Q class bit, bit 16. */ { 15, 1 }, /* SME_V: (horizontal / vertical tiles), bit 15. */ { 13, 2 }, /* SME_Rv: vector select register W12-W15, bits [14:13]. */ - { 13, 3 }, /* SME Pm second source scalable predicate register P0-P7. */ + { 13, 3 }, /* SME_Pm: second source scalable predicate register P0-P7. */ { 0, 8 }, /* SME_zero_mask: list of up to 8 tile names separated by commas [7:0]. */ { 16, 2 }, /* SME_Rm: index base register W12-W15 [17:16]. */ { 23, 1 }, /* SME_i1: immediate field, bit 23. */ { 22, 1 }, /* SME_tszh: immediate and qualifier field, bit 22. */ - { 18, 3 }, /* SME_tshl: immediate and qualifier field, bits [20:18]. */ + { 18, 3 }, /* SME_tszl: immediate and qualifier field, bits [20:18]. */ { 11, 2 }, /* rotate1: FCMLA immediate rotate. */ { 13, 2 }, /* rotate2: Indexed element FCMLA immediate rotate. */ { 12, 1 }, /* rotate3: FCADD immediate rotate. */ - { 12, 2 }, /* SM3: Indexed element SM3 2 bits index immediate. */ + { 12, 2 }, /* SM3_imm2: Indexed element SM3 2 bits index immediate. */ { 22, 1 }, /* sz: 1-bit element size select. */ { 10, 2 }, /* CRm_dsb_nxs: 2-bit imm. encoded in CRm<3:2>. */ { 10, 8 }, /* CSSC_imm8. */