Message ID | 20221121120037.19325-1-zengxiao@eswincomputing.com |
---|---|
State | Accepted |
Headers |
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[8.43.85.97]) by mx.google.com with ESMTPS id fj17-20020a0564022b9100b0045928479b71si8507273edb.405.2022.11.21.04.01.38 for <ouuuleilei@gmail.com> (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Nov 2022 04:01:38 -0800 (PST) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 3A2E93830B2E for <ouuuleilei@gmail.com>; Mon, 21 Nov 2022 12:00:49 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from azure-sdnproxy.icoremail.net (azure-sdnproxy.icoremail.net [20.232.28.96]) by sourceware.org (Postfix) with SMTP id BF13C3830B2E for <binutils@sourceware.org>; Mon, 21 Nov 2022 12:00:41 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org BF13C3830B2E Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=eswincomputing.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=eswincomputing.com Received: from user.DOMAINS (unknown [10.12.130.38]) by app1 (Coremail) with SMTP id EwgMCgBHGohnaHtj5qISAA--.6136S4; Mon, 21 Nov 2022 20:00:39 +0800 (CST) From: zengxiao@eswincomputing.com To: binutils@sourceware.org Cc: shihua@iscas.ac.cn, nelson@rivosinc.com, palmer@dabbelt.com, kito.cheng@gmail.com, Xiao Zeng <zengxiao@eswincomputing.com> Subject: [PATCH v2] RISC-V: Make R_RISCV_SUB6 conforms to riscv ABI standard Date: Mon, 21 Nov 2022 20:00:37 +0800 Message-Id: <20221121120037.19325-1-zengxiao@eswincomputing.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID: EwgMCgBHGohnaHtj5qISAA--.6136S4 X-Coremail-Antispam: 1UD129KBjvJXoW7WrWxuF4rAr4DXr4xtrWrZrb_yoW8Xryxpr 13Jr4akF1fZw17XFWfZay8Ga4rKw4qkrWFq3yYqw48X39rAFW2qr4DtF17Ca1DJFnYvrW3 ZFyFgrs8Zw4UArUanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUvY14x267AKxVW8JVW5JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26F1j6w1UM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4U JVWxJr1l84ACjcxK6I8E87Iv67AKxVW0oVCq3wA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_Gc CE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E 2Ix0cI8IcVAFwI0_JrI_JrylYx0Ex4A2jsIE14v26r1j6r4UMcvjeVCFs4IE7xkEbVWUJV W8JwACjcxG0xvY0x0EwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lw4CEc2x0rVAKj4xx MxkIecxEwVCm-wCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c 02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_ Jw1lIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7 CjxVAFwI0_Jr0_Gr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v2 6r4j6F4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x0J UWUDXUUUUU= X-CM-SenderInfo: p2hqw5xldrqvxvzl0uprps33xlqjhudrp/ X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list <binutils.sourceware.org> List-Unsubscribe: <https://sourceware.org/mailman/options/binutils>, <mailto:binutils-request@sourceware.org?subject=unsubscribe> List-Archive: <https://sourceware.org/pipermail/binutils/> List-Post: <mailto:binutils@sourceware.org> List-Help: <mailto:binutils-request@sourceware.org?subject=help> List-Subscribe: <https://sourceware.org/mailman/listinfo/binutils>, <mailto:binutils-request@sourceware.org?subject=subscribe> Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" <binutils-bounces+ouuuleilei=gmail.com@sourceware.org> X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750107001686355627?= X-GMAIL-MSGID: =?utf-8?q?1750107001686355627?= |
Series |
[v2] RISC-V: Make R_RISCV_SUB6 conforms to riscv ABI standard
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Checks
Context | Check | Description |
---|---|---|
snail/binutils-gdb-check | success | Github commit url |
Commit Message
Xiao Zeng
Nov. 21, 2022, noon UTC
From: Xiao Zeng <zengxiao@eswincomputing.com>
The R_RISCV_SUB6 only the lower 6 bits of the code are valid, which
can be found in 8.5. Relocations of:
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/releases/download/v1.0-rc4/riscv-abi.pdf
bfd/ChangeLog:
* elfnn-riscv.c (riscv_elf_relocate_section): Take the R_RISCV_SUB6
lower 6 bits as the significant bit.
* elfxx-riscv.c (riscv_elf_add_sub_reloc): Likewise.
---
bfd/elfnn-riscv.c | 4 ++++
bfd/elfxx-riscv.c | 4 ++++
2 files changed, 8 insertions(+)
Comments
Thanks for fixing this. We also need to add the out-of-range check for R_RISCV_SUB6 in the riscv_elf_add_sub_reloc, and the overflow checks for all ADD/SUB/SET relocations, but since they can be added in the later patches, so I committed this one after passing the riscv-gnu-toolchain regressions. Thanks Nelson On Mon, Nov 21, 2022 at 8:02 PM <zengxiao@eswincomputing.com> wrote: > > From: Xiao Zeng <zengxiao@eswincomputing.com> > > The R_RISCV_SUB6 only the lower 6 bits of the code are valid, which > can be found in 8.5. Relocations of: > https://github.com/riscv-non-isa/riscv-elf-psabi-doc/releases/download/v1.0-rc4/riscv-abi.pdf > > bfd/ChangeLog: > > * elfnn-riscv.c (riscv_elf_relocate_section): Take the R_RISCV_SUB6 > lower 6 bits as the significant bit. > * elfxx-riscv.c (riscv_elf_add_sub_reloc): Likewise. > --- > bfd/elfnn-riscv.c | 4 ++++ > bfd/elfxx-riscv.c | 4 ++++ > 2 files changed, 8 insertions(+) > > diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c > index 0570a971b5a..a02aa64786e 100644 > --- a/bfd/elfnn-riscv.c > +++ b/bfd/elfnn-riscv.c > @@ -2427,6 +2427,10 @@ riscv_elf_relocate_section (bfd *output_bfd, > break; > > case R_RISCV_SUB6: > + relocation = (old_value & ~howto->dst_mask) > + | (((old_value & howto->dst_mask) - relocation) > + & howto->dst_mask); > + break; The old_value needs to be defined, but it's easy enough to add, so I fixed it. > case R_RISCV_SUB8: > case R_RISCV_SUB16: > case R_RISCV_SUB32: > diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c > index afbde56b9e5..2db24acf7a5 100644 > --- a/bfd/elfxx-riscv.c > +++ b/bfd/elfxx-riscv.c > @@ -994,6 +994,10 @@ riscv_elf_add_sub_reloc (bfd *abfd, > relocation = old_value + relocation; > break; > case R_RISCV_SUB6: > + relocation = (old_value & ~howto->dst_mask) > + | (((old_value & howto->dst_mask) - relocation) > + & howto->dst_mask); > + break; > case R_RISCV_SUB8: > case R_RISCV_SUB16: > case R_RISCV_SUB32: > -- > 2.34.1 >
On Wed, Nov 23, 2022 at 12:00:00 AM Nelson Chu <nelson@rivosinc.com> wrote: > >Thanks for fixing this. We also need to add the out-of-range check >for R_RISCV_SUB6 in the riscv_elf_add_sub_reloc, and the overflow >checks for all ADD/SUB/SET relocations, but since they can be added in >the later patches, so I committed this one after passing the >riscv-gnu-toolchain regressions. OK. In the next patch, I will solve this problem. > >Thanks >Nelson > >On Mon, Nov 21, 2022 at 8:02 PM <zengxiao@eswincomputing.com> wrote: >> >> From: Xiao Zeng <zengxiao@eswincomputing.com> >> >> The R_RISCV_SUB6 only the lower 6 bits of the code are valid, which >> can be found in 8.5. Relocations of: >> https://github.com/riscv-non-isa/riscv-elf-psabi-doc/releases/download/v1.0-rc4/riscv-abi.pdf >> >> bfd/ChangeLog: >> >> * elfnn-riscv.c (riscv_elf_relocate_section): Take the R_RISCV_SUB6 >> lower 6 bits as the significant bit. >> * elfxx-riscv.c (riscv_elf_add_sub_reloc): Likewise. >> --- >> bfd/elfnn-riscv.c | 4 ++++ >> bfd/elfxx-riscv.c | 4 ++++ >> 2 files changed, 8 insertions(+) >> >> diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c >> index 0570a971b5a..a02aa64786e 100644 >> --- a/bfd/elfnn-riscv.c >> +++ b/bfd/elfnn-riscv.c >> @@ -2427,6 +2427,10 @@ riscv_elf_relocate_section (bfd *output_bfd, >> break; >> >> case R_RISCV_SUB6: >> + relocation = (old_value & ~howto->dst_mask) >> + | (((old_value & howto->dst_mask) - relocation) >> + & howto->dst_mask); >> + break; > >The old_value needs to be defined, but it's easy enough to add, so I fixed it. Thanks Nelson > >> case R_RISCV_SUB8: >> case R_RISCV_SUB16: >> case R_RISCV_SUB32: >> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c >> index afbde56b9e5..2db24acf7a5 100644 >> --- a/bfd/elfxx-riscv.c >> +++ b/bfd/elfxx-riscv.c >> @@ -994,6 +994,10 @@ riscv_elf_add_sub_reloc (bfd *abfd, >> relocation = old_value + relocation; >> break; >> case R_RISCV_SUB6: >> + relocation = (old_value & ~howto->dst_mask) >> + | (((old_value & howto->dst_mask) - relocation) >> + & howto->dst_mask); >> + break; >> case R_RISCV_SUB8: >> case R_RISCV_SUB16: >> case R_RISCV_SUB32: >> -- >> 2.34.1 >> Thanks Xiao
diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c index 0570a971b5a..a02aa64786e 100644 --- a/bfd/elfnn-riscv.c +++ b/bfd/elfnn-riscv.c @@ -2427,6 +2427,10 @@ riscv_elf_relocate_section (bfd *output_bfd, break; case R_RISCV_SUB6: + relocation = (old_value & ~howto->dst_mask) + | (((old_value & howto->dst_mask) - relocation) + & howto->dst_mask); + break; case R_RISCV_SUB8: case R_RISCV_SUB16: case R_RISCV_SUB32: diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index afbde56b9e5..2db24acf7a5 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -994,6 +994,10 @@ riscv_elf_add_sub_reloc (bfd *abfd, relocation = old_value + relocation; break; case R_RISCV_SUB6: + relocation = (old_value & ~howto->dst_mask) + | (((old_value & howto->dst_mask) - relocation) + & howto->dst_mask); + break; case R_RISCV_SUB8: case R_RISCV_SUB16: case R_RISCV_SUB32: