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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id gs31-20020a1709072d1f00b0078ca7bbf616si5518716ejc.746.2022.11.04.04.51.02 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Nov 2022 04:51:02 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 94BB938582A1 for ; Fri, 4 Nov 2022 11:50:56 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from NelsondeMBP.localdomain (36-230-133-173.dynamic-ip.hinet.net [36.230.133.173]) by sourceware.org (Postfix) with ESMTP id 17C0E385840B for ; Fri, 4 Nov 2022 11:50:45 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 17C0E385840B Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: sourceware.org; spf=none smtp.mailfrom=NelsondeMBP.localdomain Received: by NelsondeMBP.localdomain (Postfix, from userid 501) id 79CEE3E02C1; Fri, 4 Nov 2022 19:50:41 +0800 (CST) From: Nelson Chu To: binutils@sourceware.org, research_trasio@irq.a4lg.com, kito.cheng@sifive.com Subject: [PATCH 1/2] RISC-V: File-level architecture shouldn't be affected by section-level ones. Date: Fri, 4 Nov 2022 19:50:37 +0800 Message-Id: <20221104115038.8957-1-nelson@rivosinc.com> X-Mailer: git-send-email 2.37.0 (Apple Git-136) MIME-Version: 1.0 X-Spam-Status: No, score=-5.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, HEADER_FROM_DIFFERENT_DOMAINS, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KHOP_HELO_FCRDNS, NO_DNS_FOR_FROM, PDS_RDNS_DYNAMIC_FP, RCVD_IN_BARRACUDACENTRAL, RCVD_IN_PBL, RCVD_IN_SORBS_DUL, RDNS_DYNAMIC, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748566186272358861?= X-GMAIL-MSGID: =?utf-8?q?1748566186272358861?= There are three ways to set architecture in assembler - elf arch attribute (.attribute arch, "rv32i"), -march option (-march=rv32i) and .option directive (.option arch, rv32i/+c/-c). This patch clarifies that the first two are belonged to the file-level architecture setting, and the third .option is belonged to the section-level setting. However, the file-level architecture should not be affected by the section-level ones since they have different purpose. The former is recorded in elf architecture attribue, which used to decide if the objects can be linked or not; The later are recorded in mapping symbols, which generally used for ifunc to enable extensions for specific functions or regions. gas/ * config/tc-riscv.c (riscv_file_arch): Static const char pointer, used to record the file-level architecture string. (riscv_reset_subsets_list_arch_str): Also set riscv_file_arch if needed. (riscv_set_arch): Updated since riscv_reset_subsets_list_arch_str changed. (s_riscv_option): Likewise. (riscv_elf_final_processing): Free riscv_file_arch. (riscv_write_out_attrs): Output file-level architecture to elf attributes rather than the section-level one. * testsuite/gas/riscv/option-arch.s: Collect all related testcases here. * gas/testsuite/gas/riscv/option-arch-dis.d: Likewise. * testsuite/gas/riscv/option-arch-symbols.d: Likewise. * testsuite/gas/riscv/option-arch-01.s: Removed and moved to option-arch. * testsuite/gas/riscv/option-arch-01a.d: Likewise. * testsuite/gas/riscv/option-arch-01b.d: Likewise. * testsuite/gas/riscv/option-arch-02.s: Likewise. * testsuite/gas/riscv/option-arch-02.d: Likewise. * testsuite/gas/riscv/option-arch-03.s: Likewise. * testsuite/gas/riscv/option-arch-03.d: Likewise. --- gas/config/tc-riscv.c | 22 ++++++++++++++----- gas/testsuite/gas/riscv/option-arch-01.s | 10 --------- gas/testsuite/gas/riscv/option-arch-01a.d | 14 ------------ gas/testsuite/gas/riscv/option-arch-02.d | 8 ------- gas/testsuite/gas/riscv/option-arch-02.s | 8 ------- gas/testsuite/gas/riscv/option-arch-03.d | 8 ------- gas/testsuite/gas/riscv/option-arch-03.s | 3 --- .../{option-arch-01b.d => option-arch-attr.d} | 2 +- gas/testsuite/gas/riscv/option-arch-dis.d | 15 +++++++++++++ gas/testsuite/gas/riscv/option-arch-symbols.d | 13 +++++++++++ gas/testsuite/gas/riscv/option-arch.s | 13 +++++++++++ 11 files changed, 58 insertions(+), 58 deletions(-) delete mode 100644 gas/testsuite/gas/riscv/option-arch-01.s delete mode 100644 gas/testsuite/gas/riscv/option-arch-01a.d delete mode 100644 gas/testsuite/gas/riscv/option-arch-02.d delete mode 100644 gas/testsuite/gas/riscv/option-arch-02.s delete mode 100644 gas/testsuite/gas/riscv/option-arch-03.d delete mode 100644 gas/testsuite/gas/riscv/option-arch-03.s rename gas/testsuite/gas/riscv/{option-arch-01b.d => option-arch-attr.d} (81%) create mode 100644 gas/testsuite/gas/riscv/option-arch-dis.d create mode 100644 gas/testsuite/gas/riscv/option-arch-symbols.d create mode 100644 gas/testsuite/gas/riscv/option-arch.s diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index 2dc92ecd3c3..dcb70f9d7ad 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -279,15 +279,24 @@ static riscv_parse_subset_t riscv_rps_as = true, /* check_unknown_prefixed_ext. */ }; +static const char *riscv_file_arch = NULL; + /* Update the architecture string in the subset_list. */ static void -riscv_reset_subsets_list_arch_str (void) +riscv_reset_subsets_list_arch_str (bool file_level) { riscv_subset_list_t *subsets = riscv_rps_as.subset_list; if (subsets->arch_str != NULL) free ((void *) subsets->arch_str); subsets->arch_str = riscv_arch_str (xlen, subsets); + + if (file_level) + { + if (riscv_file_arch != NULL) + free ((void *) riscv_file_arch); + riscv_file_arch = strdup (subsets->arch_str); + } } /* This structure is used to hold a stack of .option values. */ @@ -321,7 +330,7 @@ riscv_set_arch (const char *s) } riscv_release_subset_list (riscv_rps_as.subset_list); riscv_parse_subset (&riscv_rps_as, s); - riscv_reset_subsets_list_arch_str (); + riscv_reset_subsets_list_arch_str (true/* file_level */); riscv_set_rvc (false); if (riscv_subset_supports (&riscv_rps_as, "c")) @@ -4045,13 +4054,13 @@ s_riscv_option (int x ATTRIBUTE_UNUSED) if (strcmp (name, "rvc") == 0) { riscv_update_subset (&riscv_rps_as, "+c"); - riscv_reset_subsets_list_arch_str (); + riscv_reset_subsets_list_arch_str (false/* file_level */); riscv_set_rvc (true); } else if (strcmp (name, "norvc") == 0) { riscv_update_subset (&riscv_rps_as, "-c"); - riscv_reset_subsets_list_arch_str (); + riscv_reset_subsets_list_arch_str (false/* file_level */); riscv_set_rvc (false); } else if (strcmp (name, "pic") == 0) @@ -4072,7 +4081,7 @@ s_riscv_option (int x ATTRIBUTE_UNUSED) if (ISSPACE (*name) && *name != '\0') name++; riscv_update_subset (&riscv_rps_as, name); - riscv_reset_subsets_list_arch_str (); + riscv_reset_subsets_list_arch_str (false/* file_level */); riscv_set_rvc (false); if (riscv_subset_supports (&riscv_rps_as, "c")) @@ -4526,6 +4535,7 @@ riscv_elf_final_processing (void) { riscv_set_abi_by_arch (); riscv_release_subset_list (riscv_rps_as.subset_list); + free ((void *) riscv_file_arch); elf_elfheader (stdoutput)->e_flags |= elf_flags; } @@ -4610,7 +4620,7 @@ riscv_write_out_attrs (void) unsigned int i; /* Re-write architecture elf attribute. */ - arch_str = riscv_rps_as.subset_list->arch_str; + arch_str = riscv_file_arch; bfd_elf_add_proc_attr_string (stdoutput, Tag_RISCV_arch, arch_str); /* For the file without any instruction, we don't set the default_priv_spec diff --git a/gas/testsuite/gas/riscv/option-arch-01.s b/gas/testsuite/gas/riscv/option-arch-01.s deleted file mode 100644 index 50285fc8c73..00000000000 --- a/gas/testsuite/gas/riscv/option-arch-01.s +++ /dev/null @@ -1,10 +0,0 @@ -.attribute arch, "rv64ic" -add a0, a0, a1 -.option push -.option arch, +d2p0, -c, +xvendor1p0 -add a0, a0, a1 -frcsr a0 # Should add mapping symbol with ISA here, and then dump it to frcsr. -.option push -.option arch, +m3p0, +d3p0 -.option pop -.option pop diff --git a/gas/testsuite/gas/riscv/option-arch-01a.d b/gas/testsuite/gas/riscv/option-arch-01a.d deleted file mode 100644 index 1d14c604dec..00000000000 --- a/gas/testsuite/gas/riscv/option-arch-01a.d +++ /dev/null @@ -1,14 +0,0 @@ -#as: -misa-spec=2.2 -#source: option-arch-01.s -#objdump: -d - -.*:[ ]+file format .* - - -Disassembly of section .text: - -0+000 <.text>: -[ ]+[0-9a-f]+:[ ]+952e[ ]+add[ ]+a0,a0,a1 -[ ]+[0-9a-f]+:[ ]+00b50533[ ]+add[ ]+a0,a0,a1 -[ ]+[0-9a-f]+:[ ]+00302573[ ]+frcsr[ ]+a0 -#... diff --git a/gas/testsuite/gas/riscv/option-arch-02.d b/gas/testsuite/gas/riscv/option-arch-02.d deleted file mode 100644 index 3c27419f9d3..00000000000 --- a/gas/testsuite/gas/riscv/option-arch-02.d +++ /dev/null @@ -1,8 +0,0 @@ -#as: -misa-spec=2.2 -#readelf: -A -#source: option-arch-02.s - -Attribute Section: riscv -File Attributes - Tag_RISCV_arch: "rv64i2p0_m3p0_f2p0_d3p0_c2p0_zmmul1p0_xvendor32x3p0" -#... diff --git a/gas/testsuite/gas/riscv/option-arch-02.s b/gas/testsuite/gas/riscv/option-arch-02.s deleted file mode 100644 index e0f5de321d6..00000000000 --- a/gas/testsuite/gas/riscv/option-arch-02.s +++ /dev/null @@ -1,8 +0,0 @@ -.attribute arch, "rv64ic" -add a0, a0, a1 -.option push -.option arch, +d2p0, -c, +xvendor1p0 -add a0, a0, a1 -frcsr a0 -.option pop -.option arch, +m3p0, +d3p0, +xvendor32x3p0 diff --git a/gas/testsuite/gas/riscv/option-arch-03.d b/gas/testsuite/gas/riscv/option-arch-03.d deleted file mode 100644 index 62d7f7d5ed2..00000000000 --- a/gas/testsuite/gas/riscv/option-arch-03.d +++ /dev/null @@ -1,8 +0,0 @@ -#as: -#readelf: -A -#source: option-arch-03.s - -Attribute Section: riscv -File Attributes - Tag_RISCV_arch: "rv32i2p1_c2p0" -#... diff --git a/gas/testsuite/gas/riscv/option-arch-03.s b/gas/testsuite/gas/riscv/option-arch-03.s deleted file mode 100644 index ccdb1c354b0..00000000000 --- a/gas/testsuite/gas/riscv/option-arch-03.s +++ /dev/null @@ -1,3 +0,0 @@ -.attribute arch, "rv64ic" -.option arch, +d2p0, -c -.option arch, rv32i2p1c2p0 diff --git a/gas/testsuite/gas/riscv/option-arch-01b.d b/gas/testsuite/gas/riscv/option-arch-attr.d similarity index 81% rename from gas/testsuite/gas/riscv/option-arch-01b.d rename to gas/testsuite/gas/riscv/option-arch-attr.d index 8f4284d5f15..efe83c7e117 100644 --- a/gas/testsuite/gas/riscv/option-arch-01b.d +++ b/gas/testsuite/gas/riscv/option-arch-attr.d @@ -1,6 +1,6 @@ #as: -misa-spec=2.2 +#source: option-arch.s #readelf: -A -#source: option-arch-01.s Attribute Section: riscv File Attributes diff --git a/gas/testsuite/gas/riscv/option-arch-dis.d b/gas/testsuite/gas/riscv/option-arch-dis.d new file mode 100644 index 00000000000..9fa19f7f792 --- /dev/null +++ b/gas/testsuite/gas/riscv/option-arch-dis.d @@ -0,0 +1,15 @@ +#as: -misa-spec=2.2 +#source: option-arch.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 <.text>: +[ ]+[0-9a-f]+:[ ]+0001[ ]+nop +[ ]+[0-9a-f]+:[ ]+00000013[ ]+nop +[ ]+[0-9a-f]+:[ ]+00302573[ ]+frcsr[ ]+a0 +[ ]+[0-9a-f]+:[ ]+00000013[ ]+nop +[ ]+[0-9a-f]+:[ ]+0001[ ]+nop diff --git a/gas/testsuite/gas/riscv/option-arch-symbols.d b/gas/testsuite/gas/riscv/option-arch-symbols.d new file mode 100644 index 00000000000..9e2eef6f055 --- /dev/null +++ b/gas/testsuite/gas/riscv/option-arch-symbols.d @@ -0,0 +1,13 @@ +#as: -misa-spec=2.2 +#source: option-arch.s +#objdump: --syms --special-syms + +.*file format.*riscv.* + +SYMBOL TABLE: +#... +0+00 l .text 0000000000000000 \$xrv64i2p0_c2p0 +0+02 l .text 0000000000000000 \$xrv64i2p0_f2p0_d2p0_xvendor1p0 +0+0a l .text 0000000000000000 \$xrv64i2p0_m3p0_f2p0_d2p0_zmmul1p0_xvendor1p0_xvendor32x3p0 +0+0e l .text 0000000000000000 \$xrv32i2p1_c2p0 +#... diff --git a/gas/testsuite/gas/riscv/option-arch.s b/gas/testsuite/gas/riscv/option-arch.s new file mode 100644 index 00000000000..1aa36be88e3 --- /dev/null +++ b/gas/testsuite/gas/riscv/option-arch.s @@ -0,0 +1,13 @@ +.attribute arch, "rv64ic" +nop # $xrv64i2p0_c2p0 +.option push +.option arch, +d2p0, -c, +xvendor1p0 +nop # $xrv64i2p0_f2p0_d2p0_xvendor1p0 +frcsr a0 +.option push +.option arch, +m3p0, +d3p0, +xvendor32x3p0 +nop # $xrv64i2p0_m3p0_f2p0_d2p0_zmmul1p0_xvendor1p0_xvendor32x3p0 +.option pop +.option pop +.option arch, rv32i2p1c2p0 +nop # $xrv32i2p1_c2p0