[3/6] Support Intel CMPccXADD

Message ID 20221031030507.35588-4-haochen.jiang@intel.com
State Unresolved
Headers
Series Support Intel Sierra Forest Instructions |

Checks

Context Check Description
snail/binutils-gdb-check warning Git am fail log

Commit Message

Jiang, Haochen Oct. 31, 2022, 3:05 a.m. UTC
  gas/ChangeLog:

	* NEWS: Support Intel CMPccXADD.
	* config/tc-i386.c: Add cmpccxadd.
	(build_modrm_byte): Add operations for Vex.VVVV reg
	on operand 0 while have memory operand.
	* doc/c-i386.texi: Document .cmpccxadd.
	* testsuite/gas/i386/i386.exp: Run CMPccXADD tests.
	* testsuite/gas/i386/cmpccxadd-inval.s: New test.
	* testsuite/gas/i386/cmpccxadd-inval.l: Ditto.
	* testsuite/gas/i386/x86-64-cmpccxadd-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-cmpccxadd.s: Ditto.
	* testsuite/gas/i386/x86-64-cmpccxadd.d: Ditto.

opcodes/ChangeLog:

	* i386-dis.c (Mdq): New.
	(X86_64_VEX_0F38E0): Ditto.
	(X86_64_VEX_0F38E1): Ditto.
	(X86_64_VEX_0F38E2): Ditto.
	(X86_64_VEX_0F38E3): Ditto.
	(X86_64_VEX_0F38E4): Ditto.
	(X86_64_VEX_0F38E5): Ditto.
	(X86_64_VEX_0F38E6): Ditto.
	(X86_64_VEX_0F38E7): Ditto.
	(X86_64_VEX_0F38E8): Ditto.
	(X86_64_VEX_0F38E9): Ditto.
	(X86_64_VEX_0F38EA): Ditto.
	(X86_64_VEX_0F38EB): Ditto.
	(X86_64_VEX_0F38EC): Ditto.
	(X86_64_VEX_0F38ED): Ditto.
	(X86_64_VEX_0F38EE): Ditto.
	(X86_64_VEX_0F38EF): Ditto.
	(x86_64_table): Add X86_64_VEX_0F38E0, X86_64_VEX_0F38E1,
	X86_64_VEX_0F38E2, X86_64_VEX_0F38E3, X86_64_VEX_0F38E4,
	X86_64_VEX_0F38E5, X86_64_VEX_0F38E6, X86_64_VEX_0F38E7,
	X86_64_VEX_0F38E8, X86_64_VEX_0F38E9, X86_64_VEX_0F38EA,
	X86_64_VEX_0F38EB, X86_64_VEX_0F38EC, X86_64_VEX_0F38ED,
	X86_64_VEX_0F38EE, X86_64_VEX_0F38EF.
	* i386-gen.c (cpu_flag_init): Add CPU_CMPCCXADD_FLAGS and
	CPU_ANY_CMPCCXADD_FLAGS.
	(cpu_flags): Add CpuCMPCCXADD.
	* i386-init.h: Regenerated.
	* i386-opc.h (CpuCMPCCXADD): New.
	(i386_cpu_flags): Add cpucmpccxadd. Comment unused for it is actually 0.
	* i386-opc.tbl: Add Intel CMPccXADD instructions.
	* i386-tbl.h: Regenerated.
---
 gas/NEWS                                      |    2 +
 gas/config/tc-i386.c                          |    3 +-
 gas/doc/c-i386.texi                           |    2 +
 gas/testsuite/gas/i386/cmpccxadd-inval.l      |    5 +
 gas/testsuite/gas/i386/cmpccxadd-inval.s      |    9 +
 gas/testsuite/gas/i386/i386.exp               |    3 +
 .../gas/i386/x86-64-cmpccxadd-intel.d         |  266 +
 gas/testsuite/gas/i386/x86-64-cmpccxadd.d     |  266 +
 gas/testsuite/gas/i386/x86-64-cmpccxadd.s     |  263 +
 opcodes/i386-dis.c                            |  147 +-
 opcodes/i386-gen.c                            |    5 +
 opcodes/i386-init.h                           |  514 +-
 opcodes/i386-opc.h                            |    5 +-
 opcodes/i386-opc.tbl                          |    6 +
 opcodes/i386-tbl.h                            | 8280 +++++++++--------
 15 files changed, 5624 insertions(+), 4152 deletions(-)
 create mode 100644 gas/testsuite/gas/i386/cmpccxadd-inval.l
 create mode 100644 gas/testsuite/gas/i386/cmpccxadd-inval.s
 create mode 100644 gas/testsuite/gas/i386/x86-64-cmpccxadd-intel.d
 create mode 100644 gas/testsuite/gas/i386/x86-64-cmpccxadd.d
 create mode 100644 gas/testsuite/gas/i386/x86-64-cmpccxadd.s
  

Comments

H.J. Lu Oct. 31, 2022, 4:54 p.m. UTC | #1
On Sun, Oct 30, 2022 at 8:07 PM Haochen Jiang <haochen.jiang@intel.com> wrote:
>
> gas/ChangeLog:
>
>         * NEWS: Support Intel CMPccXADD.
>         * config/tc-i386.c: Add cmpccxadd.
>         (build_modrm_byte): Add operations for Vex.VVVV reg
>         on operand 0 while have memory operand.
>         * doc/c-i386.texi: Document .cmpccxadd.
>         * testsuite/gas/i386/i386.exp: Run CMPccXADD tests.
>         * testsuite/gas/i386/cmpccxadd-inval.s: New test.
>         * testsuite/gas/i386/cmpccxadd-inval.l: Ditto.
>         * testsuite/gas/i386/x86-64-cmpccxadd-intel.d: Ditto.
>         * testsuite/gas/i386/x86-64-cmpccxadd.s: Ditto.
>         * testsuite/gas/i386/x86-64-cmpccxadd.d: Ditto.
>
> opcodes/ChangeLog:
>
>         * i386-dis.c (Mdq): New.
>         (X86_64_VEX_0F38E0): Ditto.
>         (X86_64_VEX_0F38E1): Ditto.
>         (X86_64_VEX_0F38E2): Ditto.
>         (X86_64_VEX_0F38E3): Ditto.
>         (X86_64_VEX_0F38E4): Ditto.
>         (X86_64_VEX_0F38E5): Ditto.
>         (X86_64_VEX_0F38E6): Ditto.
>         (X86_64_VEX_0F38E7): Ditto.
>         (X86_64_VEX_0F38E8): Ditto.
>         (X86_64_VEX_0F38E9): Ditto.
>         (X86_64_VEX_0F38EA): Ditto.
>         (X86_64_VEX_0F38EB): Ditto.
>         (X86_64_VEX_0F38EC): Ditto.
>         (X86_64_VEX_0F38ED): Ditto.
>         (X86_64_VEX_0F38EE): Ditto.
>         (X86_64_VEX_0F38EF): Ditto.
>         (x86_64_table): Add X86_64_VEX_0F38E0, X86_64_VEX_0F38E1,
>         X86_64_VEX_0F38E2, X86_64_VEX_0F38E3, X86_64_VEX_0F38E4,
>         X86_64_VEX_0F38E5, X86_64_VEX_0F38E6, X86_64_VEX_0F38E7,
>         X86_64_VEX_0F38E8, X86_64_VEX_0F38E9, X86_64_VEX_0F38EA,
>         X86_64_VEX_0F38EB, X86_64_VEX_0F38EC, X86_64_VEX_0F38ED,
>         X86_64_VEX_0F38EE, X86_64_VEX_0F38EF.
>         * i386-gen.c (cpu_flag_init): Add CPU_CMPCCXADD_FLAGS and
>         CPU_ANY_CMPCCXADD_FLAGS.
>         (cpu_flags): Add CpuCMPCCXADD.
>         * i386-init.h: Regenerated.
>         * i386-opc.h (CpuCMPCCXADD): New.
>         (i386_cpu_flags): Add cpucmpccxadd. Comment unused for it is actually 0.
>         * i386-opc.tbl: Add Intel CMPccXADD instructions.
>         * i386-tbl.h: Regenerated.
> ---
>  gas/NEWS                                      |    2 +
>  gas/config/tc-i386.c                          |    3 +-
>  gas/doc/c-i386.texi                           |    2 +
>  gas/testsuite/gas/i386/cmpccxadd-inval.l      |    5 +
>  gas/testsuite/gas/i386/cmpccxadd-inval.s      |    9 +
>  gas/testsuite/gas/i386/i386.exp               |    3 +
>  .../gas/i386/x86-64-cmpccxadd-intel.d         |  266 +
>  gas/testsuite/gas/i386/x86-64-cmpccxadd.d     |  266 +
>  gas/testsuite/gas/i386/x86-64-cmpccxadd.s     |  263 +
>  opcodes/i386-dis.c                            |  147 +-
>  opcodes/i386-gen.c                            |    5 +
>  opcodes/i386-init.h                           |  514 +-
>  opcodes/i386-opc.h                            |    5 +-
>  opcodes/i386-opc.tbl                          |    6 +
>  opcodes/i386-tbl.h                            | 8280 +++++++++--------
>  15 files changed, 5624 insertions(+), 4152 deletions(-)
>  create mode 100644 gas/testsuite/gas/i386/cmpccxadd-inval.l
>  create mode 100644 gas/testsuite/gas/i386/cmpccxadd-inval.s
>  create mode 100644 gas/testsuite/gas/i386/x86-64-cmpccxadd-intel.d
>  create mode 100644 gas/testsuite/gas/i386/x86-64-cmpccxadd.d
>  create mode 100644 gas/testsuite/gas/i386/x86-64-cmpccxadd.s
>
> diff --git a/gas/NEWS b/gas/NEWS
> index 1547bfd469..7cdd429f0b 100644
> --- a/gas/NEWS
> +++ b/gas/NEWS
> @@ -1,5 +1,7 @@
>  -*- text -*-
>
> +* Add support for Intel CMPccXADD instructions.
> +
>  * Add support for Intel AVX-VNNI-INT8 instructions.
>
>  * Add support for Intel AVX-IFMA instructions.
> diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
> index 26d8efb47e..9c0f86ac3d 100644
> --- a/gas/config/tc-i386.c
> +++ b/gas/config/tc-i386.c
> @@ -1098,6 +1098,7 @@ static const arch_entry cpu_arch[] =
>    SUBARCH (prefetchi, PREFETCHI, ANY_PREFETCHI, false),
>    SUBARCH (avx_ifma, AVX_IFMA, ANY_AVX_IFMA, false),
>    SUBARCH (avx_vnni_int8, AVX_VNNI_INT8, ANY_AVX_VNNI_INT8, false),
> +  SUBARCH (cmpccxadd, CMPCCXADD, ANY_CMPCCXADD, false),
>  };
>
>  #undef SUBARCH
> @@ -8547,7 +8548,7 @@ build_modrm_byte (void)
>                  source operand is encoded in VEX prefix. */
>               gas_assert (mem != (unsigned int) ~0);
>
> -             if (op > mem)
> +             if (op > mem || i.tm.cpu_flags.bitfield.cpucmpccxadd)
>                 {
>                   vex_reg = op++;
>                   gas_assert (op < i.operands);
> diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
> index 029f5f2e04..f98b9fbd9f 100644
> --- a/gas/doc/c-i386.texi
> +++ b/gas/doc/c-i386.texi
> @@ -197,6 +197,7 @@ accept various extension mnemonics.  For example,
>  @code{prefetchi},
>  @code{avx_ifma},
>  @code{avx_vnni_int8},
> +@code{cmpccxadd},
>  @code{amx_int8},
>  @code{amx_bf16},
>  @code{amx_fp16},
> @@ -1491,6 +1492,7 @@ supported on the CPU specified.  The choices for @var{cpu_type} are:
>  @item @samp{.tdx} @tab @samp{.avx_vnni}  @tab @samp{.avx512_fp16}
>  @item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @samp{.ibt}
>  @item @samp{.prefetchi} @tab @samp{.avx_ifma} @tab @samp{.avx_vnni_int8}
> +@item @samp{.cmpccxadd}
>  @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
>  @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
>  @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk}
> diff --git a/gas/testsuite/gas/i386/cmpccxadd-inval.l b/gas/testsuite/gas/i386/cmpccxadd-inval.l
> new file mode 100644
> index 0000000000..32538867aa
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/cmpccxadd-inval.l
> @@ -0,0 +1,5 @@
> +.* Assembler messages:
> +.*:6: Error: `cmpbexadd' is only supported in 64-bit mode
> +.*:7: Error: `cmpbxadd' is only supported in 64-bit mode
> +.*:8: Error: `cmplexadd' is only supported in 64-bit mode
> +.*:9: Error: `cmplxadd' is only supported in 64-bit mode
> diff --git a/gas/testsuite/gas/i386/cmpccxadd-inval.s b/gas/testsuite/gas/i386/cmpccxadd-inval.s
> new file mode 100644
> index 0000000000..a349628863
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/cmpccxadd-inval.s
> @@ -0,0 +1,9 @@
> +# Check Illegal CMPccXADD instructions
> +
> +       .allow_index_reg
> +       .text
> +_start:
> +       cmpbexadd       %eax, %eax, 0x10000000(%esp, %esi, 8)
> +       cmpbxadd        %ebx, %ebx, (%ecx)
> +       cmplexadd       %eax, %eax, 508(%ecx)
> +       cmplxadd        %ebx, %ebx, -512(%edx)
> diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
> index b75fe85cb3..e9785e64fd 100644
> --- a/gas/testsuite/gas/i386/i386.exp
> +++ b/gas/testsuite/gas/i386/i386.exp
> @@ -479,6 +479,7 @@ if [gas_32_check] then {
>      run_list_test "avx-ifma-inval"
>      run_dump_test "avx-vnni-int8"
>      run_dump_test "avx-vnni-int8-intel"
> +    run_list_test "cmpccxadd-inval"
>      run_list_test "sg"
>      run_dump_test "clzero"
>      run_dump_test "invlpgb"
> @@ -1152,6 +1153,8 @@ if [gas_64_check] then {
>      run_list_test "x86-64-avx-ifma-inval"
>      run_dump_test "x86-64-avx-vnni-int8"
>      run_dump_test "x86-64-avx-vnni-int8-intel"
> +    run_dump_test "x86-64-cmpccxadd"
> +    run_dump_test "x86-64-cmpccxadd-intel"
>      run_dump_test "x86-64-clzero"
>      run_dump_test "x86-64-mwaitx-bdver4"
>      run_list_test "x86-64-mwaitx-reg"
> diff --git a/gas/testsuite/gas/i386/x86-64-cmpccxadd-intel.d b/gas/testsuite/gas/i386/x86-64-cmpccxadd-intel.d
> new file mode 100644
> index 0000000000..0b906330b7
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-cmpccxadd-intel.d
> @@ -0,0 +1,266 @@
> +#as:
> +#objdump: -dw -Mintel
> +#name: x86_64 CMPCCXADD insns (Intel disassembly)
> +#source: x86-64-cmpccxadd.s
> +
> +.*: +file format .*
> +
> +Disassembly of section \.text:
> +
> +0+ <_start>:
> +\s*[a-f0-9]+:\s*c4 a2 79 e6 8c f5 00 00 00 10\s+cmpbexadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e6 09\s+cmpbexadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e6 89 fc 01 00 00\s+cmpbexadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e6 8a 00 fe ff ff\s+cmpbexadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e6 8c f5 00 00 00 10\s+cmpbexadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e6 09\s+cmpbexadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e6 89 f8 03 00 00\s+cmpbexadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e6 8a 00 fc ff ff\s+cmpbexadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 e2 8c f5 00 00 00 10\s+cmpbxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e2 09\s+cmpbxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e2 89 fc 01 00 00\s+cmpbxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e2 8a 00 fe ff ff\s+cmpbxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e2 8c f5 00 00 00 10\s+cmpbxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e2 09\s+cmpbxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e2 89 f8 03 00 00\s+cmpbxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e2 8a 00 fc ff ff\s+cmpbxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 ee 8c f5 00 00 00 10\s+cmplexadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 ee 09\s+cmplexadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 ee 89 fc 01 00 00\s+cmplexadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 ee 8a 00 fe ff ff\s+cmplexadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 ee 8c f5 00 00 00 10\s+cmplexadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 ee 09\s+cmplexadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 ee 89 f8 03 00 00\s+cmplexadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 ee 8a 00 fc ff ff\s+cmplexadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 ec 8c f5 00 00 00 10\s+cmplxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 ec 09\s+cmplxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 ec 89 fc 01 00 00\s+cmplxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 ec 8a 00 fe ff ff\s+cmplxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 ec 8c f5 00 00 00 10\s+cmplxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 ec 09\s+cmplxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 ec 89 f8 03 00 00\s+cmplxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 ec 8a 00 fc ff ff\s+cmplxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 e7 8c f5 00 00 00 10\s+cmpnbexadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e7 09\s+cmpnbexadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e7 89 fc 01 00 00\s+cmpnbexadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e7 8a 00 fe ff ff\s+cmpnbexadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e7 8c f5 00 00 00 10\s+cmpnbexadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e7 09\s+cmpnbexadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e7 89 f8 03 00 00\s+cmpnbexadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e7 8a 00 fc ff ff\s+cmpnbexadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 e3 8c f5 00 00 00 10\s+cmpnbxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e3 09\s+cmpnbxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e3 89 fc 01 00 00\s+cmpnbxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e3 8a 00 fe ff ff\s+cmpnbxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e3 8c f5 00 00 00 10\s+cmpnbxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e3 09\s+cmpnbxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e3 89 f8 03 00 00\s+cmpnbxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e3 8a 00 fc ff ff\s+cmpnbxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 ef 8c f5 00 00 00 10\s+cmpnlexadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 ef 09\s+cmpnlexadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 ef 89 fc 01 00 00\s+cmpnlexadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 ef 8a 00 fe ff ff\s+cmpnlexadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 ef 8c f5 00 00 00 10\s+cmpnlexadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 ef 09\s+cmpnlexadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 ef 89 f8 03 00 00\s+cmpnlexadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 ef 8a 00 fc ff ff\s+cmpnlexadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 ed 8c f5 00 00 00 10\s+cmpnlxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 ed 09\s+cmpnlxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 ed 89 fc 01 00 00\s+cmpnlxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 ed 8a 00 fe ff ff\s+cmpnlxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 ed 8c f5 00 00 00 10\s+cmpnlxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 ed 09\s+cmpnlxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 ed 89 f8 03 00 00\s+cmpnlxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 ed 8a 00 fc ff ff\s+cmpnlxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 e1 8c f5 00 00 00 10\s+cmpnoxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e1 09\s+cmpnoxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e1 89 fc 01 00 00\s+cmpnoxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e1 8a 00 fe ff ff\s+cmpnoxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e1 8c f5 00 00 00 10\s+cmpnoxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e1 09\s+cmpnoxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e1 89 f8 03 00 00\s+cmpnoxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e1 8a 00 fc ff ff\s+cmpnoxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 eb 8c f5 00 00 00 10\s+cmpnpxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 eb 09\s+cmpnpxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 eb 89 fc 01 00 00\s+cmpnpxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 eb 8a 00 fe ff ff\s+cmpnpxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 eb 8c f5 00 00 00 10\s+cmpnpxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 eb 09\s+cmpnpxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 eb 89 f8 03 00 00\s+cmpnpxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 eb 8a 00 fc ff ff\s+cmpnpxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 e9 8c f5 00 00 00 10\s+cmpnsxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e9 09\s+cmpnsxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e9 89 fc 01 00 00\s+cmpnsxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e9 8a 00 fe ff ff\s+cmpnsxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e9 8c f5 00 00 00 10\s+cmpnsxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e9 09\s+cmpnsxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e9 89 f8 03 00 00\s+cmpnsxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e9 8a 00 fc ff ff\s+cmpnsxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 e5 8c f5 00 00 00 10\s+cmpnzxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e5 09\s+cmpnzxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e5 89 fc 01 00 00\s+cmpnzxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e5 8a 00 fe ff ff\s+cmpnzxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e5 8c f5 00 00 00 10\s+cmpnzxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e5 09\s+cmpnzxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e5 89 f8 03 00 00\s+cmpnzxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e5 8a 00 fc ff ff\s+cmpnzxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 e0 8c f5 00 00 00 10\s+cmpoxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e0 09\s+cmpoxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e0 89 fc 01 00 00\s+cmpoxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e0 8a 00 fe ff ff\s+cmpoxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e0 8c f5 00 00 00 10\s+cmpoxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e0 09\s+cmpoxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e0 89 f8 03 00 00\s+cmpoxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e0 8a 00 fc ff ff\s+cmpoxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 ea 8c f5 00 00 00 10\s+cmppxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 ea 09\s+cmppxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 ea 89 fc 01 00 00\s+cmppxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 ea 8a 00 fe ff ff\s+cmppxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 ea 8c f5 00 00 00 10\s+cmppxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 ea 09\s+cmppxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 ea 89 f8 03 00 00\s+cmppxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 ea 8a 00 fc ff ff\s+cmppxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 e8 8c f5 00 00 00 10\s+cmpsxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e8 09\s+cmpsxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e8 89 fc 01 00 00\s+cmpsxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e8 8a 00 fe ff ff\s+cmpsxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e8 8c f5 00 00 00 10\s+cmpsxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e8 09\s+cmpsxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e8 89 f8 03 00 00\s+cmpsxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e8 8a 00 fc ff ff\s+cmpsxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 e4 8c f5 00 00 00 10\s+cmpzxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e4 09\s+cmpzxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e4 89 fc 01 00 00\s+cmpzxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e4 8a 00 fe ff ff\s+cmpzxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e4 8c f5 00 00 00 10\s+cmpzxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e4 09\s+cmpzxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e4 89 f8 03 00 00\s+cmpzxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e4 8a 00 fc ff ff\s+cmpzxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 e6 8c f5 00 00 00 10\s+cmpbexadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e6 09\s+cmpbexadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e6 89 fc 01 00 00\s+cmpbexadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e6 8a 00 fe ff ff\s+cmpbexadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e6 8c f5 00 00 00 10\s+cmpbexadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e6 09\s+cmpbexadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e6 89 f8 03 00 00\s+cmpbexadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e6 8a 00 fc ff ff\s+cmpbexadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 e2 8c f5 00 00 00 10\s+cmpbxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e2 09\s+cmpbxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e2 89 fc 01 00 00\s+cmpbxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e2 8a 00 fe ff ff\s+cmpbxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e2 8c f5 00 00 00 10\s+cmpbxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e2 09\s+cmpbxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e2 89 f8 03 00 00\s+cmpbxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e2 8a 00 fc ff ff\s+cmpbxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 ee 8c f5 00 00 00 10\s+cmplexadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 ee 09\s+cmplexadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 ee 89 fc 01 00 00\s+cmplexadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 ee 8a 00 fe ff ff\s+cmplexadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 ee 8c f5 00 00 00 10\s+cmplexadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 ee 09\s+cmplexadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 ee 89 f8 03 00 00\s+cmplexadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 ee 8a 00 fc ff ff\s+cmplexadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 ec 8c f5 00 00 00 10\s+cmplxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 ec 09\s+cmplxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 ec 89 fc 01 00 00\s+cmplxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 ec 8a 00 fe ff ff\s+cmplxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 ec 8c f5 00 00 00 10\s+cmplxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 ec 09\s+cmplxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 ec 89 f8 03 00 00\s+cmplxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 ec 8a 00 fc ff ff\s+cmplxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 e7 8c f5 00 00 00 10\s+cmpnbexadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e7 09\s+cmpnbexadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e7 89 fc 01 00 00\s+cmpnbexadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e7 8a 00 fe ff ff\s+cmpnbexadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e7 8c f5 00 00 00 10\s+cmpnbexadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e7 09\s+cmpnbexadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e7 89 f8 03 00 00\s+cmpnbexadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e7 8a 00 fc ff ff\s+cmpnbexadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 e3 8c f5 00 00 00 10\s+cmpnbxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e3 09\s+cmpnbxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e3 89 fc 01 00 00\s+cmpnbxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e3 8a 00 fe ff ff\s+cmpnbxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e3 8c f5 00 00 00 10\s+cmpnbxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e3 09\s+cmpnbxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e3 89 f8 03 00 00\s+cmpnbxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e3 8a 00 fc ff ff\s+cmpnbxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 ef 8c f5 00 00 00 10\s+cmpnlexadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 ef 09\s+cmpnlexadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 ef 89 fc 01 00 00\s+cmpnlexadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 ef 8a 00 fe ff ff\s+cmpnlexadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 ef 8c f5 00 00 00 10\s+cmpnlexadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 ef 09\s+cmpnlexadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 ef 89 f8 03 00 00\s+cmpnlexadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 ef 8a 00 fc ff ff\s+cmpnlexadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 ed 8c f5 00 00 00 10\s+cmpnlxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 ed 09\s+cmpnlxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 ed 89 fc 01 00 00\s+cmpnlxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 ed 8a 00 fe ff ff\s+cmpnlxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 ed 8c f5 00 00 00 10\s+cmpnlxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 ed 09\s+cmpnlxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 ed 89 f8 03 00 00\s+cmpnlxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 ed 8a 00 fc ff ff\s+cmpnlxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 e1 8c f5 00 00 00 10\s+cmpnoxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e1 09\s+cmpnoxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e1 89 fc 01 00 00\s+cmpnoxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e1 8a 00 fe ff ff\s+cmpnoxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e1 8c f5 00 00 00 10\s+cmpnoxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e1 09\s+cmpnoxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e1 89 f8 03 00 00\s+cmpnoxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e1 8a 00 fc ff ff\s+cmpnoxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 eb 8c f5 00 00 00 10\s+cmpnpxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 eb 09\s+cmpnpxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 eb 89 fc 01 00 00\s+cmpnpxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 eb 8a 00 fe ff ff\s+cmpnpxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 eb 8c f5 00 00 00 10\s+cmpnpxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 eb 09\s+cmpnpxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 eb 89 f8 03 00 00\s+cmpnpxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 eb 8a 00 fc ff ff\s+cmpnpxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 e9 8c f5 00 00 00 10\s+cmpnsxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e9 09\s+cmpnsxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e9 89 fc 01 00 00\s+cmpnsxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e9 8a 00 fe ff ff\s+cmpnsxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e9 8c f5 00 00 00 10\s+cmpnsxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e9 09\s+cmpnsxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e9 89 f8 03 00 00\s+cmpnsxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e9 8a 00 fc ff ff\s+cmpnsxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 e5 8c f5 00 00 00 10\s+cmpnzxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e5 09\s+cmpnzxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e5 89 fc 01 00 00\s+cmpnzxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e5 8a 00 fe ff ff\s+cmpnzxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e5 8c f5 00 00 00 10\s+cmpnzxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e5 09\s+cmpnzxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e5 89 f8 03 00 00\s+cmpnzxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e5 8a 00 fc ff ff\s+cmpnzxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 e0 8c f5 00 00 00 10\s+cmpoxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e0 09\s+cmpoxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e0 89 fc 01 00 00\s+cmpoxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e0 8a 00 fe ff ff\s+cmpoxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e0 8c f5 00 00 00 10\s+cmpoxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e0 09\s+cmpoxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e0 89 f8 03 00 00\s+cmpoxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e0 8a 00 fc ff ff\s+cmpoxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 ea 8c f5 00 00 00 10\s+cmppxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 ea 09\s+cmppxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 ea 89 fc 01 00 00\s+cmppxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 ea 8a 00 fe ff ff\s+cmppxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 ea 8c f5 00 00 00 10\s+cmppxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 ea 09\s+cmppxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 ea 89 f8 03 00 00\s+cmppxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 ea 8a 00 fc ff ff\s+cmppxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 e8 8c f5 00 00 00 10\s+cmpsxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e8 09\s+cmpsxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e8 89 fc 01 00 00\s+cmpsxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e8 8a 00 fe ff ff\s+cmpsxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e8 8c f5 00 00 00 10\s+cmpsxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e8 09\s+cmpsxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e8 89 f8 03 00 00\s+cmpsxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e8 8a 00 fc ff ff\s+cmpsxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 a2 79 e4 8c f5 00 00 00 10\s+cmpzxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 c2 61 e4 09\s+cmpzxadd DWORD PTR \[r9\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 e2 79 e4 89 fc 01 00 00\s+cmpzxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
> +\s*[a-f0-9]+:\s*c4 e2 61 e4 8a 00 fe ff ff\s+cmpzxadd DWORD PTR \[rdx-0x200\],ecx,ebx
> +\s*[a-f0-9]+:\s*c4 a2 f9 e4 8c f5 00 00 00 10\s+cmpzxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 c2 e1 e4 09\s+cmpzxadd QWORD PTR \[r9\],rcx,rbx
> +\s*[a-f0-9]+:\s*c4 e2 f9 e4 89 f8 03 00 00\s+cmpzxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
> +\s*[a-f0-9]+:\s*c4 e2 e1 e4 8a 00 fc ff ff\s+cmpzxadd QWORD PTR \[rdx-0x400\],rcx,rbx
> diff --git a/gas/testsuite/gas/i386/x86-64-cmpccxadd.d b/gas/testsuite/gas/i386/x86-64-cmpccxadd.d
> new file mode 100644
> index 0000000000..b24af38d1c
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-cmpccxadd.d
> @@ -0,0 +1,266 @@
> +#as:
> +#objdump: -dw
> +#name: x86_64 CMPCCXADD insns
> +#source: x86-64-cmpccxadd.s
> +
> +.*: +file format .*
> +
> +Disassembly of section \.text:
> +
> +0+ <_start>:
> +\s*[a-f0-9]+:\s*c4 a2 79 e6 8c f5 00 00 00 10\s+cmpbexadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e6 09\s+cmpbexadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e6 89 fc 01 00 00\s+cmpbexadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e6 8a 00 fe ff ff\s+cmpbexadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e6 8c f5 00 00 00 10\s+cmpbexadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e6 09\s+cmpbexadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e6 89 f8 03 00 00\s+cmpbexadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e6 8a 00 fc ff ff\s+cmpbexadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 e2 8c f5 00 00 00 10\s+cmpbxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e2 09\s+cmpbxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e2 89 fc 01 00 00\s+cmpbxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e2 8a 00 fe ff ff\s+cmpbxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e2 8c f5 00 00 00 10\s+cmpbxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e2 09\s+cmpbxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e2 89 f8 03 00 00\s+cmpbxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e2 8a 00 fc ff ff\s+cmpbxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 ee 8c f5 00 00 00 10\s+cmplexadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 ee 09\s+cmplexadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 ee 89 fc 01 00 00\s+cmplexadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 ee 8a 00 fe ff ff\s+cmplexadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 ee 8c f5 00 00 00 10\s+cmplexadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 ee 09\s+cmplexadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 ee 89 f8 03 00 00\s+cmplexadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 ee 8a 00 fc ff ff\s+cmplexadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 ec 8c f5 00 00 00 10\s+cmplxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 ec 09\s+cmplxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 ec 89 fc 01 00 00\s+cmplxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 ec 8a 00 fe ff ff\s+cmplxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 ec 8c f5 00 00 00 10\s+cmplxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 ec 09\s+cmplxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 ec 89 f8 03 00 00\s+cmplxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 ec 8a 00 fc ff ff\s+cmplxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 e7 8c f5 00 00 00 10\s+cmpnbexadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e7 09\s+cmpnbexadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e7 89 fc 01 00 00\s+cmpnbexadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e7 8a 00 fe ff ff\s+cmpnbexadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e7 8c f5 00 00 00 10\s+cmpnbexadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e7 09\s+cmpnbexadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e7 89 f8 03 00 00\s+cmpnbexadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e7 8a 00 fc ff ff\s+cmpnbexadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 e3 8c f5 00 00 00 10\s+cmpnbxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e3 09\s+cmpnbxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e3 89 fc 01 00 00\s+cmpnbxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e3 8a 00 fe ff ff\s+cmpnbxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e3 8c f5 00 00 00 10\s+cmpnbxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e3 09\s+cmpnbxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e3 89 f8 03 00 00\s+cmpnbxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e3 8a 00 fc ff ff\s+cmpnbxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 ef 8c f5 00 00 00 10\s+cmpnlexadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 ef 09\s+cmpnlexadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 ef 89 fc 01 00 00\s+cmpnlexadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 ef 8a 00 fe ff ff\s+cmpnlexadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 ef 8c f5 00 00 00 10\s+cmpnlexadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 ef 09\s+cmpnlexadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 ef 89 f8 03 00 00\s+cmpnlexadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 ef 8a 00 fc ff ff\s+cmpnlexadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 ed 8c f5 00 00 00 10\s+cmpnlxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 ed 09\s+cmpnlxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 ed 89 fc 01 00 00\s+cmpnlxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 ed 8a 00 fe ff ff\s+cmpnlxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 ed 8c f5 00 00 00 10\s+cmpnlxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 ed 09\s+cmpnlxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 ed 89 f8 03 00 00\s+cmpnlxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 ed 8a 00 fc ff ff\s+cmpnlxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 e1 8c f5 00 00 00 10\s+cmpnoxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e1 09\s+cmpnoxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e1 89 fc 01 00 00\s+cmpnoxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e1 8a 00 fe ff ff\s+cmpnoxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e1 8c f5 00 00 00 10\s+cmpnoxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e1 09\s+cmpnoxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e1 89 f8 03 00 00\s+cmpnoxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e1 8a 00 fc ff ff\s+cmpnoxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 eb 8c f5 00 00 00 10\s+cmpnpxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 eb 09\s+cmpnpxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 eb 89 fc 01 00 00\s+cmpnpxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 eb 8a 00 fe ff ff\s+cmpnpxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 eb 8c f5 00 00 00 10\s+cmpnpxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 eb 09\s+cmpnpxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 eb 89 f8 03 00 00\s+cmpnpxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 eb 8a 00 fc ff ff\s+cmpnpxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 e9 8c f5 00 00 00 10\s+cmpnsxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e9 09\s+cmpnsxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e9 89 fc 01 00 00\s+cmpnsxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e9 8a 00 fe ff ff\s+cmpnsxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e9 8c f5 00 00 00 10\s+cmpnsxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e9 09\s+cmpnsxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e9 89 f8 03 00 00\s+cmpnsxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e9 8a 00 fc ff ff\s+cmpnsxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 e5 8c f5 00 00 00 10\s+cmpnzxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e5 09\s+cmpnzxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e5 89 fc 01 00 00\s+cmpnzxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e5 8a 00 fe ff ff\s+cmpnzxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e5 8c f5 00 00 00 10\s+cmpnzxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e5 09\s+cmpnzxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e5 89 f8 03 00 00\s+cmpnzxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e5 8a 00 fc ff ff\s+cmpnzxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 e0 8c f5 00 00 00 10\s+cmpoxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e0 09\s+cmpoxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e0 89 fc 01 00 00\s+cmpoxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e0 8a 00 fe ff ff\s+cmpoxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e0 8c f5 00 00 00 10\s+cmpoxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e0 09\s+cmpoxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e0 89 f8 03 00 00\s+cmpoxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e0 8a 00 fc ff ff\s+cmpoxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 ea 8c f5 00 00 00 10\s+cmppxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 ea 09\s+cmppxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 ea 89 fc 01 00 00\s+cmppxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 ea 8a 00 fe ff ff\s+cmppxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 ea 8c f5 00 00 00 10\s+cmppxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 ea 09\s+cmppxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 ea 89 f8 03 00 00\s+cmppxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 ea 8a 00 fc ff ff\s+cmppxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 e8 8c f5 00 00 00 10\s+cmpsxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e8 09\s+cmpsxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e8 89 fc 01 00 00\s+cmpsxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e8 8a 00 fe ff ff\s+cmpsxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e8 8c f5 00 00 00 10\s+cmpsxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e8 09\s+cmpsxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e8 89 f8 03 00 00\s+cmpsxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e8 8a 00 fc ff ff\s+cmpsxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 e4 8c f5 00 00 00 10\s+cmpzxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e4 09\s+cmpzxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e4 89 fc 01 00 00\s+cmpzxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e4 8a 00 fe ff ff\s+cmpzxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e4 8c f5 00 00 00 10\s+cmpzxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e4 09\s+cmpzxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e4 89 f8 03 00 00\s+cmpzxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e4 8a 00 fc ff ff\s+cmpzxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 e6 8c f5 00 00 00 10\s+cmpbexadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e6 09\s+cmpbexadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e6 89 fc 01 00 00\s+cmpbexadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e6 8a 00 fe ff ff\s+cmpbexadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e6 8c f5 00 00 00 10\s+cmpbexadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e6 09\s+cmpbexadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e6 89 f8 03 00 00\s+cmpbexadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e6 8a 00 fc ff ff\s+cmpbexadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 e2 8c f5 00 00 00 10\s+cmpbxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e2 09\s+cmpbxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e2 89 fc 01 00 00\s+cmpbxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e2 8a 00 fe ff ff\s+cmpbxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e2 8c f5 00 00 00 10\s+cmpbxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e2 09\s+cmpbxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e2 89 f8 03 00 00\s+cmpbxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e2 8a 00 fc ff ff\s+cmpbxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 ee 8c f5 00 00 00 10\s+cmplexadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 ee 09\s+cmplexadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 ee 89 fc 01 00 00\s+cmplexadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 ee 8a 00 fe ff ff\s+cmplexadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 ee 8c f5 00 00 00 10\s+cmplexadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 ee 09\s+cmplexadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 ee 89 f8 03 00 00\s+cmplexadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 ee 8a 00 fc ff ff\s+cmplexadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 ec 8c f5 00 00 00 10\s+cmplxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 ec 09\s+cmplxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 ec 89 fc 01 00 00\s+cmplxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 ec 8a 00 fe ff ff\s+cmplxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 ec 8c f5 00 00 00 10\s+cmplxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 ec 09\s+cmplxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 ec 89 f8 03 00 00\s+cmplxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 ec 8a 00 fc ff ff\s+cmplxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 e7 8c f5 00 00 00 10\s+cmpnbexadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e7 09\s+cmpnbexadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e7 89 fc 01 00 00\s+cmpnbexadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e7 8a 00 fe ff ff\s+cmpnbexadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e7 8c f5 00 00 00 10\s+cmpnbexadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e7 09\s+cmpnbexadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e7 89 f8 03 00 00\s+cmpnbexadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e7 8a 00 fc ff ff\s+cmpnbexadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 e3 8c f5 00 00 00 10\s+cmpnbxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e3 09\s+cmpnbxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e3 89 fc 01 00 00\s+cmpnbxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e3 8a 00 fe ff ff\s+cmpnbxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e3 8c f5 00 00 00 10\s+cmpnbxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e3 09\s+cmpnbxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e3 89 f8 03 00 00\s+cmpnbxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e3 8a 00 fc ff ff\s+cmpnbxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 ef 8c f5 00 00 00 10\s+cmpnlexadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 ef 09\s+cmpnlexadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 ef 89 fc 01 00 00\s+cmpnlexadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 ef 8a 00 fe ff ff\s+cmpnlexadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 ef 8c f5 00 00 00 10\s+cmpnlexadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 ef 09\s+cmpnlexadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 ef 89 f8 03 00 00\s+cmpnlexadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 ef 8a 00 fc ff ff\s+cmpnlexadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 ed 8c f5 00 00 00 10\s+cmpnlxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 ed 09\s+cmpnlxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 ed 89 fc 01 00 00\s+cmpnlxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 ed 8a 00 fe ff ff\s+cmpnlxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 ed 8c f5 00 00 00 10\s+cmpnlxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 ed 09\s+cmpnlxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 ed 89 f8 03 00 00\s+cmpnlxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 ed 8a 00 fc ff ff\s+cmpnlxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 e1 8c f5 00 00 00 10\s+cmpnoxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e1 09\s+cmpnoxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e1 89 fc 01 00 00\s+cmpnoxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e1 8a 00 fe ff ff\s+cmpnoxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e1 8c f5 00 00 00 10\s+cmpnoxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e1 09\s+cmpnoxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e1 89 f8 03 00 00\s+cmpnoxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e1 8a 00 fc ff ff\s+cmpnoxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 eb 8c f5 00 00 00 10\s+cmpnpxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 eb 09\s+cmpnpxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 eb 89 fc 01 00 00\s+cmpnpxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 eb 8a 00 fe ff ff\s+cmpnpxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 eb 8c f5 00 00 00 10\s+cmpnpxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 eb 09\s+cmpnpxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 eb 89 f8 03 00 00\s+cmpnpxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 eb 8a 00 fc ff ff\s+cmpnpxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 e9 8c f5 00 00 00 10\s+cmpnsxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e9 09\s+cmpnsxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e9 89 fc 01 00 00\s+cmpnsxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e9 8a 00 fe ff ff\s+cmpnsxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e9 8c f5 00 00 00 10\s+cmpnsxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e9 09\s+cmpnsxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e9 89 f8 03 00 00\s+cmpnsxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e9 8a 00 fc ff ff\s+cmpnsxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 e5 8c f5 00 00 00 10\s+cmpnzxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e5 09\s+cmpnzxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e5 89 fc 01 00 00\s+cmpnzxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e5 8a 00 fe ff ff\s+cmpnzxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e5 8c f5 00 00 00 10\s+cmpnzxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e5 09\s+cmpnzxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e5 89 f8 03 00 00\s+cmpnzxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e5 8a 00 fc ff ff\s+cmpnzxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 e0 8c f5 00 00 00 10\s+cmpoxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e0 09\s+cmpoxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e0 89 fc 01 00 00\s+cmpoxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e0 8a 00 fe ff ff\s+cmpoxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e0 8c f5 00 00 00 10\s+cmpoxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e0 09\s+cmpoxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e0 89 f8 03 00 00\s+cmpoxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e0 8a 00 fc ff ff\s+cmpoxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 ea 8c f5 00 00 00 10\s+cmppxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 ea 09\s+cmppxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 ea 89 fc 01 00 00\s+cmppxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 ea 8a 00 fe ff ff\s+cmppxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 ea 8c f5 00 00 00 10\s+cmppxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 ea 09\s+cmppxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 ea 89 f8 03 00 00\s+cmppxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 ea 8a 00 fc ff ff\s+cmppxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 e8 8c f5 00 00 00 10\s+cmpsxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e8 09\s+cmpsxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e8 89 fc 01 00 00\s+cmpsxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e8 8a 00 fe ff ff\s+cmpsxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e8 8c f5 00 00 00 10\s+cmpsxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e8 09\s+cmpsxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e8 89 f8 03 00 00\s+cmpsxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e8 8a 00 fc ff ff\s+cmpsxadd %rbx,%rcx,-0x400\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 79 e4 8c f5 00 00 00 10\s+cmpzxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 61 e4 09\s+cmpzxadd %ebx,%ecx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 79 e4 89 fc 01 00 00\s+cmpzxadd %eax,%ecx,0x1fc\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 61 e4 8a 00 fe ff ff\s+cmpzxadd %ebx,%ecx,-0x200\(%rdx\)
> +\s*[a-f0-9]+:\s*c4 a2 f9 e4 8c f5 00 00 00 10\s+cmpzxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
> +\s*[a-f0-9]+:\s*c4 c2 e1 e4 09\s+cmpzxadd %rbx,%rcx,\(%r9\)
> +\s*[a-f0-9]+:\s*c4 e2 f9 e4 89 f8 03 00 00\s+cmpzxadd %rax,%rcx,0x3f8\(%rcx\)
> +\s*[a-f0-9]+:\s*c4 e2 e1 e4 8a 00 fc ff ff\s+cmpzxadd %rbx,%rcx,-0x400\(%rdx\)
> diff --git a/gas/testsuite/gas/i386/x86-64-cmpccxadd.s b/gas/testsuite/gas/i386/x86-64-cmpccxadd.s
> new file mode 100644
> index 0000000000..f2eb84a1a3
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-cmpccxadd.s
> @@ -0,0 +1,263 @@
> +# Check 64bit CMPccXADD instructions
> +
> +       .allow_index_reg
> +       .text
> +_start:
> +       cmpbexadd       %eax, %ecx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpbexadd       %ebx, %ecx, (%r9)        #CMPCCXADD
> +       cmpbexadd       %eax, %ecx, 508(%rcx)    #CMPCCXADD Disp32(fc010000)
> +       cmpbexadd       %ebx, %ecx, -512(%rdx)   #CMPCCXADD Disp32(00feffff)
> +       cmpbexadd       %rax, %rcx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpbexadd       %rbx, %rcx, (%r9)        #CMPCCXADD
> +       cmpbexadd       %rax, %rcx, 1016(%rcx)   #CMPCCXADD Disp32(f8030000)
> +       cmpbexadd       %rbx, %rcx, -1024(%rdx)  #CMPCCXADD Disp32(00fcffff)
> +       cmpbxadd        %eax, %ecx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpbxadd        %ebx, %ecx, (%r9)        #CMPCCXADD
> +       cmpbxadd        %eax, %ecx, 508(%rcx)    #CMPCCXADD Disp32(fc010000)
> +       cmpbxadd        %ebx, %ecx, -512(%rdx)   #CMPCCXADD Disp32(00feffff)
> +       cmpbxadd        %rax, %rcx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpbxadd        %rbx, %rcx, (%r9)        #CMPCCXADD
> +       cmpbxadd        %rax, %rcx, 1016(%rcx)   #CMPCCXADD Disp32(f8030000)
> +       cmpbxadd        %rbx, %rcx, -1024(%rdx)  #CMPCCXADD Disp32(00fcffff)
> +       cmplexadd       %eax, %ecx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmplexadd       %ebx, %ecx, (%r9)        #CMPCCXADD
> +       cmplexadd       %eax, %ecx, 508(%rcx)    #CMPCCXADD Disp32(fc010000)
> +       cmplexadd       %ebx, %ecx, -512(%rdx)   #CMPCCXADD Disp32(00feffff)
> +       cmplexadd       %rax, %rcx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmplexadd       %rbx, %rcx, (%r9)        #CMPCCXADD
> +       cmplexadd       %rax, %rcx, 1016(%rcx)   #CMPCCXADD Disp32(f8030000)
> +       cmplexadd       %rbx, %rcx, -1024(%rdx)  #CMPCCXADD Disp32(00fcffff)
> +       cmplxadd        %eax, %ecx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmplxadd        %ebx, %ecx, (%r9)        #CMPCCXADD
> +       cmplxadd        %eax, %ecx, 508(%rcx)    #CMPCCXADD Disp32(fc010000)
> +       cmplxadd        %ebx, %ecx, -512(%rdx)   #CMPCCXADD Disp32(00feffff)
> +       cmplxadd        %rax, %rcx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmplxadd        %rbx, %rcx, (%r9)        #CMPCCXADD
> +       cmplxadd        %rax, %rcx, 1016(%rcx)   #CMPCCXADD Disp32(f8030000)
> +       cmplxadd        %rbx, %rcx, -1024(%rdx)  #CMPCCXADD Disp32(00fcffff)
> +       cmpnbexadd      %eax, %ecx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpnbexadd      %ebx, %ecx, (%r9)        #CMPCCXADD
> +       cmpnbexadd      %eax, %ecx, 508(%rcx)    #CMPCCXADD Disp32(fc010000)
> +       cmpnbexadd      %ebx, %ecx, -512(%rdx)   #CMPCCXADD Disp32(00feffff)
> +       cmpnbexadd      %rax, %rcx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpnbexadd      %rbx, %rcx, (%r9)        #CMPCCXADD
> +       cmpnbexadd      %rax, %rcx, 1016(%rcx)   #CMPCCXADD Disp32(f8030000)
> +       cmpnbexadd      %rbx, %rcx, -1024(%rdx)  #CMPCCXADD Disp32(00fcffff)
> +       cmpnbxadd       %eax, %ecx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpnbxadd       %ebx, %ecx, (%r9)        #CMPCCXADD
> +       cmpnbxadd       %eax, %ecx, 508(%rcx)    #CMPCCXADD Disp32(fc010000)
> +       cmpnbxadd       %ebx, %ecx, -512(%rdx)   #CMPCCXADD Disp32(00feffff)
> +       cmpnbxadd       %rax, %rcx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpnbxadd       %rbx, %rcx, (%r9)        #CMPCCXADD
> +       cmpnbxadd       %rax, %rcx, 1016(%rcx)   #CMPCCXADD Disp32(f8030000)
> +       cmpnbxadd       %rbx, %rcx, -1024(%rdx)  #CMPCCXADD Disp32(00fcffff)
> +       cmpnlexadd      %eax, %ecx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpnlexadd      %ebx, %ecx, (%r9)        #CMPCCXADD
> +       cmpnlexadd      %eax, %ecx, 508(%rcx)    #CMPCCXADD Disp32(fc010000)
> +       cmpnlexadd      %ebx, %ecx, -512(%rdx)   #CMPCCXADD Disp32(00feffff)
> +       cmpnlexadd      %rax, %rcx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpnlexadd      %rbx, %rcx, (%r9)        #CMPCCXADD
> +       cmpnlexadd      %rax, %rcx, 1016(%rcx)   #CMPCCXADD Disp32(f8030000)
> +       cmpnlexadd      %rbx, %rcx, -1024(%rdx)  #CMPCCXADD Disp32(00fcffff)
> +       cmpnlxadd       %eax, %ecx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpnlxadd       %ebx, %ecx, (%r9)        #CMPCCXADD
> +       cmpnlxadd       %eax, %ecx, 508(%rcx)    #CMPCCXADD Disp32(fc010000)
> +       cmpnlxadd       %ebx, %ecx, -512(%rdx)   #CMPCCXADD Disp32(00feffff)
> +       cmpnlxadd       %rax, %rcx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpnlxadd       %rbx, %rcx, (%r9)        #CMPCCXADD
> +       cmpnlxadd       %rax, %rcx, 1016(%rcx)   #CMPCCXADD Disp32(f8030000)
> +       cmpnlxadd       %rbx, %rcx, -1024(%rdx)  #CMPCCXADD Disp32(00fcffff)
> +       cmpnoxadd       %eax, %ecx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpnoxadd       %ebx, %ecx, (%r9)        #CMPCCXADD
> +       cmpnoxadd       %eax, %ecx, 508(%rcx)    #CMPCCXADD Disp32(fc010000)
> +       cmpnoxadd       %ebx, %ecx, -512(%rdx)   #CMPCCXADD Disp32(00feffff)
> +       cmpnoxadd       %rax, %rcx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpnoxadd       %rbx, %rcx, (%r9)        #CMPCCXADD
> +       cmpnoxadd       %rax, %rcx, 1016(%rcx)   #CMPCCXADD Disp32(f8030000)
> +       cmpnoxadd       %rbx, %rcx, -1024(%rdx)  #CMPCCXADD Disp32(00fcffff)
> +       cmpnpxadd       %eax, %ecx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpnpxadd       %ebx, %ecx, (%r9)        #CMPCCXADD
> +       cmpnpxadd       %eax, %ecx, 508(%rcx)    #CMPCCXADD Disp32(fc010000)
> +       cmpnpxadd       %ebx, %ecx, -512(%rdx)   #CMPCCXADD Disp32(00feffff)
> +       cmpnpxadd       %rax, %rcx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpnpxadd       %rbx, %rcx, (%r9)        #CMPCCXADD
> +       cmpnpxadd       %rax, %rcx, 1016(%rcx)   #CMPCCXADD Disp32(f8030000)
> +       cmpnpxadd       %rbx, %rcx, -1024(%rdx)  #CMPCCXADD Disp32(00fcffff)
> +       cmpnsxadd       %eax, %ecx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpnsxadd       %ebx, %ecx, (%r9)        #CMPCCXADD
> +       cmpnsxadd       %eax, %ecx, 508(%rcx)    #CMPCCXADD Disp32(fc010000)
> +       cmpnsxadd       %ebx, %ecx, -512(%rdx)   #CMPCCXADD Disp32(00feffff)
> +       cmpnsxadd       %rax, %rcx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpnsxadd       %rbx, %rcx, (%r9)        #CMPCCXADD
> +       cmpnsxadd       %rax, %rcx, 1016(%rcx)   #CMPCCXADD Disp32(f8030000)
> +       cmpnsxadd       %rbx, %rcx, -1024(%rdx)  #CMPCCXADD Disp32(00fcffff)
> +       cmpnzxadd       %eax, %ecx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpnzxadd       %ebx, %ecx, (%r9)        #CMPCCXADD
> +       cmpnzxadd       %eax, %ecx, 508(%rcx)    #CMPCCXADD Disp32(fc010000)
> +       cmpnzxadd       %ebx, %ecx, -512(%rdx)   #CMPCCXADD Disp32(00feffff)
> +       cmpnzxadd       %rax, %rcx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpnzxadd       %rbx, %rcx, (%r9)        #CMPCCXADD
> +       cmpnzxadd       %rax, %rcx, 1016(%rcx)   #CMPCCXADD Disp32(f8030000)
> +       cmpnzxadd       %rbx, %rcx, -1024(%rdx)  #CMPCCXADD Disp32(00fcffff)
> +       cmpoxadd        %eax, %ecx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpoxadd        %ebx, %ecx, (%r9)        #CMPCCXADD
> +       cmpoxadd        %eax, %ecx, 508(%rcx)    #CMPCCXADD Disp32(fc010000)
> +       cmpoxadd        %ebx, %ecx, -512(%rdx)   #CMPCCXADD Disp32(00feffff)
> +       cmpoxadd        %rax, %rcx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpoxadd        %rbx, %rcx, (%r9)        #CMPCCXADD
> +       cmpoxadd        %rax, %rcx, 1016(%rcx)   #CMPCCXADD Disp32(f8030000)
> +       cmpoxadd        %rbx, %rcx, -1024(%rdx)  #CMPCCXADD Disp32(00fcffff)
> +       cmppxadd        %eax, %ecx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmppxadd        %ebx, %ecx, (%r9)        #CMPCCXADD
> +       cmppxadd        %eax, %ecx, 508(%rcx)    #CMPCCXADD Disp32(fc010000)
> +       cmppxadd        %ebx, %ecx, -512(%rdx)   #CMPCCXADD Disp32(00feffff)
> +       cmppxadd        %rax, %rcx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmppxadd        %rbx, %rcx, (%r9)        #CMPCCXADD
> +       cmppxadd        %rax, %rcx, 1016(%rcx)   #CMPCCXADD Disp32(f8030000)
> +       cmppxadd        %rbx, %rcx, -1024(%rdx)  #CMPCCXADD Disp32(00fcffff)
> +       cmpsxadd        %eax, %ecx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpsxadd        %ebx, %ecx, (%r9)        #CMPCCXADD
> +       cmpsxadd        %eax, %ecx, 508(%rcx)    #CMPCCXADD Disp32(fc010000)
> +       cmpsxadd        %ebx, %ecx, -512(%rdx)   #CMPCCXADD Disp32(00feffff)
> +       cmpsxadd        %rax, %rcx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpsxadd        %rbx, %rcx, (%r9)        #CMPCCXADD
> +       cmpsxadd        %rax, %rcx, 1016(%rcx)   #CMPCCXADD Disp32(f8030000)
> +       cmpsxadd        %rbx, %rcx, -1024(%rdx)  #CMPCCXADD Disp32(00fcffff)
> +       cmpzxadd        %eax, %ecx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpzxadd        %ebx, %ecx, (%r9)        #CMPCCXADD
> +       cmpzxadd        %eax, %ecx, 508(%rcx)    #CMPCCXADD Disp32(fc010000)
> +       cmpzxadd        %ebx, %ecx, -512(%rdx)   #CMPCCXADD Disp32(00feffff)
> +       cmpzxadd        %rax, %rcx, 0x10000000(%rbp, %r14, 8)    #CMPCCXADD
> +       cmpzxadd        %rbx, %rcx, (%r9)        #CMPCCXADD
> +       cmpzxadd        %rax, %rcx, 1016(%rcx)   #CMPCCXADD Disp32(f8030000)
> +       cmpzxadd        %rbx, %rcx, -1024(%rdx)  #CMPCCXADD Disp32(00fcffff)
> +
> +.intel_syntax noprefix
> +       cmpbexadd       DWORD PTR [rbp+r14*8+0x10000000], ecx, eax       #CMPCCXADD
> +       cmpbexadd       DWORD PTR [r9], ecx, ebx         #CMPCCXADD
> +       cmpbexadd       DWORD PTR [rcx+508], ecx, eax    #CMPCCXADD Disp32(fc010000)
> +       cmpbexadd       DWORD PTR [rdx-512], ecx, ebx    #CMPCCXADD Disp32(00feffff)
> +       cmpbexadd       QWORD PTR [rbp+r14*8+0x10000000], rcx, rax       #CMPCCXADD
> +       cmpbexadd       QWORD PTR [r9], rcx, rbx         #CMPCCXADD
> +       cmpbexadd       QWORD PTR [rcx+1016], rcx, rax   #CMPCCXADD Disp32(f8030000)
> +       cmpbexadd       QWORD PTR [rdx-1024], rcx, rbx   #CMPCCXADD Disp32(00fcffff)
> +       cmpbxadd        DWORD PTR [rbp+r14*8+0x10000000], ecx, eax       #CMPCCXADD
> +       cmpbxadd        DWORD PTR [r9], ecx, ebx         #CMPCCXADD
> +       cmpbxadd        DWORD PTR [rcx+508], ecx, eax    #CMPCCXADD Disp32(fc010000)
> +       cmpbxadd        DWORD PTR [rdx-512], ecx, ebx    #CMPCCXADD Disp32(00feffff)
> +       cmpbxadd        QWORD PTR [rbp+r14*8+0x10000000], rcx, rax       #CMPCCXADD
> +       cmpbxadd        QWORD PTR [r9], rcx, rbx         #CMPCCXADD
> +       cmpbxadd        QWORD PTR [rcx+1016], rcx, rax   #CMPCCXADD Disp32(f8030000)
> +       cmpbxadd        QWORD PTR [rdx-1024], rcx, rbx   #CMPCCXADD Disp32(00fcffff)
> +       cmplexadd       DWORD PTR [rbp+r14*8+0x10000000], ecx, eax       #CMPCCXADD
> +       cmplexadd       DWORD PTR [r9], ecx, ebx         #CMPCCXADD
> +       cmplexadd       DWORD PTR [rcx+508], ecx, eax    #CMPCCXADD Disp32(fc010000)
> +       cmplexadd       DWORD PTR [rdx-512], ecx, ebx    #CMPCCXADD Disp32(00feffff)
> +       cmplexadd       QWORD PTR [rbp+r14*8+0x10000000], rcx, rax       #CMPCCXADD
> +       cmplexadd       QWORD PTR [r9], rcx, rbx         #CMPCCXADD
> +       cmplexadd       QWORD PTR [rcx+1016], rcx, rax   #CMPCCXADD Disp32(f8030000)
> +       cmplexadd       QWORD PTR [rdx-1024], rcx, rbx   #CMPCCXADD Disp32(00fcffff)
> +       cmplxadd        DWORD PTR [rbp+r14*8+0x10000000], ecx, eax       #CMPCCXADD
> +       cmplxadd        DWORD PTR [r9], ecx, ebx         #CMPCCXADD
> +       cmplxadd        DWORD PTR [rcx+508], ecx, eax    #CMPCCXADD Disp32(fc010000)
> +       cmplxadd        DWORD PTR [rdx-512], ecx, ebx    #CMPCCXADD Disp32(00feffff)
> +       cmplxadd        QWORD PTR [rbp+r14*8+0x10000000], rcx, rax       #CMPCCXADD
> +       cmplxadd        QWORD PTR [r9], rcx, rbx         #CMPCCXADD
> +       cmplxadd        QWORD PTR [rcx+1016], rcx, rax   #CMPCCXADD Disp32(f8030000)
> +       cmplxadd        QWORD PTR [rdx-1024], rcx, rbx   #CMPCCXADD Disp32(00fcffff)
> +       cmpnbexadd      DWORD PTR [rbp+r14*8+0x10000000], ecx, eax       #CMPCCXADD
> +       cmpnbexadd      DWORD PTR [r9], ecx, ebx         #CMPCCXADD
> +       cmpnbexadd      DWORD PTR [rcx+508], ecx, eax    #CMPCCXADD Disp32(fc010000)
> +       cmpnbexadd      DWORD PTR [rdx-512], ecx, ebx    #CMPCCXADD Disp32(00feffff)
> +       cmpnbexadd      QWORD PTR [rbp+r14*8+0x10000000], rcx, rax       #CMPCCXADD
> +       cmpnbexadd      QWORD PTR [r9], rcx, rbx         #CMPCCXADD
> +       cmpnbexadd      QWORD PTR [rcx+1016], rcx, rax   #CMPCCXADD Disp32(f8030000)
> +       cmpnbexadd      QWORD PTR [rdx-1024], rcx, rbx   #CMPCCXADD Disp32(00fcffff)
> +       cmpnbxadd       DWORD PTR [rbp+r14*8+0x10000000], ecx, eax       #CMPCCXADD
> +       cmpnbxadd       DWORD PTR [r9], ecx, ebx         #CMPCCXADD
> +       cmpnbxadd       DWORD PTR [rcx+508], ecx, eax    #CMPCCXADD Disp32(fc010000)
> +       cmpnbxadd       DWORD PTR [rdx-512], ecx, ebx    #CMPCCXADD Disp32(00feffff)
> +       cmpnbxadd       QWORD PTR [rbp+r14*8+0x10000000], rcx, rax       #CMPCCXADD
> +       cmpnbxadd       QWORD PTR [r9], rcx, rbx         #CMPCCXADD
> +       cmpnbxadd       QWORD PTR [rcx+1016], rcx, rax   #CMPCCXADD Disp32(f8030000)
> +       cmpnbxadd       QWORD PTR [rdx-1024], rcx, rbx   #CMPCCXADD Disp32(00fcffff)
> +       cmpnlexadd      DWORD PTR [rbp+r14*8+0x10000000], ecx, eax       #CMPCCXADD
> +       cmpnlexadd      DWORD PTR [r9], ecx, ebx         #CMPCCXADD
> +       cmpnlexadd      DWORD PTR [rcx+508], ecx, eax    #CMPCCXADD Disp32(fc010000)
> +       cmpnlexadd      DWORD PTR [rdx-512], ecx, ebx    #CMPCCXADD Disp32(00feffff)
> +       cmpnlexadd      QWORD PTR [rbp+r14*8+0x10000000], rcx, rax       #CMPCCXADD
> +       cmpnlexadd      QWORD PTR [r9], rcx, rbx         #CMPCCXADD
> +       cmpnlexadd      QWORD PTR [rcx+1016], rcx, rax   #CMPCCXADD Disp32(f8030000)
> +       cmpnlexadd      QWORD PTR [rdx-1024], rcx, rbx   #CMPCCXADD Disp32(00fcffff)
> +       cmpnlxadd       DWORD PTR [rbp+r14*8+0x10000000], ecx, eax       #CMPCCXADD
> +       cmpnlxadd       DWORD PTR [r9], ecx, ebx         #CMPCCXADD
> +       cmpnlxadd       DWORD PTR [rcx+508], ecx, eax    #CMPCCXADD Disp32(fc010000)
> +       cmpnlxadd       DWORD PTR [rdx-512], ecx, ebx    #CMPCCXADD Disp32(00feffff)
> +       cmpnlxadd       QWORD PTR [rbp+r14*8+0x10000000], rcx, rax       #CMPCCXADD
> +       cmpnlxadd       QWORD PTR [r9], rcx, rbx         #CMPCCXADD
> +       cmpnlxadd       QWORD PTR [rcx+1016], rcx, rax   #CMPCCXADD Disp32(f8030000)
> +       cmpnlxadd       QWORD PTR [rdx-1024], rcx, rbx   #CMPCCXADD Disp32(00fcffff)
> +       cmpnoxadd       DWORD PTR [rbp+r14*8+0x10000000], ecx, eax       #CMPCCXADD
> +       cmpnoxadd       DWORD PTR [r9], ecx, ebx         #CMPCCXADD
> +       cmpnoxadd       DWORD PTR [rcx+508], ecx, eax    #CMPCCXADD Disp32(fc010000)
> +       cmpnoxadd       DWORD PTR [rdx-512], ecx, ebx    #CMPCCXADD Disp32(00feffff)
> +       cmpnoxadd       QWORD PTR [rbp+r14*8+0x10000000], rcx, rax       #CMPCCXADD
> +       cmpnoxadd       QWORD PTR [r9], rcx, rbx         #CMPCCXADD
> +       cmpnoxadd       QWORD PTR [rcx+1016], rcx, rax   #CMPCCXADD Disp32(f8030000)
> +       cmpnoxadd       QWORD PTR [rdx-1024], rcx, rbx   #CMPCCXADD Disp32(00fcffff)
> +       cmpnpxadd       DWORD PTR [rbp+r14*8+0x10000000], ecx, eax       #CMPCCXADD
> +       cmpnpxadd       DWORD PTR [r9], ecx, ebx         #CMPCCXADD
> +       cmpnpxadd       DWORD PTR [rcx+508], ecx, eax    #CMPCCXADD Disp32(fc010000)
> +       cmpnpxadd       DWORD PTR [rdx-512], ecx, ebx    #CMPCCXADD Disp32(00feffff)
> +       cmpnpxadd       QWORD PTR [rbp+r14*8+0x10000000], rcx, rax       #CMPCCXADD
> +       cmpnpxadd       QWORD PTR [r9], rcx, rbx         #CMPCCXADD
> +       cmpnpxadd       QWORD PTR [rcx+1016], rcx, rax   #CMPCCXADD Disp32(f8030000)
> +       cmpnpxadd       QWORD PTR [rdx-1024], rcx, rbx   #CMPCCXADD Disp32(00fcffff)
> +       cmpnsxadd       DWORD PTR [rbp+r14*8+0x10000000], ecx, eax       #CMPCCXADD
> +       cmpnsxadd       DWORD PTR [r9], ecx, ebx         #CMPCCXADD
> +       cmpnsxadd       DWORD PTR [rcx+508], ecx, eax    #CMPCCXADD Disp32(fc010000)
> +       cmpnsxadd       DWORD PTR [rdx-512], ecx, ebx    #CMPCCXADD Disp32(00feffff)
> +       cmpnsxadd       QWORD PTR [rbp+r14*8+0x10000000], rcx, rax       #CMPCCXADD
> +       cmpnsxadd       QWORD PTR [r9], rcx, rbx         #CMPCCXADD
> +       cmpnsxadd       QWORD PTR [rcx+1016], rcx, rax   #CMPCCXADD Disp32(f8030000)
> +       cmpnsxadd       QWORD PTR [rdx-1024], rcx, rbx   #CMPCCXADD Disp32(00fcffff)
> +       cmpnzxadd       DWORD PTR [rbp+r14*8+0x10000000], ecx, eax       #CMPCCXADD
> +       cmpnzxadd       DWORD PTR [r9], ecx, ebx         #CMPCCXADD
> +       cmpnzxadd       DWORD PTR [rcx+508], ecx, eax    #CMPCCXADD Disp32(fc010000)
> +       cmpnzxadd       DWORD PTR [rdx-512], ecx, ebx    #CMPCCXADD Disp32(00feffff)
> +       cmpnzxadd       QWORD PTR [rbp+r14*8+0x10000000], rcx, rax       #CMPCCXADD
> +       cmpnzxadd       QWORD PTR [r9], rcx, rbx         #CMPCCXADD
> +       cmpnzxadd       QWORD PTR [rcx+1016], rcx, rax   #CMPCCXADD Disp32(f8030000)
> +       cmpnzxadd       QWORD PTR [rdx-1024], rcx, rbx   #CMPCCXADD Disp32(00fcffff)
> +       cmpoxadd        DWORD PTR [rbp+r14*8+0x10000000], ecx, eax       #CMPCCXADD
> +       cmpoxadd        DWORD PTR [r9], ecx, ebx         #CMPCCXADD
> +       cmpoxadd        DWORD PTR [rcx+508], ecx, eax    #CMPCCXADD Disp32(fc010000)
> +       cmpoxadd        DWORD PTR [rdx-512], ecx, ebx    #CMPCCXADD Disp32(00feffff)
> +       cmpoxadd        QWORD PTR [rbp+r14*8+0x10000000], rcx, rax       #CMPCCXADD
> +       cmpoxadd        QWORD PTR [r9], rcx, rbx         #CMPCCXADD
> +       cmpoxadd        QWORD PTR [rcx+1016], rcx, rax   #CMPCCXADD Disp32(f8030000)
> +       cmpoxadd        QWORD PTR [rdx-1024], rcx, rbx   #CMPCCXADD Disp32(00fcffff)
> +       cmppxadd        DWORD PTR [rbp+r14*8+0x10000000], ecx, eax       #CMPCCXADD
> +       cmppxadd        DWORD PTR [r9], ecx, ebx         #CMPCCXADD
> +       cmppxadd        DWORD PTR [rcx+508], ecx, eax    #CMPCCXADD Disp32(fc010000)
> +       cmppxadd        DWORD PTR [rdx-512], ecx, ebx    #CMPCCXADD Disp32(00feffff)
> +       cmppxadd        QWORD PTR [rbp+r14*8+0x10000000], rcx, rax       #CMPCCXADD
> +       cmppxadd        QWORD PTR [r9], rcx, rbx         #CMPCCXADD
> +       cmppxadd        QWORD PTR [rcx+1016], rcx, rax   #CMPCCXADD Disp32(f8030000)
> +       cmppxadd        QWORD PTR [rdx-1024], rcx, rbx   #CMPCCXADD Disp32(00fcffff)
> +       cmpsxadd        DWORD PTR [rbp+r14*8+0x10000000], ecx, eax       #CMPCCXADD
> +       cmpsxadd        DWORD PTR [r9], ecx, ebx         #CMPCCXADD
> +       cmpsxadd        DWORD PTR [rcx+508], ecx, eax    #CMPCCXADD Disp32(fc010000)
> +       cmpsxadd        DWORD PTR [rdx-512], ecx, ebx    #CMPCCXADD Disp32(00feffff)
> +       cmpsxadd        QWORD PTR [rbp+r14*8+0x10000000], rcx, rax       #CMPCCXADD
> +       cmpsxadd        QWORD PTR [r9], rcx, rbx         #CMPCCXADD
> +       cmpsxadd        QWORD PTR [rcx+1016], rcx, rax   #CMPCCXADD Disp32(f8030000)
> +       cmpsxadd        QWORD PTR [rdx-1024], rcx, rbx   #CMPCCXADD Disp32(00fcffff)
> +       cmpzxadd        DWORD PTR [rbp+r14*8+0x10000000], ecx, eax       #CMPCCXADD
> +       cmpzxadd        DWORD PTR [r9], ecx, ebx         #CMPCCXADD
> +       cmpzxadd        DWORD PTR [rcx+508], ecx, eax    #CMPCCXADD Disp32(fc010000)
> +       cmpzxadd        DWORD PTR [rdx-512], ecx, ebx    #CMPCCXADD Disp32(00feffff)
> +       cmpzxadd        QWORD PTR [rbp+r14*8+0x10000000], rcx, rax       #CMPCCXADD
> +       cmpzxadd        QWORD PTR [r9], rcx, rbx         #CMPCCXADD
> +       cmpzxadd        QWORD PTR [rcx+1016], rcx, rax   #CMPCCXADD Disp32(f8030000)
> +       cmpzxadd        QWORD PTR [rdx-1024], rcx, rbx   #CMPCCXADD Disp32(00fcffff)
> diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
> index 436d2e7a08..116450c871 100644
> --- a/opcodes/i386-dis.c
> +++ b/opcodes/i386-dis.c
> @@ -367,6 +367,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
>  #define Ma { OP_M, a_mode }
>  #define Mb { OP_M, b_mode }
>  #define Md { OP_M, d_mode }
> +#define Mdq { OP_M, dq_mode }
>  #define Mo { OP_M, o_mode }
>  #define Mp { OP_M, f_mode }            /* 32 or 48 bit memory operand for LDS, LES etc */
>  #define Mq { OP_M, q_mode }
> @@ -1282,7 +1283,23 @@ enum
>    X86_64_VEX_0F3849,
>    X86_64_VEX_0F384B,
>    X86_64_VEX_0F385C,
> -  X86_64_VEX_0F385E
> +  X86_64_VEX_0F385E,
> +  X86_64_VEX_0F38E0,
> +  X86_64_VEX_0F38E1,
> +  X86_64_VEX_0F38E2,
> +  X86_64_VEX_0F38E3,
> +  X86_64_VEX_0F38E4,
> +  X86_64_VEX_0F38E5,
> +  X86_64_VEX_0F38E6,
> +  X86_64_VEX_0F38E7,
> +  X86_64_VEX_0F38E8,
> +  X86_64_VEX_0F38E9,
> +  X86_64_VEX_0F38EA,
> +  X86_64_VEX_0F38EB,
> +  X86_64_VEX_0F38EC,
> +  X86_64_VEX_0F38ED,
> +  X86_64_VEX_0F38EE,
> +  X86_64_VEX_0F38EF,
>  };
>
>  enum
> @@ -4374,6 +4391,102 @@ static const struct dis386 x86_64_table[][2] = {
>      { Bad_Opcode },
>      { PREFIX_TABLE (PREFIX_VEX_0F385E_X86_64) },
>    },
> +
> +  /* X86_64_VEX_0F38E0 */
> +  {
> +    { Bad_Opcode },
> +    { "cmpoxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> +  },
> +
> +  /* X86_64_VEX_0F38E1 */
> +  {
> +    { Bad_Opcode },
> +    { "cmpnoxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> +  },
> +
> +  /* X86_64_VEX_0F38E2 */
> +  {
> +    { Bad_Opcode },
> +    { "cmpbxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> +  },
> +
> +  /* X86_64_VEX_0F38E3 */
> +  {
> +    { Bad_Opcode },
> +    { "cmpnbxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> +  },
> +
> +  /* X86_64_VEX_0F38E4 */
> +  {
> +    { Bad_Opcode },
> +    { "cmpzxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> +  },
> +
> +  /* X86_64_VEX_0F38E5 */
> +  {
> +    { Bad_Opcode },
> +    { "cmpnzxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> +  },
> +
> +  /* X86_64_VEX_0F38E6 */
> +  {
> +    { Bad_Opcode },
> +    { "cmpbexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> +  },
> +
> +  /* X86_64_VEX_0F38E7 */
> +  {
> +    { Bad_Opcode },
> +    { "cmpnbexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> +  },
> +
> +  /* X86_64_VEX_0F38E8 */
> +  {
> +    { Bad_Opcode },
> +    { "cmpsxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> +  },
> +
> +  /* X86_64_VEX_0F38E9 */
> +  {
> +    { Bad_Opcode },
> +    { "cmpnsxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> +  },
> +
> +  /* X86_64_VEX_0F38EA */
> +  {
> +    { Bad_Opcode },
> +    { "cmppxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> +  },
> +
> +  /* X86_64_VEX_0F38EB */
> +  {
> +    { Bad_Opcode },
> +    { "cmpnpxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> +  },
> +
> +  /* X86_64_VEX_0F38EC */
> +  {
> +    { Bad_Opcode },
> +    { "cmplxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> +  },
> +
> +  /* X86_64_VEX_0F38ED */
> +  {
> +    { Bad_Opcode },
> +    { "cmpnlxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> +  },
> +
> +  /* X86_64_VEX_0F38EE */
> +  {
> +    { Bad_Opcode },
> +    { "cmplexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> +  },
> +
> +  /* X86_64_VEX_0F38EF */
> +  {
> +    { Bad_Opcode },
> +    { "cmpnlexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
> +  },
>  };
>
>  static const struct dis386 three_byte_table[][256] = {
> @@ -6385,23 +6498,23 @@ static const struct dis386 vex_table[][256] = {
>      { "vaesdec",       { XM, Vex, EXx }, PREFIX_DATA },
>      { "vaesdeclast",   { XM, Vex, EXx }, PREFIX_DATA },
>      /* e0 */
> -    { Bad_Opcode },
> -    { Bad_Opcode },
> -    { Bad_Opcode },
> -    { Bad_Opcode },
> -    { Bad_Opcode },
> -    { Bad_Opcode },
> -    { Bad_Opcode },
> -    { Bad_Opcode },
> +    { X86_64_TABLE (X86_64_VEX_0F38E0) },
> +    { X86_64_TABLE (X86_64_VEX_0F38E1) },
> +    { X86_64_TABLE (X86_64_VEX_0F38E2) },
> +    { X86_64_TABLE (X86_64_VEX_0F38E3) },
> +    { X86_64_TABLE (X86_64_VEX_0F38E4) },
> +    { X86_64_TABLE (X86_64_VEX_0F38E5) },
> +    { X86_64_TABLE (X86_64_VEX_0F38E6) },
> +    { X86_64_TABLE (X86_64_VEX_0F38E7) },
>      /* e8 */
> -    { Bad_Opcode },
> -    { Bad_Opcode },
> -    { Bad_Opcode },
> -    { Bad_Opcode },
> -    { Bad_Opcode },
> -    { Bad_Opcode },
> -    { Bad_Opcode },
> -    { Bad_Opcode },
> +    { X86_64_TABLE (X86_64_VEX_0F38E8) },
> +    { X86_64_TABLE (X86_64_VEX_0F38E9) },
> +    { X86_64_TABLE (X86_64_VEX_0F38EA) },
> +    { X86_64_TABLE (X86_64_VEX_0F38EB) },
> +    { X86_64_TABLE (X86_64_VEX_0F38EC) },
> +    { X86_64_TABLE (X86_64_VEX_0F38ED) },
> +    { X86_64_TABLE (X86_64_VEX_0F38EE) },
> +    { X86_64_TABLE (X86_64_VEX_0F38EF) },
>      /* f0 */
>      { Bad_Opcode },
>      { Bad_Opcode },
> diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
> index 21986220d6..55ed659d3d 100644
> --- a/opcodes/i386-gen.c
> +++ b/opcodes/i386-gen.c
> @@ -251,6 +251,8 @@ static initializer cpu_flag_init[] =
>      "CPU_AVX2_FLAGS|CpuAVX_IFMA" },
>    { "CPU_AVX_VNNI_INT8_FLAGS",
>      "CPU_AVX2_FLAGS|CpuAVX_VNNI_INT8" },
> +  { "CPU_CMPCCXADD_FLAGS",
> +    "CpuCMPCCXADD" },
>    { "CPU_IAMCU_FLAGS",
>      "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuIAMCU" },
>    { "CPU_ADX_FLAGS",
> @@ -453,6 +455,8 @@ static initializer cpu_flag_init[] =
>      "CpuAVX_IFMA" },
>    { "CPU_ANY_AVX_VNNI_INT8_FLAGS",
>      "CpuAVX_VNNI_INT8" },
> +  { "CPU_ANY_CMPCCXADD_FLAGS",
> +    "CpuCMPCCXADD" },
>  };
>
>  static initializer operand_type_init[] =
> @@ -657,6 +661,7 @@ static bitfield cpu_flags[] =
>    BITFIELD (CpuPREFETCHI),
>    BITFIELD (CpuAVX_IFMA),
>    BITFIELD (CpuAVX_VNNI_INT8),
> +  BITFIELD (CpuCMPCCXADD),
>    BITFIELD (CpuMWAITX),
>    BITFIELD (CpuCLZERO),
>    BITFIELD (CpuOSPKE),
> diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
> index 905908749b..3b9572e2af 100644
> --- a/opcodes/i386-opc.h
> +++ b/opcodes/i386-opc.h
> @@ -215,6 +215,8 @@ enum
>    CpuAVX_IFMA,
>    /* Intel AVX VNNI-INT8 Instructions support required.  */
>    CpuAVX_VNNI_INT8,
> +  /* Intel CMPccXADD instructions support required.  */
> +  CpuCMPCCXADD,
>    /* mwaitx instruction required */
>    CpuMWAITX,
>    /* Clzero instruction required */
> @@ -298,7 +300,7 @@ enum
>
>  /* If you get a compiler error for zero width of the unused field,
>     comment it out.  */
> -// #define CpuUnused   (CpuMax + 1)
> +#define CpuUnused      (CpuMax + 1)
>
>  /* We can check if an instruction is available with array instead
>     of bitfield. */
> @@ -399,6 +401,7 @@ typedef union i386_cpu_flags
>        unsigned int cpuprefetchi:1;
>        unsigned int cpuavx_ifma:1;
>        unsigned int cpuavx_vnni_int8:1;
> +      unsigned int cpucmpccxadd:1;
>        unsigned int cpumwaitx:1;
>        unsigned int cpuclzero:1;
>        unsigned int cpuospke:1;
> diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
> index 77a5787c4b..5fe9cb053f 100644
> --- a/opcodes/i386-opc.tbl
> +++ b/opcodes/i386-opc.tbl
> @@ -3289,3 +3289,9 @@ prefetchit0, 0xf18, 0x7, CpuPREFETCHI|Cpu64, Modrm|Anysize|IgnoreSize|No_bSuf|No
>  prefetchit1, 0xf18, 0x6, CpuPREFETCHI|Cpu64, Modrm|Anysize|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { BaseIndex }
>
>  // PREFETCHI instructions end.
> +
> +// CMPCCXADD instructions.
> +
> +cmp<cc>xadd, 0x66e<cc:opc>, None, CpuCMPCCXADD|Cpu64, Modrm|Vex|Space0F38|VexVVVV|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32|Reg64, Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
> +
> +// CMPCCXADD instructions end.
> --
> 2.18.1
>

OK.

Thanks.
  
Jan Beulich Nov. 2, 2022, 10:52 a.m. UTC | #2
On 31.10.2022 04:05, Haochen Jiang wrote:
> --- a/gas/config/tc-i386.c
> +++ b/gas/config/tc-i386.c
> @@ -1098,6 +1098,7 @@ static const arch_entry cpu_arch[] =
>    SUBARCH (prefetchi, PREFETCHI, ANY_PREFETCHI, false),
>    SUBARCH (avx_ifma, AVX_IFMA, ANY_AVX_IFMA, false),
>    SUBARCH (avx_vnni_int8, AVX_VNNI_INT8, ANY_AVX_VNNI_INT8, false),
> +  SUBARCH (cmpccxadd, CMPCCXADD, ANY_CMPCCXADD, false),

ANY_CMPCCXADD shouldn't have been re-introduced here. It now being
there only means more code churn in my patch to sanitize all of this
dependencies handling. (Unless, as I'll mention there as an option,
we want to uniformly use ANY_... in [almost] all table entries).

> --- a/opcodes/i386-opc.h
> +++ b/opcodes/i386-opc.h
> @@ -215,6 +215,8 @@ enum
>    CpuAVX_IFMA,
>    /* Intel AVX VNNI-INT8 Instructions support required.  */
>    CpuAVX_VNNI_INT8,
> +  /* Intel CMPccXADD instructions support required.  */
> +  CpuCMPCCXADD,

Just as a remark: Personally I would have considered it more readable
overall if this had the "CC" infix in lower case (like in the comment).

Jan
  
H.J. Lu Nov. 2, 2022, 4:25 p.m. UTC | #3
On Wed, Nov 2, 2022 at 3:52 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> On 31.10.2022 04:05, Haochen Jiang wrote:
> > --- a/gas/config/tc-i386.c
> > +++ b/gas/config/tc-i386.c
> > @@ -1098,6 +1098,7 @@ static const arch_entry cpu_arch[] =
> >    SUBARCH (prefetchi, PREFETCHI, ANY_PREFETCHI, false),
> >    SUBARCH (avx_ifma, AVX_IFMA, ANY_AVX_IFMA, false),
> >    SUBARCH (avx_vnni_int8, AVX_VNNI_INT8, ANY_AVX_VNNI_INT8, false),
> > +  SUBARCH (cmpccxadd, CMPCCXADD, ANY_CMPCCXADD, false),
>
> ANY_CMPCCXADD shouldn't have been re-introduced here. It now being
> there only means more code churn in my patch to sanitize all of this
> dependencies handling. (Unless, as I'll mention there as an option,
> we want to uniformly use ANY_... in [almost] all table entries).

We discussed it.  ANY_ doesn't hurt and it can be useful when there is
a dependency in the future.

> > --- a/opcodes/i386-opc.h
> > +++ b/opcodes/i386-opc.h
> > @@ -215,6 +215,8 @@ enum
> >    CpuAVX_IFMA,
> >    /* Intel AVX VNNI-INT8 Instructions support required.  */
> >    CpuAVX_VNNI_INT8,
> > +  /* Intel CMPccXADD instructions support required.  */
> > +  CpuCMPCCXADD,
>
> Just as a remark: Personally I would have considered it more readable
> overall if this had the "CC" infix in lower case (like in the comment).
>
> Jan
  

Patch

diff --git a/gas/NEWS b/gas/NEWS
index 1547bfd469..7cdd429f0b 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,7 @@ 
 -*- text -*-
 
+* Add support for Intel CMPccXADD instructions.
+
 * Add support for Intel AVX-VNNI-INT8 instructions.
 
 * Add support for Intel AVX-IFMA instructions.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 26d8efb47e..9c0f86ac3d 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1098,6 +1098,7 @@  static const arch_entry cpu_arch[] =
   SUBARCH (prefetchi, PREFETCHI, ANY_PREFETCHI, false),
   SUBARCH (avx_ifma, AVX_IFMA, ANY_AVX_IFMA, false),
   SUBARCH (avx_vnni_int8, AVX_VNNI_INT8, ANY_AVX_VNNI_INT8, false),
+  SUBARCH (cmpccxadd, CMPCCXADD, ANY_CMPCCXADD, false),
 };
 
 #undef SUBARCH
@@ -8547,7 +8548,7 @@  build_modrm_byte (void)
 		 source operand is encoded in VEX prefix. */
 	      gas_assert (mem != (unsigned int) ~0);
 
-	      if (op > mem)
+	      if (op > mem || i.tm.cpu_flags.bitfield.cpucmpccxadd)
 		{
 		  vex_reg = op++;
 		  gas_assert (op < i.operands);
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 029f5f2e04..f98b9fbd9f 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -197,6 +197,7 @@  accept various extension mnemonics.  For example,
 @code{prefetchi},
 @code{avx_ifma},
 @code{avx_vnni_int8},
+@code{cmpccxadd},
 @code{amx_int8},
 @code{amx_bf16},
 @code{amx_fp16},
@@ -1491,6 +1492,7 @@  supported on the CPU specified.  The choices for @var{cpu_type} are:
 @item @samp{.tdx} @tab @samp{.avx_vnni}  @tab @samp{.avx512_fp16}
 @item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @samp{.ibt}
 @item @samp{.prefetchi} @tab @samp{.avx_ifma} @tab @samp{.avx_vnni_int8}
+@item @samp{.cmpccxadd}
 @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
 @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
 @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk}
diff --git a/gas/testsuite/gas/i386/cmpccxadd-inval.l b/gas/testsuite/gas/i386/cmpccxadd-inval.l
new file mode 100644
index 0000000000..32538867aa
--- /dev/null
+++ b/gas/testsuite/gas/i386/cmpccxadd-inval.l
@@ -0,0 +1,5 @@ 
+.* Assembler messages:
+.*:6: Error: `cmpbexadd' is only supported in 64-bit mode
+.*:7: Error: `cmpbxadd' is only supported in 64-bit mode
+.*:8: Error: `cmplexadd' is only supported in 64-bit mode
+.*:9: Error: `cmplxadd' is only supported in 64-bit mode
diff --git a/gas/testsuite/gas/i386/cmpccxadd-inval.s b/gas/testsuite/gas/i386/cmpccxadd-inval.s
new file mode 100644
index 0000000000..a349628863
--- /dev/null
+++ b/gas/testsuite/gas/i386/cmpccxadd-inval.s
@@ -0,0 +1,9 @@ 
+# Check Illegal CMPccXADD instructions
+
+	.allow_index_reg
+	.text
+_start:
+	cmpbexadd	%eax, %eax, 0x10000000(%esp, %esi, 8)
+	cmpbxadd	%ebx, %ebx, (%ecx)
+	cmplexadd	%eax, %eax, 508(%ecx)
+	cmplxadd	%ebx, %ebx, -512(%edx)
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index b75fe85cb3..e9785e64fd 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -479,6 +479,7 @@  if [gas_32_check] then {
     run_list_test "avx-ifma-inval"
     run_dump_test "avx-vnni-int8"
     run_dump_test "avx-vnni-int8-intel"
+    run_list_test "cmpccxadd-inval"
     run_list_test "sg"
     run_dump_test "clzero"
     run_dump_test "invlpgb"
@@ -1152,6 +1153,8 @@  if [gas_64_check] then {
     run_list_test "x86-64-avx-ifma-inval"
     run_dump_test "x86-64-avx-vnni-int8"
     run_dump_test "x86-64-avx-vnni-int8-intel"
+    run_dump_test "x86-64-cmpccxadd"
+    run_dump_test "x86-64-cmpccxadd-intel"
     run_dump_test "x86-64-clzero"
     run_dump_test "x86-64-mwaitx-bdver4"
     run_list_test "x86-64-mwaitx-reg"
diff --git a/gas/testsuite/gas/i386/x86-64-cmpccxadd-intel.d b/gas/testsuite/gas/i386/x86-64-cmpccxadd-intel.d
new file mode 100644
index 0000000000..0b906330b7
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-cmpccxadd-intel.d
@@ -0,0 +1,266 @@ 
+#as:
+#objdump: -dw -Mintel
+#name: x86_64 CMPCCXADD insns (Intel disassembly)
+#source: x86-64-cmpccxadd.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*c4 a2 79 e6 8c f5 00 00 00 10\s+cmpbexadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e6 09\s+cmpbexadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e6 89 fc 01 00 00\s+cmpbexadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e6 8a 00 fe ff ff\s+cmpbexadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e6 8c f5 00 00 00 10\s+cmpbexadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e6 09\s+cmpbexadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e6 89 f8 03 00 00\s+cmpbexadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e6 8a 00 fc ff ff\s+cmpbexadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 e2 8c f5 00 00 00 10\s+cmpbxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e2 09\s+cmpbxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e2 89 fc 01 00 00\s+cmpbxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e2 8a 00 fe ff ff\s+cmpbxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e2 8c f5 00 00 00 10\s+cmpbxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e2 09\s+cmpbxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e2 89 f8 03 00 00\s+cmpbxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e2 8a 00 fc ff ff\s+cmpbxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 ee 8c f5 00 00 00 10\s+cmplexadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 ee 09\s+cmplexadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 ee 89 fc 01 00 00\s+cmplexadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 ee 8a 00 fe ff ff\s+cmplexadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 ee 8c f5 00 00 00 10\s+cmplexadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 ee 09\s+cmplexadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 ee 89 f8 03 00 00\s+cmplexadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 ee 8a 00 fc ff ff\s+cmplexadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 ec 8c f5 00 00 00 10\s+cmplxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 ec 09\s+cmplxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 ec 89 fc 01 00 00\s+cmplxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 ec 8a 00 fe ff ff\s+cmplxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 ec 8c f5 00 00 00 10\s+cmplxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 ec 09\s+cmplxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 ec 89 f8 03 00 00\s+cmplxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 ec 8a 00 fc ff ff\s+cmplxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 e7 8c f5 00 00 00 10\s+cmpnbexadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e7 09\s+cmpnbexadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e7 89 fc 01 00 00\s+cmpnbexadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e7 8a 00 fe ff ff\s+cmpnbexadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e7 8c f5 00 00 00 10\s+cmpnbexadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e7 09\s+cmpnbexadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e7 89 f8 03 00 00\s+cmpnbexadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e7 8a 00 fc ff ff\s+cmpnbexadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 e3 8c f5 00 00 00 10\s+cmpnbxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e3 09\s+cmpnbxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e3 89 fc 01 00 00\s+cmpnbxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e3 8a 00 fe ff ff\s+cmpnbxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e3 8c f5 00 00 00 10\s+cmpnbxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e3 09\s+cmpnbxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e3 89 f8 03 00 00\s+cmpnbxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e3 8a 00 fc ff ff\s+cmpnbxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 ef 8c f5 00 00 00 10\s+cmpnlexadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 ef 09\s+cmpnlexadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 ef 89 fc 01 00 00\s+cmpnlexadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 ef 8a 00 fe ff ff\s+cmpnlexadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 ef 8c f5 00 00 00 10\s+cmpnlexadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 ef 09\s+cmpnlexadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 ef 89 f8 03 00 00\s+cmpnlexadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 ef 8a 00 fc ff ff\s+cmpnlexadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 ed 8c f5 00 00 00 10\s+cmpnlxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 ed 09\s+cmpnlxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 ed 89 fc 01 00 00\s+cmpnlxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 ed 8a 00 fe ff ff\s+cmpnlxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 ed 8c f5 00 00 00 10\s+cmpnlxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 ed 09\s+cmpnlxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 ed 89 f8 03 00 00\s+cmpnlxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 ed 8a 00 fc ff ff\s+cmpnlxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 e1 8c f5 00 00 00 10\s+cmpnoxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e1 09\s+cmpnoxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e1 89 fc 01 00 00\s+cmpnoxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e1 8a 00 fe ff ff\s+cmpnoxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e1 8c f5 00 00 00 10\s+cmpnoxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e1 09\s+cmpnoxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e1 89 f8 03 00 00\s+cmpnoxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e1 8a 00 fc ff ff\s+cmpnoxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 eb 8c f5 00 00 00 10\s+cmpnpxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 eb 09\s+cmpnpxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 eb 89 fc 01 00 00\s+cmpnpxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 eb 8a 00 fe ff ff\s+cmpnpxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 eb 8c f5 00 00 00 10\s+cmpnpxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 eb 09\s+cmpnpxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 eb 89 f8 03 00 00\s+cmpnpxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 eb 8a 00 fc ff ff\s+cmpnpxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 e9 8c f5 00 00 00 10\s+cmpnsxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e9 09\s+cmpnsxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e9 89 fc 01 00 00\s+cmpnsxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e9 8a 00 fe ff ff\s+cmpnsxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e9 8c f5 00 00 00 10\s+cmpnsxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e9 09\s+cmpnsxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e9 89 f8 03 00 00\s+cmpnsxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e9 8a 00 fc ff ff\s+cmpnsxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 e5 8c f5 00 00 00 10\s+cmpnzxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e5 09\s+cmpnzxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e5 89 fc 01 00 00\s+cmpnzxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e5 8a 00 fe ff ff\s+cmpnzxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e5 8c f5 00 00 00 10\s+cmpnzxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e5 09\s+cmpnzxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e5 89 f8 03 00 00\s+cmpnzxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e5 8a 00 fc ff ff\s+cmpnzxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 e0 8c f5 00 00 00 10\s+cmpoxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e0 09\s+cmpoxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e0 89 fc 01 00 00\s+cmpoxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e0 8a 00 fe ff ff\s+cmpoxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e0 8c f5 00 00 00 10\s+cmpoxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e0 09\s+cmpoxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e0 89 f8 03 00 00\s+cmpoxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e0 8a 00 fc ff ff\s+cmpoxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 ea 8c f5 00 00 00 10\s+cmppxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 ea 09\s+cmppxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 ea 89 fc 01 00 00\s+cmppxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 ea 8a 00 fe ff ff\s+cmppxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 ea 8c f5 00 00 00 10\s+cmppxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 ea 09\s+cmppxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 ea 89 f8 03 00 00\s+cmppxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 ea 8a 00 fc ff ff\s+cmppxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 e8 8c f5 00 00 00 10\s+cmpsxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e8 09\s+cmpsxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e8 89 fc 01 00 00\s+cmpsxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e8 8a 00 fe ff ff\s+cmpsxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e8 8c f5 00 00 00 10\s+cmpsxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e8 09\s+cmpsxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e8 89 f8 03 00 00\s+cmpsxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e8 8a 00 fc ff ff\s+cmpsxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 e4 8c f5 00 00 00 10\s+cmpzxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e4 09\s+cmpzxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e4 89 fc 01 00 00\s+cmpzxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e4 8a 00 fe ff ff\s+cmpzxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e4 8c f5 00 00 00 10\s+cmpzxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e4 09\s+cmpzxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e4 89 f8 03 00 00\s+cmpzxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e4 8a 00 fc ff ff\s+cmpzxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 e6 8c f5 00 00 00 10\s+cmpbexadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e6 09\s+cmpbexadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e6 89 fc 01 00 00\s+cmpbexadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e6 8a 00 fe ff ff\s+cmpbexadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e6 8c f5 00 00 00 10\s+cmpbexadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e6 09\s+cmpbexadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e6 89 f8 03 00 00\s+cmpbexadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e6 8a 00 fc ff ff\s+cmpbexadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 e2 8c f5 00 00 00 10\s+cmpbxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e2 09\s+cmpbxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e2 89 fc 01 00 00\s+cmpbxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e2 8a 00 fe ff ff\s+cmpbxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e2 8c f5 00 00 00 10\s+cmpbxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e2 09\s+cmpbxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e2 89 f8 03 00 00\s+cmpbxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e2 8a 00 fc ff ff\s+cmpbxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 ee 8c f5 00 00 00 10\s+cmplexadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 ee 09\s+cmplexadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 ee 89 fc 01 00 00\s+cmplexadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 ee 8a 00 fe ff ff\s+cmplexadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 ee 8c f5 00 00 00 10\s+cmplexadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 ee 09\s+cmplexadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 ee 89 f8 03 00 00\s+cmplexadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 ee 8a 00 fc ff ff\s+cmplexadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 ec 8c f5 00 00 00 10\s+cmplxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 ec 09\s+cmplxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 ec 89 fc 01 00 00\s+cmplxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 ec 8a 00 fe ff ff\s+cmplxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 ec 8c f5 00 00 00 10\s+cmplxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 ec 09\s+cmplxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 ec 89 f8 03 00 00\s+cmplxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 ec 8a 00 fc ff ff\s+cmplxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 e7 8c f5 00 00 00 10\s+cmpnbexadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e7 09\s+cmpnbexadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e7 89 fc 01 00 00\s+cmpnbexadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e7 8a 00 fe ff ff\s+cmpnbexadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e7 8c f5 00 00 00 10\s+cmpnbexadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e7 09\s+cmpnbexadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e7 89 f8 03 00 00\s+cmpnbexadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e7 8a 00 fc ff ff\s+cmpnbexadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 e3 8c f5 00 00 00 10\s+cmpnbxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e3 09\s+cmpnbxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e3 89 fc 01 00 00\s+cmpnbxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e3 8a 00 fe ff ff\s+cmpnbxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e3 8c f5 00 00 00 10\s+cmpnbxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e3 09\s+cmpnbxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e3 89 f8 03 00 00\s+cmpnbxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e3 8a 00 fc ff ff\s+cmpnbxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 ef 8c f5 00 00 00 10\s+cmpnlexadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 ef 09\s+cmpnlexadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 ef 89 fc 01 00 00\s+cmpnlexadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 ef 8a 00 fe ff ff\s+cmpnlexadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 ef 8c f5 00 00 00 10\s+cmpnlexadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 ef 09\s+cmpnlexadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 ef 89 f8 03 00 00\s+cmpnlexadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 ef 8a 00 fc ff ff\s+cmpnlexadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 ed 8c f5 00 00 00 10\s+cmpnlxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 ed 09\s+cmpnlxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 ed 89 fc 01 00 00\s+cmpnlxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 ed 8a 00 fe ff ff\s+cmpnlxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 ed 8c f5 00 00 00 10\s+cmpnlxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 ed 09\s+cmpnlxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 ed 89 f8 03 00 00\s+cmpnlxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 ed 8a 00 fc ff ff\s+cmpnlxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 e1 8c f5 00 00 00 10\s+cmpnoxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e1 09\s+cmpnoxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e1 89 fc 01 00 00\s+cmpnoxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e1 8a 00 fe ff ff\s+cmpnoxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e1 8c f5 00 00 00 10\s+cmpnoxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e1 09\s+cmpnoxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e1 89 f8 03 00 00\s+cmpnoxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e1 8a 00 fc ff ff\s+cmpnoxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 eb 8c f5 00 00 00 10\s+cmpnpxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 eb 09\s+cmpnpxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 eb 89 fc 01 00 00\s+cmpnpxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 eb 8a 00 fe ff ff\s+cmpnpxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 eb 8c f5 00 00 00 10\s+cmpnpxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 eb 09\s+cmpnpxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 eb 89 f8 03 00 00\s+cmpnpxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 eb 8a 00 fc ff ff\s+cmpnpxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 e9 8c f5 00 00 00 10\s+cmpnsxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e9 09\s+cmpnsxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e9 89 fc 01 00 00\s+cmpnsxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e9 8a 00 fe ff ff\s+cmpnsxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e9 8c f5 00 00 00 10\s+cmpnsxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e9 09\s+cmpnsxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e9 89 f8 03 00 00\s+cmpnsxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e9 8a 00 fc ff ff\s+cmpnsxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 e5 8c f5 00 00 00 10\s+cmpnzxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e5 09\s+cmpnzxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e5 89 fc 01 00 00\s+cmpnzxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e5 8a 00 fe ff ff\s+cmpnzxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e5 8c f5 00 00 00 10\s+cmpnzxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e5 09\s+cmpnzxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e5 89 f8 03 00 00\s+cmpnzxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e5 8a 00 fc ff ff\s+cmpnzxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 e0 8c f5 00 00 00 10\s+cmpoxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e0 09\s+cmpoxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e0 89 fc 01 00 00\s+cmpoxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e0 8a 00 fe ff ff\s+cmpoxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e0 8c f5 00 00 00 10\s+cmpoxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e0 09\s+cmpoxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e0 89 f8 03 00 00\s+cmpoxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e0 8a 00 fc ff ff\s+cmpoxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 ea 8c f5 00 00 00 10\s+cmppxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 ea 09\s+cmppxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 ea 89 fc 01 00 00\s+cmppxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 ea 8a 00 fe ff ff\s+cmppxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 ea 8c f5 00 00 00 10\s+cmppxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 ea 09\s+cmppxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 ea 89 f8 03 00 00\s+cmppxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 ea 8a 00 fc ff ff\s+cmppxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 e8 8c f5 00 00 00 10\s+cmpsxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e8 09\s+cmpsxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e8 89 fc 01 00 00\s+cmpsxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e8 8a 00 fe ff ff\s+cmpsxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e8 8c f5 00 00 00 10\s+cmpsxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e8 09\s+cmpsxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e8 89 f8 03 00 00\s+cmpsxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e8 8a 00 fc ff ff\s+cmpsxadd QWORD PTR \[rdx-0x400\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 a2 79 e4 8c f5 00 00 00 10\s+cmpzxadd DWORD PTR \[rbp\+r14\*8\+0x10000000\],ecx,eax
+\s*[a-f0-9]+:\s*c4 c2 61 e4 09\s+cmpzxadd DWORD PTR \[r9\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 e2 79 e4 89 fc 01 00 00\s+cmpzxadd DWORD PTR \[rcx\+0x1fc\],ecx,eax
+\s*[a-f0-9]+:\s*c4 e2 61 e4 8a 00 fe ff ff\s+cmpzxadd DWORD PTR \[rdx-0x200\],ecx,ebx
+\s*[a-f0-9]+:\s*c4 a2 f9 e4 8c f5 00 00 00 10\s+cmpzxadd QWORD PTR \[rbp\+r14\*8\+0x10000000\],rcx,rax
+\s*[a-f0-9]+:\s*c4 c2 e1 e4 09\s+cmpzxadd QWORD PTR \[r9\],rcx,rbx
+\s*[a-f0-9]+:\s*c4 e2 f9 e4 89 f8 03 00 00\s+cmpzxadd QWORD PTR \[rcx\+0x3f8\],rcx,rax
+\s*[a-f0-9]+:\s*c4 e2 e1 e4 8a 00 fc ff ff\s+cmpzxadd QWORD PTR \[rdx-0x400\],rcx,rbx
diff --git a/gas/testsuite/gas/i386/x86-64-cmpccxadd.d b/gas/testsuite/gas/i386/x86-64-cmpccxadd.d
new file mode 100644
index 0000000000..b24af38d1c
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-cmpccxadd.d
@@ -0,0 +1,266 @@ 
+#as:
+#objdump: -dw
+#name: x86_64 CMPCCXADD insns
+#source: x86-64-cmpccxadd.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*c4 a2 79 e6 8c f5 00 00 00 10\s+cmpbexadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e6 09\s+cmpbexadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e6 89 fc 01 00 00\s+cmpbexadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e6 8a 00 fe ff ff\s+cmpbexadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e6 8c f5 00 00 00 10\s+cmpbexadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e6 09\s+cmpbexadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e6 89 f8 03 00 00\s+cmpbexadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e6 8a 00 fc ff ff\s+cmpbexadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 e2 8c f5 00 00 00 10\s+cmpbxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e2 09\s+cmpbxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e2 89 fc 01 00 00\s+cmpbxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e2 8a 00 fe ff ff\s+cmpbxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e2 8c f5 00 00 00 10\s+cmpbxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e2 09\s+cmpbxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e2 89 f8 03 00 00\s+cmpbxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e2 8a 00 fc ff ff\s+cmpbxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 ee 8c f5 00 00 00 10\s+cmplexadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 ee 09\s+cmplexadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 ee 89 fc 01 00 00\s+cmplexadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 ee 8a 00 fe ff ff\s+cmplexadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 ee 8c f5 00 00 00 10\s+cmplexadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 ee 09\s+cmplexadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 ee 89 f8 03 00 00\s+cmplexadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 ee 8a 00 fc ff ff\s+cmplexadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 ec 8c f5 00 00 00 10\s+cmplxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 ec 09\s+cmplxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 ec 89 fc 01 00 00\s+cmplxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 ec 8a 00 fe ff ff\s+cmplxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 ec 8c f5 00 00 00 10\s+cmplxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 ec 09\s+cmplxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 ec 89 f8 03 00 00\s+cmplxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 ec 8a 00 fc ff ff\s+cmplxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 e7 8c f5 00 00 00 10\s+cmpnbexadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e7 09\s+cmpnbexadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e7 89 fc 01 00 00\s+cmpnbexadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e7 8a 00 fe ff ff\s+cmpnbexadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e7 8c f5 00 00 00 10\s+cmpnbexadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e7 09\s+cmpnbexadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e7 89 f8 03 00 00\s+cmpnbexadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e7 8a 00 fc ff ff\s+cmpnbexadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 e3 8c f5 00 00 00 10\s+cmpnbxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e3 09\s+cmpnbxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e3 89 fc 01 00 00\s+cmpnbxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e3 8a 00 fe ff ff\s+cmpnbxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e3 8c f5 00 00 00 10\s+cmpnbxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e3 09\s+cmpnbxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e3 89 f8 03 00 00\s+cmpnbxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e3 8a 00 fc ff ff\s+cmpnbxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 ef 8c f5 00 00 00 10\s+cmpnlexadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 ef 09\s+cmpnlexadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 ef 89 fc 01 00 00\s+cmpnlexadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 ef 8a 00 fe ff ff\s+cmpnlexadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 ef 8c f5 00 00 00 10\s+cmpnlexadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 ef 09\s+cmpnlexadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 ef 89 f8 03 00 00\s+cmpnlexadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 ef 8a 00 fc ff ff\s+cmpnlexadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 ed 8c f5 00 00 00 10\s+cmpnlxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 ed 09\s+cmpnlxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 ed 89 fc 01 00 00\s+cmpnlxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 ed 8a 00 fe ff ff\s+cmpnlxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 ed 8c f5 00 00 00 10\s+cmpnlxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 ed 09\s+cmpnlxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 ed 89 f8 03 00 00\s+cmpnlxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 ed 8a 00 fc ff ff\s+cmpnlxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 e1 8c f5 00 00 00 10\s+cmpnoxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e1 09\s+cmpnoxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e1 89 fc 01 00 00\s+cmpnoxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e1 8a 00 fe ff ff\s+cmpnoxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e1 8c f5 00 00 00 10\s+cmpnoxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e1 09\s+cmpnoxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e1 89 f8 03 00 00\s+cmpnoxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e1 8a 00 fc ff ff\s+cmpnoxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 eb 8c f5 00 00 00 10\s+cmpnpxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 eb 09\s+cmpnpxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 eb 89 fc 01 00 00\s+cmpnpxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 eb 8a 00 fe ff ff\s+cmpnpxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 eb 8c f5 00 00 00 10\s+cmpnpxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 eb 09\s+cmpnpxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 eb 89 f8 03 00 00\s+cmpnpxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 eb 8a 00 fc ff ff\s+cmpnpxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 e9 8c f5 00 00 00 10\s+cmpnsxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e9 09\s+cmpnsxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e9 89 fc 01 00 00\s+cmpnsxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e9 8a 00 fe ff ff\s+cmpnsxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e9 8c f5 00 00 00 10\s+cmpnsxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e9 09\s+cmpnsxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e9 89 f8 03 00 00\s+cmpnsxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e9 8a 00 fc ff ff\s+cmpnsxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 e5 8c f5 00 00 00 10\s+cmpnzxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e5 09\s+cmpnzxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e5 89 fc 01 00 00\s+cmpnzxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e5 8a 00 fe ff ff\s+cmpnzxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e5 8c f5 00 00 00 10\s+cmpnzxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e5 09\s+cmpnzxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e5 89 f8 03 00 00\s+cmpnzxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e5 8a 00 fc ff ff\s+cmpnzxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 e0 8c f5 00 00 00 10\s+cmpoxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e0 09\s+cmpoxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e0 89 fc 01 00 00\s+cmpoxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e0 8a 00 fe ff ff\s+cmpoxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e0 8c f5 00 00 00 10\s+cmpoxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e0 09\s+cmpoxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e0 89 f8 03 00 00\s+cmpoxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e0 8a 00 fc ff ff\s+cmpoxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 ea 8c f5 00 00 00 10\s+cmppxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 ea 09\s+cmppxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 ea 89 fc 01 00 00\s+cmppxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 ea 8a 00 fe ff ff\s+cmppxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 ea 8c f5 00 00 00 10\s+cmppxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 ea 09\s+cmppxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 ea 89 f8 03 00 00\s+cmppxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 ea 8a 00 fc ff ff\s+cmppxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 e8 8c f5 00 00 00 10\s+cmpsxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e8 09\s+cmpsxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e8 89 fc 01 00 00\s+cmpsxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e8 8a 00 fe ff ff\s+cmpsxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e8 8c f5 00 00 00 10\s+cmpsxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e8 09\s+cmpsxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e8 89 f8 03 00 00\s+cmpsxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e8 8a 00 fc ff ff\s+cmpsxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 e4 8c f5 00 00 00 10\s+cmpzxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e4 09\s+cmpzxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e4 89 fc 01 00 00\s+cmpzxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e4 8a 00 fe ff ff\s+cmpzxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e4 8c f5 00 00 00 10\s+cmpzxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e4 09\s+cmpzxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e4 89 f8 03 00 00\s+cmpzxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e4 8a 00 fc ff ff\s+cmpzxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 e6 8c f5 00 00 00 10\s+cmpbexadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e6 09\s+cmpbexadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e6 89 fc 01 00 00\s+cmpbexadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e6 8a 00 fe ff ff\s+cmpbexadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e6 8c f5 00 00 00 10\s+cmpbexadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e6 09\s+cmpbexadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e6 89 f8 03 00 00\s+cmpbexadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e6 8a 00 fc ff ff\s+cmpbexadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 e2 8c f5 00 00 00 10\s+cmpbxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e2 09\s+cmpbxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e2 89 fc 01 00 00\s+cmpbxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e2 8a 00 fe ff ff\s+cmpbxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e2 8c f5 00 00 00 10\s+cmpbxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e2 09\s+cmpbxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e2 89 f8 03 00 00\s+cmpbxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e2 8a 00 fc ff ff\s+cmpbxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 ee 8c f5 00 00 00 10\s+cmplexadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 ee 09\s+cmplexadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 ee 89 fc 01 00 00\s+cmplexadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 ee 8a 00 fe ff ff\s+cmplexadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 ee 8c f5 00 00 00 10\s+cmplexadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 ee 09\s+cmplexadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 ee 89 f8 03 00 00\s+cmplexadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 ee 8a 00 fc ff ff\s+cmplexadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 ec 8c f5 00 00 00 10\s+cmplxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 ec 09\s+cmplxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 ec 89 fc 01 00 00\s+cmplxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 ec 8a 00 fe ff ff\s+cmplxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 ec 8c f5 00 00 00 10\s+cmplxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 ec 09\s+cmplxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 ec 89 f8 03 00 00\s+cmplxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 ec 8a 00 fc ff ff\s+cmplxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 e7 8c f5 00 00 00 10\s+cmpnbexadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e7 09\s+cmpnbexadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e7 89 fc 01 00 00\s+cmpnbexadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e7 8a 00 fe ff ff\s+cmpnbexadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e7 8c f5 00 00 00 10\s+cmpnbexadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e7 09\s+cmpnbexadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e7 89 f8 03 00 00\s+cmpnbexadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e7 8a 00 fc ff ff\s+cmpnbexadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 e3 8c f5 00 00 00 10\s+cmpnbxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e3 09\s+cmpnbxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e3 89 fc 01 00 00\s+cmpnbxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e3 8a 00 fe ff ff\s+cmpnbxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e3 8c f5 00 00 00 10\s+cmpnbxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e3 09\s+cmpnbxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e3 89 f8 03 00 00\s+cmpnbxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e3 8a 00 fc ff ff\s+cmpnbxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 ef 8c f5 00 00 00 10\s+cmpnlexadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 ef 09\s+cmpnlexadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 ef 89 fc 01 00 00\s+cmpnlexadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 ef 8a 00 fe ff ff\s+cmpnlexadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 ef 8c f5 00 00 00 10\s+cmpnlexadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 ef 09\s+cmpnlexadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 ef 89 f8 03 00 00\s+cmpnlexadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 ef 8a 00 fc ff ff\s+cmpnlexadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 ed 8c f5 00 00 00 10\s+cmpnlxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 ed 09\s+cmpnlxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 ed 89 fc 01 00 00\s+cmpnlxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 ed 8a 00 fe ff ff\s+cmpnlxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 ed 8c f5 00 00 00 10\s+cmpnlxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 ed 09\s+cmpnlxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 ed 89 f8 03 00 00\s+cmpnlxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 ed 8a 00 fc ff ff\s+cmpnlxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 e1 8c f5 00 00 00 10\s+cmpnoxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e1 09\s+cmpnoxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e1 89 fc 01 00 00\s+cmpnoxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e1 8a 00 fe ff ff\s+cmpnoxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e1 8c f5 00 00 00 10\s+cmpnoxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e1 09\s+cmpnoxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e1 89 f8 03 00 00\s+cmpnoxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e1 8a 00 fc ff ff\s+cmpnoxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 eb 8c f5 00 00 00 10\s+cmpnpxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 eb 09\s+cmpnpxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 eb 89 fc 01 00 00\s+cmpnpxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 eb 8a 00 fe ff ff\s+cmpnpxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 eb 8c f5 00 00 00 10\s+cmpnpxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 eb 09\s+cmpnpxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 eb 89 f8 03 00 00\s+cmpnpxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 eb 8a 00 fc ff ff\s+cmpnpxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 e9 8c f5 00 00 00 10\s+cmpnsxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e9 09\s+cmpnsxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e9 89 fc 01 00 00\s+cmpnsxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e9 8a 00 fe ff ff\s+cmpnsxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e9 8c f5 00 00 00 10\s+cmpnsxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e9 09\s+cmpnsxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e9 89 f8 03 00 00\s+cmpnsxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e9 8a 00 fc ff ff\s+cmpnsxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 e5 8c f5 00 00 00 10\s+cmpnzxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e5 09\s+cmpnzxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e5 89 fc 01 00 00\s+cmpnzxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e5 8a 00 fe ff ff\s+cmpnzxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e5 8c f5 00 00 00 10\s+cmpnzxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e5 09\s+cmpnzxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e5 89 f8 03 00 00\s+cmpnzxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e5 8a 00 fc ff ff\s+cmpnzxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 e0 8c f5 00 00 00 10\s+cmpoxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e0 09\s+cmpoxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e0 89 fc 01 00 00\s+cmpoxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e0 8a 00 fe ff ff\s+cmpoxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e0 8c f5 00 00 00 10\s+cmpoxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e0 09\s+cmpoxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e0 89 f8 03 00 00\s+cmpoxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e0 8a 00 fc ff ff\s+cmpoxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 ea 8c f5 00 00 00 10\s+cmppxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 ea 09\s+cmppxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 ea 89 fc 01 00 00\s+cmppxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 ea 8a 00 fe ff ff\s+cmppxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 ea 8c f5 00 00 00 10\s+cmppxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 ea 09\s+cmppxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 ea 89 f8 03 00 00\s+cmppxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 ea 8a 00 fc ff ff\s+cmppxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 e8 8c f5 00 00 00 10\s+cmpsxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e8 09\s+cmpsxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e8 89 fc 01 00 00\s+cmpsxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e8 8a 00 fe ff ff\s+cmpsxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e8 8c f5 00 00 00 10\s+cmpsxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e8 09\s+cmpsxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e8 89 f8 03 00 00\s+cmpsxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e8 8a 00 fc ff ff\s+cmpsxadd %rbx,%rcx,-0x400\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 79 e4 8c f5 00 00 00 10\s+cmpzxadd %eax,%ecx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 61 e4 09\s+cmpzxadd %ebx,%ecx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 79 e4 89 fc 01 00 00\s+cmpzxadd %eax,%ecx,0x1fc\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 61 e4 8a 00 fe ff ff\s+cmpzxadd %ebx,%ecx,-0x200\(%rdx\)
+\s*[a-f0-9]+:\s*c4 a2 f9 e4 8c f5 00 00 00 10\s+cmpzxadd %rax,%rcx,0x10000000\(%rbp,%r14,8\)
+\s*[a-f0-9]+:\s*c4 c2 e1 e4 09\s+cmpzxadd %rbx,%rcx,\(%r9\)
+\s*[a-f0-9]+:\s*c4 e2 f9 e4 89 f8 03 00 00\s+cmpzxadd %rax,%rcx,0x3f8\(%rcx\)
+\s*[a-f0-9]+:\s*c4 e2 e1 e4 8a 00 fc ff ff\s+cmpzxadd %rbx,%rcx,-0x400\(%rdx\)
diff --git a/gas/testsuite/gas/i386/x86-64-cmpccxadd.s b/gas/testsuite/gas/i386/x86-64-cmpccxadd.s
new file mode 100644
index 0000000000..f2eb84a1a3
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-cmpccxadd.s
@@ -0,0 +1,263 @@ 
+# Check 64bit CMPccXADD instructions
+
+	.allow_index_reg
+	.text
+_start:
+	cmpbexadd	%eax, %ecx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpbexadd	%ebx, %ecx, (%r9)	 #CMPCCXADD
+	cmpbexadd	%eax, %ecx, 508(%rcx)	 #CMPCCXADD Disp32(fc010000)
+	cmpbexadd	%ebx, %ecx, -512(%rdx)	 #CMPCCXADD Disp32(00feffff)
+	cmpbexadd	%rax, %rcx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpbexadd	%rbx, %rcx, (%r9)	 #CMPCCXADD
+	cmpbexadd	%rax, %rcx, 1016(%rcx)	 #CMPCCXADD Disp32(f8030000)
+	cmpbexadd	%rbx, %rcx, -1024(%rdx)	 #CMPCCXADD Disp32(00fcffff)
+	cmpbxadd	%eax, %ecx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpbxadd	%ebx, %ecx, (%r9)	 #CMPCCXADD
+	cmpbxadd	%eax, %ecx, 508(%rcx)	 #CMPCCXADD Disp32(fc010000)
+	cmpbxadd	%ebx, %ecx, -512(%rdx)	 #CMPCCXADD Disp32(00feffff)
+	cmpbxadd	%rax, %rcx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpbxadd	%rbx, %rcx, (%r9)	 #CMPCCXADD
+	cmpbxadd	%rax, %rcx, 1016(%rcx)	 #CMPCCXADD Disp32(f8030000)
+	cmpbxadd	%rbx, %rcx, -1024(%rdx)	 #CMPCCXADD Disp32(00fcffff)
+	cmplexadd	%eax, %ecx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmplexadd	%ebx, %ecx, (%r9)	 #CMPCCXADD
+	cmplexadd	%eax, %ecx, 508(%rcx)	 #CMPCCXADD Disp32(fc010000)
+	cmplexadd	%ebx, %ecx, -512(%rdx)	 #CMPCCXADD Disp32(00feffff)
+	cmplexadd	%rax, %rcx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmplexadd	%rbx, %rcx, (%r9)	 #CMPCCXADD
+	cmplexadd	%rax, %rcx, 1016(%rcx)	 #CMPCCXADD Disp32(f8030000)
+	cmplexadd	%rbx, %rcx, -1024(%rdx)	 #CMPCCXADD Disp32(00fcffff)
+	cmplxadd	%eax, %ecx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmplxadd	%ebx, %ecx, (%r9)	 #CMPCCXADD
+	cmplxadd	%eax, %ecx, 508(%rcx)	 #CMPCCXADD Disp32(fc010000)
+	cmplxadd	%ebx, %ecx, -512(%rdx)	 #CMPCCXADD Disp32(00feffff)
+	cmplxadd	%rax, %rcx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmplxadd	%rbx, %rcx, (%r9)	 #CMPCCXADD
+	cmplxadd	%rax, %rcx, 1016(%rcx)	 #CMPCCXADD Disp32(f8030000)
+	cmplxadd	%rbx, %rcx, -1024(%rdx)	 #CMPCCXADD Disp32(00fcffff)
+	cmpnbexadd	%eax, %ecx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpnbexadd	%ebx, %ecx, (%r9)	 #CMPCCXADD
+	cmpnbexadd	%eax, %ecx, 508(%rcx)	 #CMPCCXADD Disp32(fc010000)
+	cmpnbexadd	%ebx, %ecx, -512(%rdx)	 #CMPCCXADD Disp32(00feffff)
+	cmpnbexadd	%rax, %rcx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpnbexadd	%rbx, %rcx, (%r9)	 #CMPCCXADD
+	cmpnbexadd	%rax, %rcx, 1016(%rcx)	 #CMPCCXADD Disp32(f8030000)
+	cmpnbexadd	%rbx, %rcx, -1024(%rdx)	 #CMPCCXADD Disp32(00fcffff)
+	cmpnbxadd	%eax, %ecx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpnbxadd	%ebx, %ecx, (%r9)	 #CMPCCXADD
+	cmpnbxadd	%eax, %ecx, 508(%rcx)	 #CMPCCXADD Disp32(fc010000)
+	cmpnbxadd	%ebx, %ecx, -512(%rdx)	 #CMPCCXADD Disp32(00feffff)
+	cmpnbxadd	%rax, %rcx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpnbxadd	%rbx, %rcx, (%r9)	 #CMPCCXADD
+	cmpnbxadd	%rax, %rcx, 1016(%rcx)	 #CMPCCXADD Disp32(f8030000)
+	cmpnbxadd	%rbx, %rcx, -1024(%rdx)	 #CMPCCXADD Disp32(00fcffff)
+	cmpnlexadd	%eax, %ecx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpnlexadd	%ebx, %ecx, (%r9)	 #CMPCCXADD
+	cmpnlexadd	%eax, %ecx, 508(%rcx)	 #CMPCCXADD Disp32(fc010000)
+	cmpnlexadd	%ebx, %ecx, -512(%rdx)	 #CMPCCXADD Disp32(00feffff)
+	cmpnlexadd	%rax, %rcx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpnlexadd	%rbx, %rcx, (%r9)	 #CMPCCXADD
+	cmpnlexadd	%rax, %rcx, 1016(%rcx)	 #CMPCCXADD Disp32(f8030000)
+	cmpnlexadd	%rbx, %rcx, -1024(%rdx)	 #CMPCCXADD Disp32(00fcffff)
+	cmpnlxadd	%eax, %ecx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpnlxadd	%ebx, %ecx, (%r9)	 #CMPCCXADD
+	cmpnlxadd	%eax, %ecx, 508(%rcx)	 #CMPCCXADD Disp32(fc010000)
+	cmpnlxadd	%ebx, %ecx, -512(%rdx)	 #CMPCCXADD Disp32(00feffff)
+	cmpnlxadd	%rax, %rcx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpnlxadd	%rbx, %rcx, (%r9)	 #CMPCCXADD
+	cmpnlxadd	%rax, %rcx, 1016(%rcx)	 #CMPCCXADD Disp32(f8030000)
+	cmpnlxadd	%rbx, %rcx, -1024(%rdx)	 #CMPCCXADD Disp32(00fcffff)
+	cmpnoxadd	%eax, %ecx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpnoxadd	%ebx, %ecx, (%r9)	 #CMPCCXADD
+	cmpnoxadd	%eax, %ecx, 508(%rcx)	 #CMPCCXADD Disp32(fc010000)
+	cmpnoxadd	%ebx, %ecx, -512(%rdx)	 #CMPCCXADD Disp32(00feffff)
+	cmpnoxadd	%rax, %rcx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpnoxadd	%rbx, %rcx, (%r9)	 #CMPCCXADD
+	cmpnoxadd	%rax, %rcx, 1016(%rcx)	 #CMPCCXADD Disp32(f8030000)
+	cmpnoxadd	%rbx, %rcx, -1024(%rdx)	 #CMPCCXADD Disp32(00fcffff)
+	cmpnpxadd	%eax, %ecx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpnpxadd	%ebx, %ecx, (%r9)	 #CMPCCXADD
+	cmpnpxadd	%eax, %ecx, 508(%rcx)	 #CMPCCXADD Disp32(fc010000)
+	cmpnpxadd	%ebx, %ecx, -512(%rdx)	 #CMPCCXADD Disp32(00feffff)
+	cmpnpxadd	%rax, %rcx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpnpxadd	%rbx, %rcx, (%r9)	 #CMPCCXADD
+	cmpnpxadd	%rax, %rcx, 1016(%rcx)	 #CMPCCXADD Disp32(f8030000)
+	cmpnpxadd	%rbx, %rcx, -1024(%rdx)	 #CMPCCXADD Disp32(00fcffff)
+	cmpnsxadd	%eax, %ecx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpnsxadd	%ebx, %ecx, (%r9)	 #CMPCCXADD
+	cmpnsxadd	%eax, %ecx, 508(%rcx)	 #CMPCCXADD Disp32(fc010000)
+	cmpnsxadd	%ebx, %ecx, -512(%rdx)	 #CMPCCXADD Disp32(00feffff)
+	cmpnsxadd	%rax, %rcx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpnsxadd	%rbx, %rcx, (%r9)	 #CMPCCXADD
+	cmpnsxadd	%rax, %rcx, 1016(%rcx)	 #CMPCCXADD Disp32(f8030000)
+	cmpnsxadd	%rbx, %rcx, -1024(%rdx)	 #CMPCCXADD Disp32(00fcffff)
+	cmpnzxadd	%eax, %ecx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpnzxadd	%ebx, %ecx, (%r9)	 #CMPCCXADD
+	cmpnzxadd	%eax, %ecx, 508(%rcx)	 #CMPCCXADD Disp32(fc010000)
+	cmpnzxadd	%ebx, %ecx, -512(%rdx)	 #CMPCCXADD Disp32(00feffff)
+	cmpnzxadd	%rax, %rcx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpnzxadd	%rbx, %rcx, (%r9)	 #CMPCCXADD
+	cmpnzxadd	%rax, %rcx, 1016(%rcx)	 #CMPCCXADD Disp32(f8030000)
+	cmpnzxadd	%rbx, %rcx, -1024(%rdx)	 #CMPCCXADD Disp32(00fcffff)
+	cmpoxadd	%eax, %ecx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpoxadd	%ebx, %ecx, (%r9)	 #CMPCCXADD
+	cmpoxadd	%eax, %ecx, 508(%rcx)	 #CMPCCXADD Disp32(fc010000)
+	cmpoxadd	%ebx, %ecx, -512(%rdx)	 #CMPCCXADD Disp32(00feffff)
+	cmpoxadd	%rax, %rcx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpoxadd	%rbx, %rcx, (%r9)	 #CMPCCXADD
+	cmpoxadd	%rax, %rcx, 1016(%rcx)	 #CMPCCXADD Disp32(f8030000)
+	cmpoxadd	%rbx, %rcx, -1024(%rdx)	 #CMPCCXADD Disp32(00fcffff)
+	cmppxadd	%eax, %ecx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmppxadd	%ebx, %ecx, (%r9)	 #CMPCCXADD
+	cmppxadd	%eax, %ecx, 508(%rcx)	 #CMPCCXADD Disp32(fc010000)
+	cmppxadd	%ebx, %ecx, -512(%rdx)	 #CMPCCXADD Disp32(00feffff)
+	cmppxadd	%rax, %rcx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmppxadd	%rbx, %rcx, (%r9)	 #CMPCCXADD
+	cmppxadd	%rax, %rcx, 1016(%rcx)	 #CMPCCXADD Disp32(f8030000)
+	cmppxadd	%rbx, %rcx, -1024(%rdx)	 #CMPCCXADD Disp32(00fcffff)
+	cmpsxadd	%eax, %ecx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpsxadd	%ebx, %ecx, (%r9)	 #CMPCCXADD
+	cmpsxadd	%eax, %ecx, 508(%rcx)	 #CMPCCXADD Disp32(fc010000)
+	cmpsxadd	%ebx, %ecx, -512(%rdx)	 #CMPCCXADD Disp32(00feffff)
+	cmpsxadd	%rax, %rcx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpsxadd	%rbx, %rcx, (%r9)	 #CMPCCXADD
+	cmpsxadd	%rax, %rcx, 1016(%rcx)	 #CMPCCXADD Disp32(f8030000)
+	cmpsxadd	%rbx, %rcx, -1024(%rdx)	 #CMPCCXADD Disp32(00fcffff)
+	cmpzxadd	%eax, %ecx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpzxadd	%ebx, %ecx, (%r9)	 #CMPCCXADD
+	cmpzxadd	%eax, %ecx, 508(%rcx)	 #CMPCCXADD Disp32(fc010000)
+	cmpzxadd	%ebx, %ecx, -512(%rdx)	 #CMPCCXADD Disp32(00feffff)
+	cmpzxadd	%rax, %rcx, 0x10000000(%rbp, %r14, 8)	 #CMPCCXADD
+	cmpzxadd	%rbx, %rcx, (%r9)	 #CMPCCXADD
+	cmpzxadd	%rax, %rcx, 1016(%rcx)	 #CMPCCXADD Disp32(f8030000)
+	cmpzxadd	%rbx, %rcx, -1024(%rdx)	 #CMPCCXADD Disp32(00fcffff)
+
+.intel_syntax noprefix
+	cmpbexadd	DWORD PTR [rbp+r14*8+0x10000000], ecx, eax	 #CMPCCXADD
+	cmpbexadd	DWORD PTR [r9], ecx, ebx	 #CMPCCXADD
+	cmpbexadd	DWORD PTR [rcx+508], ecx, eax	 #CMPCCXADD Disp32(fc010000)
+	cmpbexadd	DWORD PTR [rdx-512], ecx, ebx	 #CMPCCXADD Disp32(00feffff)
+	cmpbexadd	QWORD PTR [rbp+r14*8+0x10000000], rcx, rax	 #CMPCCXADD
+	cmpbexadd	QWORD PTR [r9], rcx, rbx	 #CMPCCXADD
+	cmpbexadd	QWORD PTR [rcx+1016], rcx, rax	 #CMPCCXADD Disp32(f8030000)
+	cmpbexadd	QWORD PTR [rdx-1024], rcx, rbx	 #CMPCCXADD Disp32(00fcffff)
+	cmpbxadd	DWORD PTR [rbp+r14*8+0x10000000], ecx, eax	 #CMPCCXADD
+	cmpbxadd	DWORD PTR [r9], ecx, ebx	 #CMPCCXADD
+	cmpbxadd	DWORD PTR [rcx+508], ecx, eax	 #CMPCCXADD Disp32(fc010000)
+	cmpbxadd	DWORD PTR [rdx-512], ecx, ebx	 #CMPCCXADD Disp32(00feffff)
+	cmpbxadd	QWORD PTR [rbp+r14*8+0x10000000], rcx, rax	 #CMPCCXADD
+	cmpbxadd	QWORD PTR [r9], rcx, rbx	 #CMPCCXADD
+	cmpbxadd	QWORD PTR [rcx+1016], rcx, rax	 #CMPCCXADD Disp32(f8030000)
+	cmpbxadd	QWORD PTR [rdx-1024], rcx, rbx	 #CMPCCXADD Disp32(00fcffff)
+	cmplexadd	DWORD PTR [rbp+r14*8+0x10000000], ecx, eax	 #CMPCCXADD
+	cmplexadd	DWORD PTR [r9], ecx, ebx	 #CMPCCXADD
+	cmplexadd	DWORD PTR [rcx+508], ecx, eax	 #CMPCCXADD Disp32(fc010000)
+	cmplexadd	DWORD PTR [rdx-512], ecx, ebx	 #CMPCCXADD Disp32(00feffff)
+	cmplexadd	QWORD PTR [rbp+r14*8+0x10000000], rcx, rax	 #CMPCCXADD
+	cmplexadd	QWORD PTR [r9], rcx, rbx	 #CMPCCXADD
+	cmplexadd	QWORD PTR [rcx+1016], rcx, rax	 #CMPCCXADD Disp32(f8030000)
+	cmplexadd	QWORD PTR [rdx-1024], rcx, rbx	 #CMPCCXADD Disp32(00fcffff)
+	cmplxadd	DWORD PTR [rbp+r14*8+0x10000000], ecx, eax	 #CMPCCXADD
+	cmplxadd	DWORD PTR [r9], ecx, ebx	 #CMPCCXADD
+	cmplxadd	DWORD PTR [rcx+508], ecx, eax	 #CMPCCXADD Disp32(fc010000)
+	cmplxadd	DWORD PTR [rdx-512], ecx, ebx	 #CMPCCXADD Disp32(00feffff)
+	cmplxadd	QWORD PTR [rbp+r14*8+0x10000000], rcx, rax	 #CMPCCXADD
+	cmplxadd	QWORD PTR [r9], rcx, rbx	 #CMPCCXADD
+	cmplxadd	QWORD PTR [rcx+1016], rcx, rax	 #CMPCCXADD Disp32(f8030000)
+	cmplxadd	QWORD PTR [rdx-1024], rcx, rbx	 #CMPCCXADD Disp32(00fcffff)
+	cmpnbexadd	DWORD PTR [rbp+r14*8+0x10000000], ecx, eax	 #CMPCCXADD
+	cmpnbexadd	DWORD PTR [r9], ecx, ebx	 #CMPCCXADD
+	cmpnbexadd	DWORD PTR [rcx+508], ecx, eax	 #CMPCCXADD Disp32(fc010000)
+	cmpnbexadd	DWORD PTR [rdx-512], ecx, ebx	 #CMPCCXADD Disp32(00feffff)
+	cmpnbexadd	QWORD PTR [rbp+r14*8+0x10000000], rcx, rax	 #CMPCCXADD
+	cmpnbexadd	QWORD PTR [r9], rcx, rbx	 #CMPCCXADD
+	cmpnbexadd	QWORD PTR [rcx+1016], rcx, rax	 #CMPCCXADD Disp32(f8030000)
+	cmpnbexadd	QWORD PTR [rdx-1024], rcx, rbx	 #CMPCCXADD Disp32(00fcffff)
+	cmpnbxadd	DWORD PTR [rbp+r14*8+0x10000000], ecx, eax	 #CMPCCXADD
+	cmpnbxadd	DWORD PTR [r9], ecx, ebx	 #CMPCCXADD
+	cmpnbxadd	DWORD PTR [rcx+508], ecx, eax	 #CMPCCXADD Disp32(fc010000)
+	cmpnbxadd	DWORD PTR [rdx-512], ecx, ebx	 #CMPCCXADD Disp32(00feffff)
+	cmpnbxadd	QWORD PTR [rbp+r14*8+0x10000000], rcx, rax	 #CMPCCXADD
+	cmpnbxadd	QWORD PTR [r9], rcx, rbx	 #CMPCCXADD
+	cmpnbxadd	QWORD PTR [rcx+1016], rcx, rax	 #CMPCCXADD Disp32(f8030000)
+	cmpnbxadd	QWORD PTR [rdx-1024], rcx, rbx	 #CMPCCXADD Disp32(00fcffff)
+	cmpnlexadd	DWORD PTR [rbp+r14*8+0x10000000], ecx, eax	 #CMPCCXADD
+	cmpnlexadd	DWORD PTR [r9], ecx, ebx	 #CMPCCXADD
+	cmpnlexadd	DWORD PTR [rcx+508], ecx, eax	 #CMPCCXADD Disp32(fc010000)
+	cmpnlexadd	DWORD PTR [rdx-512], ecx, ebx	 #CMPCCXADD Disp32(00feffff)
+	cmpnlexadd	QWORD PTR [rbp+r14*8+0x10000000], rcx, rax	 #CMPCCXADD
+	cmpnlexadd	QWORD PTR [r9], rcx, rbx	 #CMPCCXADD
+	cmpnlexadd	QWORD PTR [rcx+1016], rcx, rax	 #CMPCCXADD Disp32(f8030000)
+	cmpnlexadd	QWORD PTR [rdx-1024], rcx, rbx	 #CMPCCXADD Disp32(00fcffff)
+	cmpnlxadd	DWORD PTR [rbp+r14*8+0x10000000], ecx, eax	 #CMPCCXADD
+	cmpnlxadd	DWORD PTR [r9], ecx, ebx	 #CMPCCXADD
+	cmpnlxadd	DWORD PTR [rcx+508], ecx, eax	 #CMPCCXADD Disp32(fc010000)
+	cmpnlxadd	DWORD PTR [rdx-512], ecx, ebx	 #CMPCCXADD Disp32(00feffff)
+	cmpnlxadd	QWORD PTR [rbp+r14*8+0x10000000], rcx, rax	 #CMPCCXADD
+	cmpnlxadd	QWORD PTR [r9], rcx, rbx	 #CMPCCXADD
+	cmpnlxadd	QWORD PTR [rcx+1016], rcx, rax	 #CMPCCXADD Disp32(f8030000)
+	cmpnlxadd	QWORD PTR [rdx-1024], rcx, rbx	 #CMPCCXADD Disp32(00fcffff)
+	cmpnoxadd	DWORD PTR [rbp+r14*8+0x10000000], ecx, eax	 #CMPCCXADD
+	cmpnoxadd	DWORD PTR [r9], ecx, ebx	 #CMPCCXADD
+	cmpnoxadd	DWORD PTR [rcx+508], ecx, eax	 #CMPCCXADD Disp32(fc010000)
+	cmpnoxadd	DWORD PTR [rdx-512], ecx, ebx	 #CMPCCXADD Disp32(00feffff)
+	cmpnoxadd	QWORD PTR [rbp+r14*8+0x10000000], rcx, rax	 #CMPCCXADD
+	cmpnoxadd	QWORD PTR [r9], rcx, rbx	 #CMPCCXADD
+	cmpnoxadd	QWORD PTR [rcx+1016], rcx, rax	 #CMPCCXADD Disp32(f8030000)
+	cmpnoxadd	QWORD PTR [rdx-1024], rcx, rbx	 #CMPCCXADD Disp32(00fcffff)
+	cmpnpxadd	DWORD PTR [rbp+r14*8+0x10000000], ecx, eax	 #CMPCCXADD
+	cmpnpxadd	DWORD PTR [r9], ecx, ebx	 #CMPCCXADD
+	cmpnpxadd	DWORD PTR [rcx+508], ecx, eax	 #CMPCCXADD Disp32(fc010000)
+	cmpnpxadd	DWORD PTR [rdx-512], ecx, ebx	 #CMPCCXADD Disp32(00feffff)
+	cmpnpxadd	QWORD PTR [rbp+r14*8+0x10000000], rcx, rax	 #CMPCCXADD
+	cmpnpxadd	QWORD PTR [r9], rcx, rbx	 #CMPCCXADD
+	cmpnpxadd	QWORD PTR [rcx+1016], rcx, rax	 #CMPCCXADD Disp32(f8030000)
+	cmpnpxadd	QWORD PTR [rdx-1024], rcx, rbx	 #CMPCCXADD Disp32(00fcffff)
+	cmpnsxadd	DWORD PTR [rbp+r14*8+0x10000000], ecx, eax	 #CMPCCXADD
+	cmpnsxadd	DWORD PTR [r9], ecx, ebx	 #CMPCCXADD
+	cmpnsxadd	DWORD PTR [rcx+508], ecx, eax	 #CMPCCXADD Disp32(fc010000)
+	cmpnsxadd	DWORD PTR [rdx-512], ecx, ebx	 #CMPCCXADD Disp32(00feffff)
+	cmpnsxadd	QWORD PTR [rbp+r14*8+0x10000000], rcx, rax	 #CMPCCXADD
+	cmpnsxadd	QWORD PTR [r9], rcx, rbx	 #CMPCCXADD
+	cmpnsxadd	QWORD PTR [rcx+1016], rcx, rax	 #CMPCCXADD Disp32(f8030000)
+	cmpnsxadd	QWORD PTR [rdx-1024], rcx, rbx	 #CMPCCXADD Disp32(00fcffff)
+	cmpnzxadd	DWORD PTR [rbp+r14*8+0x10000000], ecx, eax	 #CMPCCXADD
+	cmpnzxadd	DWORD PTR [r9], ecx, ebx	 #CMPCCXADD
+	cmpnzxadd	DWORD PTR [rcx+508], ecx, eax	 #CMPCCXADD Disp32(fc010000)
+	cmpnzxadd	DWORD PTR [rdx-512], ecx, ebx	 #CMPCCXADD Disp32(00feffff)
+	cmpnzxadd	QWORD PTR [rbp+r14*8+0x10000000], rcx, rax	 #CMPCCXADD
+	cmpnzxadd	QWORD PTR [r9], rcx, rbx	 #CMPCCXADD
+	cmpnzxadd	QWORD PTR [rcx+1016], rcx, rax	 #CMPCCXADD Disp32(f8030000)
+	cmpnzxadd	QWORD PTR [rdx-1024], rcx, rbx	 #CMPCCXADD Disp32(00fcffff)
+	cmpoxadd	DWORD PTR [rbp+r14*8+0x10000000], ecx, eax	 #CMPCCXADD
+	cmpoxadd	DWORD PTR [r9], ecx, ebx	 #CMPCCXADD
+	cmpoxadd	DWORD PTR [rcx+508], ecx, eax	 #CMPCCXADD Disp32(fc010000)
+	cmpoxadd	DWORD PTR [rdx-512], ecx, ebx	 #CMPCCXADD Disp32(00feffff)
+	cmpoxadd	QWORD PTR [rbp+r14*8+0x10000000], rcx, rax	 #CMPCCXADD
+	cmpoxadd	QWORD PTR [r9], rcx, rbx	 #CMPCCXADD
+	cmpoxadd	QWORD PTR [rcx+1016], rcx, rax	 #CMPCCXADD Disp32(f8030000)
+	cmpoxadd	QWORD PTR [rdx-1024], rcx, rbx	 #CMPCCXADD Disp32(00fcffff)
+	cmppxadd	DWORD PTR [rbp+r14*8+0x10000000], ecx, eax	 #CMPCCXADD
+	cmppxadd	DWORD PTR [r9], ecx, ebx	 #CMPCCXADD
+	cmppxadd	DWORD PTR [rcx+508], ecx, eax	 #CMPCCXADD Disp32(fc010000)
+	cmppxadd	DWORD PTR [rdx-512], ecx, ebx	 #CMPCCXADD Disp32(00feffff)
+	cmppxadd	QWORD PTR [rbp+r14*8+0x10000000], rcx, rax	 #CMPCCXADD
+	cmppxadd	QWORD PTR [r9], rcx, rbx	 #CMPCCXADD
+	cmppxadd	QWORD PTR [rcx+1016], rcx, rax	 #CMPCCXADD Disp32(f8030000)
+	cmppxadd	QWORD PTR [rdx-1024], rcx, rbx	 #CMPCCXADD Disp32(00fcffff)
+	cmpsxadd	DWORD PTR [rbp+r14*8+0x10000000], ecx, eax	 #CMPCCXADD
+	cmpsxadd	DWORD PTR [r9], ecx, ebx	 #CMPCCXADD
+	cmpsxadd	DWORD PTR [rcx+508], ecx, eax	 #CMPCCXADD Disp32(fc010000)
+	cmpsxadd	DWORD PTR [rdx-512], ecx, ebx	 #CMPCCXADD Disp32(00feffff)
+	cmpsxadd	QWORD PTR [rbp+r14*8+0x10000000], rcx, rax	 #CMPCCXADD
+	cmpsxadd	QWORD PTR [r9], rcx, rbx	 #CMPCCXADD
+	cmpsxadd	QWORD PTR [rcx+1016], rcx, rax	 #CMPCCXADD Disp32(f8030000)
+	cmpsxadd	QWORD PTR [rdx-1024], rcx, rbx	 #CMPCCXADD Disp32(00fcffff)
+	cmpzxadd	DWORD PTR [rbp+r14*8+0x10000000], ecx, eax	 #CMPCCXADD
+	cmpzxadd	DWORD PTR [r9], ecx, ebx	 #CMPCCXADD
+	cmpzxadd	DWORD PTR [rcx+508], ecx, eax	 #CMPCCXADD Disp32(fc010000)
+	cmpzxadd	DWORD PTR [rdx-512], ecx, ebx	 #CMPCCXADD Disp32(00feffff)
+	cmpzxadd	QWORD PTR [rbp+r14*8+0x10000000], rcx, rax	 #CMPCCXADD
+	cmpzxadd	QWORD PTR [r9], rcx, rbx	 #CMPCCXADD
+	cmpzxadd	QWORD PTR [rcx+1016], rcx, rax	 #CMPCCXADD Disp32(f8030000)
+	cmpzxadd	QWORD PTR [rdx-1024], rcx, rbx	 #CMPCCXADD Disp32(00fcffff)
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 436d2e7a08..116450c871 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -367,6 +367,7 @@  fetch_data (struct disassemble_info *info, bfd_byte *addr)
 #define Ma { OP_M, a_mode }
 #define Mb { OP_M, b_mode }
 #define Md { OP_M, d_mode }
+#define Mdq { OP_M, dq_mode }
 #define Mo { OP_M, o_mode }
 #define Mp { OP_M, f_mode }		/* 32 or 48 bit memory operand for LDS, LES etc */
 #define Mq { OP_M, q_mode }
@@ -1282,7 +1283,23 @@  enum
   X86_64_VEX_0F3849,
   X86_64_VEX_0F384B,
   X86_64_VEX_0F385C,
-  X86_64_VEX_0F385E
+  X86_64_VEX_0F385E,
+  X86_64_VEX_0F38E0,
+  X86_64_VEX_0F38E1,
+  X86_64_VEX_0F38E2,
+  X86_64_VEX_0F38E3,
+  X86_64_VEX_0F38E4,
+  X86_64_VEX_0F38E5,
+  X86_64_VEX_0F38E6,
+  X86_64_VEX_0F38E7,
+  X86_64_VEX_0F38E8,
+  X86_64_VEX_0F38E9,
+  X86_64_VEX_0F38EA,
+  X86_64_VEX_0F38EB,
+  X86_64_VEX_0F38EC,
+  X86_64_VEX_0F38ED,
+  X86_64_VEX_0F38EE,
+  X86_64_VEX_0F38EF,
 };
 
 enum
@@ -4374,6 +4391,102 @@  static const struct dis386 x86_64_table[][2] = {
     { Bad_Opcode },
     { PREFIX_TABLE (PREFIX_VEX_0F385E_X86_64) },
   },
+
+  /* X86_64_VEX_0F38E0 */
+  {
+    { Bad_Opcode },
+    { "cmpoxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
+  },
+
+  /* X86_64_VEX_0F38E1 */
+  {
+    { Bad_Opcode },
+    { "cmpnoxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
+  },
+
+  /* X86_64_VEX_0F38E2 */
+  {
+    { Bad_Opcode },
+    { "cmpbxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
+  },
+
+  /* X86_64_VEX_0F38E3 */
+  {
+    { Bad_Opcode },
+    { "cmpnbxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
+  },
+
+  /* X86_64_VEX_0F38E4 */
+  {
+    { Bad_Opcode },
+    { "cmpzxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
+  },
+
+  /* X86_64_VEX_0F38E5 */
+  {
+    { Bad_Opcode },
+    { "cmpnzxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
+  },
+
+  /* X86_64_VEX_0F38E6 */
+  {
+    { Bad_Opcode },
+    { "cmpbexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
+  },
+
+  /* X86_64_VEX_0F38E7 */
+  {
+    { Bad_Opcode },
+    { "cmpnbexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
+  },
+
+  /* X86_64_VEX_0F38E8 */
+  {
+    { Bad_Opcode },
+    { "cmpsxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
+  },
+
+  /* X86_64_VEX_0F38E9 */
+  {
+    { Bad_Opcode },
+    { "cmpnsxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
+  },
+
+  /* X86_64_VEX_0F38EA */
+  {
+    { Bad_Opcode },
+    { "cmppxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
+  },
+
+  /* X86_64_VEX_0F38EB */
+  {
+    { Bad_Opcode },
+    { "cmpnpxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
+  },
+
+  /* X86_64_VEX_0F38EC */
+  {
+    { Bad_Opcode },
+    { "cmplxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
+  },
+
+  /* X86_64_VEX_0F38ED */
+  {
+    { Bad_Opcode },
+    { "cmpnlxadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
+  },
+
+  /* X86_64_VEX_0F38EE */
+  {
+    { Bad_Opcode },
+    { "cmplexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
+  },
+
+  /* X86_64_VEX_0F38EF */
+  {
+    { Bad_Opcode },
+    { "cmpnlexadd", { Mdq, Gdq, VexGdq }, PREFIX_DATA },
+  },
 };
 
 static const struct dis386 three_byte_table[][256] = {
@@ -6385,23 +6498,23 @@  static const struct dis386 vex_table[][256] = {
     { "vaesdec",	{ XM, Vex, EXx }, PREFIX_DATA },
     { "vaesdeclast",	{ XM, Vex, EXx }, PREFIX_DATA },
     /* e0 */
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
+    { X86_64_TABLE (X86_64_VEX_0F38E0) },
+    { X86_64_TABLE (X86_64_VEX_0F38E1) },
+    { X86_64_TABLE (X86_64_VEX_0F38E2) },
+    { X86_64_TABLE (X86_64_VEX_0F38E3) },
+    { X86_64_TABLE (X86_64_VEX_0F38E4) },
+    { X86_64_TABLE (X86_64_VEX_0F38E5) },
+    { X86_64_TABLE (X86_64_VEX_0F38E6) },
+    { X86_64_TABLE (X86_64_VEX_0F38E7) },
     /* e8 */
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
-    { Bad_Opcode },
+    { X86_64_TABLE (X86_64_VEX_0F38E8) },
+    { X86_64_TABLE (X86_64_VEX_0F38E9) },
+    { X86_64_TABLE (X86_64_VEX_0F38EA) },
+    { X86_64_TABLE (X86_64_VEX_0F38EB) },
+    { X86_64_TABLE (X86_64_VEX_0F38EC) },
+    { X86_64_TABLE (X86_64_VEX_0F38ED) },
+    { X86_64_TABLE (X86_64_VEX_0F38EE) },
+    { X86_64_TABLE (X86_64_VEX_0F38EF) },
     /* f0 */
     { Bad_Opcode },
     { Bad_Opcode },
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 21986220d6..55ed659d3d 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -251,6 +251,8 @@  static initializer cpu_flag_init[] =
     "CPU_AVX2_FLAGS|CpuAVX_IFMA" },
   { "CPU_AVX_VNNI_INT8_FLAGS",
     "CPU_AVX2_FLAGS|CpuAVX_VNNI_INT8" },
+  { "CPU_CMPCCXADD_FLAGS",
+    "CpuCMPCCXADD" },
   { "CPU_IAMCU_FLAGS",
     "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuIAMCU" },
   { "CPU_ADX_FLAGS",
@@ -453,6 +455,8 @@  static initializer cpu_flag_init[] =
     "CpuAVX_IFMA" },
   { "CPU_ANY_AVX_VNNI_INT8_FLAGS",
     "CpuAVX_VNNI_INT8" },
+  { "CPU_ANY_CMPCCXADD_FLAGS",
+    "CpuCMPCCXADD" },
 };
 
 static initializer operand_type_init[] =
@@ -657,6 +661,7 @@  static bitfield cpu_flags[] =
   BITFIELD (CpuPREFETCHI),
   BITFIELD (CpuAVX_IFMA),
   BITFIELD (CpuAVX_VNNI_INT8),
+  BITFIELD (CpuCMPCCXADD),
   BITFIELD (CpuMWAITX),
   BITFIELD (CpuCLZERO),
   BITFIELD (CpuOSPKE),
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 905908749b..3b9572e2af 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -215,6 +215,8 @@  enum
   CpuAVX_IFMA,
   /* Intel AVX VNNI-INT8 Instructions support required.  */
   CpuAVX_VNNI_INT8,
+  /* Intel CMPccXADD instructions support required.  */
+  CpuCMPCCXADD,
   /* mwaitx instruction required */
   CpuMWAITX,
   /* Clzero instruction required */
@@ -298,7 +300,7 @@  enum
 
 /* If you get a compiler error for zero width of the unused field,
    comment it out.  */
-// #define CpuUnused	(CpuMax + 1)
+#define CpuUnused	(CpuMax + 1)
 
 /* We can check if an instruction is available with array instead
    of bitfield. */
@@ -399,6 +401,7 @@  typedef union i386_cpu_flags
       unsigned int cpuprefetchi:1;
       unsigned int cpuavx_ifma:1;
       unsigned int cpuavx_vnni_int8:1;
+      unsigned int cpucmpccxadd:1;
       unsigned int cpumwaitx:1;
       unsigned int cpuclzero:1;
       unsigned int cpuospke:1;
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 77a5787c4b..5fe9cb053f 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -3289,3 +3289,9 @@  prefetchit0, 0xf18, 0x7, CpuPREFETCHI|Cpu64, Modrm|Anysize|IgnoreSize|No_bSuf|No
 prefetchit1, 0xf18, 0x6, CpuPREFETCHI|Cpu64, Modrm|Anysize|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { BaseIndex }
 
 // PREFETCHI instructions end.
+
+// CMPCCXADD instructions.
+
+cmp<cc>xadd, 0x66e<cc:opc>, None, CpuCMPCCXADD|Cpu64, Modrm|Vex|Space0F38|VexVVVV|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32|Reg64, Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
+
+// CMPCCXADD instructions end.