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[8.43.85.97]) by mx.google.com with ESMTPS id i7-20020a1709064fc700b0078dbd939dacsi2059388ejw.545.2022.10.14.02.20.59 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Oct 2022 02:20:59 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=W1Fi1AmW; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 68A01385E020 for ; Fri, 14 Oct 2022 09:18:28 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 68A01385E020 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1665739108; bh=GmglTz6KSe6WseX1wwoem96/OOHS0b9zjuWG0UKrjrI=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=W1Fi1AmWfl0d6xtGVtT3+hPFQa2Zr8sLTMT/ncq7fcNS1vLtMW2xhwaf1Cx0CNgZO rGm/cJbZe1ArqGkXZLsRJqJa1M9GDo1u7xKqRhvDs1PUXOFWGAroIUs46CC6japUxs +Cqem8UGgk5l7T1AHOc7CIi5X2uj8WxIufevA+no= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by sourceware.org (Postfix) with ESMTPS id 5948E385DC13 for ; Fri, 14 Oct 2022 09:15:02 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 5948E385DC13 X-IronPort-AV: E=McAfee;i="6500,9779,10499"; a="306404326" X-IronPort-AV: E=Sophos;i="5.95,182,1661842800"; d="scan'208";a="306404326" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Oct 2022 02:14:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10499"; a="629873089" X-IronPort-AV: E=Sophos;i="5.95,182,1661842800"; d="scan'208";a="629873089" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmsmga007.fm.intel.com with ESMTP; 14 Oct 2022 02:14:54 -0700 Received: from shliclel314.sh.intel.com (shliclel314.sh.intel.com [10.239.240.214]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 9418C1009C9B; Fri, 14 Oct 2022 17:14:50 +0800 (CST) To: binutils@sourceware.org Subject: [PATCH 07/10] Support Intel WRMSRNS Date: Fri, 14 Oct 2022 17:12:45 +0800 Message-Id: <20221014091248.4920-8-haochen.jiang@intel.com> X-Mailer: git-send-email 2.18.2 In-Reply-To: <20221014091248.4920-1-haochen.jiang@intel.com> References: <20221014091248.4920-1-haochen.jiang@intel.com> X-Spam-Status: No, score=-11.8 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Haochen Jiang via Binutils From: "Jiang, Haochen" Reply-To: Haochen Jiang Cc: "Hu, Lin1" Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746654209752191066?= X-GMAIL-MSGID: =?utf-8?q?1746654209752191066?= From: "Hu, Lin1" gas/ChangeLog: * NEWS: Support Intel WRMSRNS. * config/tc-i386.c: Add wrmsrns. * doc/c-i386.texi: Document .wrmsrns and nowrmsrns. * testsuite/gas/i386/i386.exp: Add WRMSRNS tests. * testsuite/gas/i386/x86-64-lockbad-1.l: Add wrmsrns. * testsuite/gas/i386/x86-64-lockbad-1.s: Ditto. * testsuite/gas/i386/wrmsrns-intel.d: New test. * testsuite/gas/i386/wrmsrns.d: Ditto. * testsuite/gas/i386/wrmsrns.s: Ditto. * testsuite/gas/i386/x86-64-wrmsrns-intel.d: Ditto. * testsuite/gas/i386/x86-64-wrmsrns.d: Ditto. opcodes/ChangeLog: * i386-dis.c (PREFIX_0F01_REG_0_MOD_3_RM_6): New. (prefix_table): Add PREFIX_0F01_REG_0_MOD_3_RM_6. (rm_table): New entry for wrmsrns. * i386-gen.c (cpu_flag_init): Add CPU_WRMSRNS_FLAGS and CPU_ANY_WRMSRNS_FLAGS. (cpu_flags): Add CpuWRMSRNS. * i386-init.h: Regenerated. * i386-opc.h (CpuWRMSRNS): New. (i386_cpu_flags): Add cpuwrmsrns. * i386-opc.tbl: Add WRMSRNS instructions. * i386-tbl.h: Regenerated. --- gas/NEWS | 2 + gas/config/tc-i386.c | 1 + gas/doc/c-i386.texi | 4 +- gas/testsuite/gas/i386/i386.exp | 4 + gas/testsuite/gas/i386/wrmsrns-intel.d | 12 + gas/testsuite/gas/i386/wrmsrns.d | 12 + gas/testsuite/gas/i386/wrmsrns.s | 9 + gas/testsuite/gas/i386/x86-64-lockbad-1.l | 90 +- gas/testsuite/gas/i386/x86-64-lockbad-1.s | 2 + gas/testsuite/gas/i386/x86-64-wrmsrns-intel.d | 12 + gas/testsuite/gas/i386/x86-64-wrmsrns.d | 12 + opcodes/i386-dis.c | 7 + opcodes/i386-gen.c | 5 + opcodes/i386-init.h | 514 +- opcodes/i386-opc.h | 3 + opcodes/i386-opc.tbl | 6 + opcodes/i386-tbl.h | 7831 +++++++++-------- 17 files changed, 4325 insertions(+), 4201 deletions(-) create mode 100644 gas/testsuite/gas/i386/wrmsrns-intel.d create mode 100644 gas/testsuite/gas/i386/wrmsrns.d create mode 100644 gas/testsuite/gas/i386/wrmsrns.s create mode 100644 gas/testsuite/gas/i386/x86-64-wrmsrns-intel.d create mode 100644 gas/testsuite/gas/i386/x86-64-wrmsrns.d diff --git a/gas/NEWS b/gas/NEWS index f352c5ab89..2d745dfc31 100644 --- a/gas/NEWS +++ b/gas/NEWS @@ -1,5 +1,7 @@ -*- text -*- +* Add support for Intel WRMSRNS instructions. + * Add support for Intel RAO-INT instructions. * Add support for Intel CMPccXADD instructions. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 07d72d1af1..7f508b2962 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1099,6 +1099,7 @@ static const arch_entry cpu_arch[] = SUBARCH (avx_ne_convert, AVX_NE_CONVERT, ANY_AVX_NE_CONVERT, false), SUBARCH (cmpccxadd, CMPCCXADD, ANY_CMPCCXADD, false), SUBARCH (raoint, RAOINT, ANY_RAOINT, false), + SUBARCH (wrmsrns, WRMSRNS, ANY_WRMSRNS, false), }; #undef SUBARCH diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 3832628e6e..abfbccdfb0 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -218,6 +218,7 @@ accept various extension mnemonics. For example, @code{avx_ne_convert}, @code{cmpccxadd}, @code{raoint}, +@code{wrmsrns}, @code{noavx512f}, @code{noavx512cd}, @code{noavx512er}, @@ -243,6 +244,7 @@ accept various extension mnemonics. For example, @code{noavx_ne_convert}, @code{nocmpccxadd}, @code{noraoint}, +@code{nowrmsrns}, @code{noenqcmd}, @code{noserialize}, @code{notsxldtrk}, @@ -1544,7 +1546,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.tdx} @tab @samp{.avx_vnni} @tab @samp{.avx512_fp16} @item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @samp{.ibt} @item @samp{.avx_ifma} @tab @samp{.avx_vnni_int8} @tab @samp{.avx_ne_convert} -@item @samp{.cmpccxadd} @tab @samp{.raoint} +@item @samp{.cmpccxadd} @tab @samp{.raoint} @tab @samp{.wrmsrns} @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote} @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq} @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk} diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 1eb0eabb6b..c924075180 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -488,6 +488,8 @@ if [gas_32_check] then { run_list_test "cmpccxadd-inval" run_dump_test "raoint" run_dump_test "raoint-intel" + run_dump_test "wrmsrns" + run_dump_test "wrmsrns-intel" run_list_test "sg" run_dump_test "clzero" run_dump_test "invlpgb" @@ -1166,6 +1168,8 @@ if [gas_64_check] then { run_dump_test "x86-64-cmpccxadd-intel" run_dump_test "x86-64-raoint" run_dump_test "x86-64-raoint-intel" + run_dump_test "x86-64-wrmsrns" + run_dump_test "x86-64-wrmsrns-intel" run_dump_test "x86-64-clzero" run_dump_test "x86-64-mwaitx-bdver4" run_list_test "x86-64-mwaitx-reg" diff --git a/gas/testsuite/gas/i386/wrmsrns-intel.d b/gas/testsuite/gas/i386/wrmsrns-intel.d new file mode 100644 index 0000000000..83194511a5 --- /dev/null +++ b/gas/testsuite/gas/i386/wrmsrns-intel.d @@ -0,0 +1,12 @@ +#as: +#objdump: -dw -Mintel +#name: i386 WRMSRNS insns (Intel disassembly) +#source: wrmsrns.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*0f 01 c6\s+wrmsrns +\s*[a-f0-9]+:\s*0f 01 c6\s+wrmsrns diff --git a/gas/testsuite/gas/i386/wrmsrns.d b/gas/testsuite/gas/i386/wrmsrns.d new file mode 100644 index 0000000000..e804adc501 --- /dev/null +++ b/gas/testsuite/gas/i386/wrmsrns.d @@ -0,0 +1,12 @@ +#as: +#objdump: -dw +#name: i386 WRMSRNS insns +#source: wrmsrns.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*0f 01 c6\s+wrmsrns +\s*[a-f0-9]+:\s*0f 01 c6\s+wrmsrns diff --git a/gas/testsuite/gas/i386/wrmsrns.s b/gas/testsuite/gas/i386/wrmsrns.s new file mode 100644 index 0000000000..a0fca64e44 --- /dev/null +++ b/gas/testsuite/gas/i386/wrmsrns.s @@ -0,0 +1,9 @@ +# Check WRMSRNS instructions + + .allow_index_reg + .text +_start: + wrmsrns #WRMSRNS + +.intel_syntax noprefix + wrmsrns #WRMSRNS diff --git a/gas/testsuite/gas/i386/x86-64-lockbad-1.l b/gas/testsuite/gas/i386/x86-64-lockbad-1.l index dad0c06e2f..6313e986fd 100644 --- a/gas/testsuite/gas/i386/x86-64-lockbad-1.l +++ b/gas/testsuite/gas/i386/x86-64-lockbad-1.l @@ -36,9 +36,9 @@ .*:41: Error: .* .*:42: Error: .* .*:43: Error: .* -.*:46: Error: .* +.*:44: Error: .* .*:47: Error: .* -.*:49: Error: .* +.*:48: Error: .* .*:50: Error: .* .*:51: Error: .* .*:52: Error: .* @@ -66,13 +66,15 @@ .*:74: Error: .* .*:75: Error: .* .*:76: Error: .* -.*:78: Error: .* +.*:77: Error: .* .*:79: Error: .* .*:80: Error: .* .*:81: Error: .* .*:82: Error: .* .*:83: Error: .* .*:84: Error: .* +.*:85: Error: .* +.*:86: Error: .* GAS LISTING .* @@ -119,47 +121,49 @@ GAS LISTING .* [ ]*41[ ]+lock sbb \(%rbx\), %eax [ ]*42[ ]+lock sub \(%rbx\), %eax [ ]*43[ ]+lock xor \(%rbx\), %eax -[ ]*44[ ]+ -[ ]*45[ ]+\.intel_syntax noprefix -[ ]*46[ ]+lock mov eax,ebx -[ ]*47[ ]+lock mov eax,DWORD PTR \[rbx\] -[ ]*48[ ]+ -[ ]*49[ ]+lock add eax,ebx -[ ]*50[ ]+lock add ebx,0x64 -[ ]*51[ ]+lock adc eax,ebx -[ ]*52[ ]+lock adc ebx,0x64 -[ ]*53[ ]+lock and eax,ebx -[ ]*54[ ]+lock and ebx,0x64 -[ ]*55[ ]+lock btc ebx,eax -[ ]*56[ ]+lock btc ebx,0x64 -[ ]*57[ ]+lock btr ebx,eax +[ ]*44[ ]+lock wrmsrns +[ ]*45[ ]+ +[ ]*46[ ]+\.intel_syntax noprefix +[ ]*47[ ]+lock mov eax,ebx +[ ]*48[ ]+lock mov eax,DWORD PTR \[rbx\] +[ ]*49[ ]+ +[ ]*50[ ]+lock add eax,ebx +[ ]*51[ ]+lock add ebx,0x64 +[ ]*52[ ]+lock adc eax,ebx +[ ]*53[ ]+lock adc ebx,0x64 +[ ]*54[ ]+lock and eax,ebx +[ ]*55[ ]+lock and ebx,0x64 +[ ]*56[ ]+lock btc ebx,eax +[ ]*57[ ]+lock btc ebx,0x64 GAS LISTING .* -[ ]*58[ ]+lock btr ebx,0x64 -[ ]*59[ ]+lock bts ebx,eax -[ ]*60[ ]+lock bts ebx,0x64 -[ ]*61[ ]+lock cmpxchg ebx,eax -[ ]*62[ ]+lock dec ebx -[ ]*63[ ]+lock inc ebx -[ ]*64[ ]+lock neg ebx -[ ]*65[ ]+lock not ebx -[ ]*66[ ]+lock or eax,ebx -[ ]*67[ ]+lock or ebx,0x64 -[ ]*68[ ]+lock sbb eax,ebx -[ ]*69[ ]+lock sbb ebx,0x64 -[ ]*70[ ]+lock sub eax,ebx -[ ]*71[ ]+lock sub ebx,0x64 -[ ]*72[ ]+lock xadd ebx,eax -[ ]*73[ ]+lock xchg ebx,eax +[ ]*58[ ]+lock btr ebx,eax +[ ]*59[ ]+lock btr ebx,0x64 +[ ]*60[ ]+lock bts ebx,eax +[ ]*61[ ]+lock bts ebx,0x64 +[ ]*62[ ]+lock cmpxchg ebx,eax +[ ]*63[ ]+lock dec ebx +[ ]*64[ ]+lock inc ebx +[ ]*65[ ]+lock neg ebx +[ ]*66[ ]+lock not ebx +[ ]*67[ ]+lock or eax,ebx +[ ]*68[ ]+lock or ebx,0x64 +[ ]*69[ ]+lock sbb eax,ebx +[ ]*70[ ]+lock sbb ebx,0x64 +[ ]*71[ ]+lock sub eax,ebx +[ ]*72[ ]+lock sub ebx,0x64 +[ ]*73[ ]+lock xadd ebx,eax [ ]*74[ ]+lock xchg ebx,eax -[ ]*75[ ]+lock xor eax,ebx -[ ]*76[ ]+lock xor ebx,0x64 -[ ]*77[ ]+ -[ ]*78[ ]+lock add eax,DWORD PTR \[rbx\] -[ ]*79[ ]+lock adc eax,DWORD PTR \[rbx\] -[ ]*80[ ]+lock and eax,DWORD PTR \[rbx\] -[ ]*81[ ]+lock or eax,DWORD PTR \[rbx\] -[ ]*82[ ]+lock sbb eax,DWORD PTR \[rbx\] -[ ]*83[ ]+lock sub eax,DWORD PTR \[rbx\] -[ ]*84[ ]+lock xor eax,DWORD PTR \[rbx\] +[ ]*75[ ]+lock xchg ebx,eax +[ ]*76[ ]+lock xor eax,ebx +[ ]*77[ ]+lock xor ebx,0x64 +[ ]*78[ ]+ +[ ]*79[ ]+lock add eax,DWORD PTR \[rbx\] +[ ]*80[ ]+lock adc eax,DWORD PTR \[rbx\] +[ ]*81[ ]+lock and eax,DWORD PTR \[rbx\] +[ ]*82[ ]+lock or eax,DWORD PTR \[rbx\] +[ ]*83[ ]+lock sbb eax,DWORD PTR \[rbx\] +[ ]*84[ ]+lock sub eax,DWORD PTR \[rbx\] +[ ]*85[ ]+lock xor eax,DWORD PTR \[rbx\] +[ ]*86[ ]+lock wrmsrns diff --git a/gas/testsuite/gas/i386/x86-64-lockbad-1.s b/gas/testsuite/gas/i386/x86-64-lockbad-1.s index 8b1f9b054a..71e9284a1c 100644 --- a/gas/testsuite/gas/i386/x86-64-lockbad-1.s +++ b/gas/testsuite/gas/i386/x86-64-lockbad-1.s @@ -41,6 +41,7 @@ foo: lock sbb (%rbx), %eax lock sub (%rbx), %eax lock xor (%rbx), %eax + lock wrmsrns .intel_syntax noprefix lock mov eax,ebx @@ -82,3 +83,4 @@ foo: lock sbb eax,DWORD PTR [rbx] lock sub eax,DWORD PTR [rbx] lock xor eax,DWORD PTR [rbx] + lock wrmsrns diff --git a/gas/testsuite/gas/i386/x86-64-wrmsrns-intel.d b/gas/testsuite/gas/i386/x86-64-wrmsrns-intel.d new file mode 100644 index 0000000000..2f789ed5df --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-wrmsrns-intel.d @@ -0,0 +1,12 @@ +#as: +#objdump: -dw -Mintel +#name: x86_64 WRMSRNS insns (Intel disassembly) +#source: wrmsrns.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*0f 01 c6\s+wrmsrns +\s*[a-f0-9]+:\s*0f 01 c6\s+wrmsrns diff --git a/gas/testsuite/gas/i386/x86-64-wrmsrns.d b/gas/testsuite/gas/i386/x86-64-wrmsrns.d new file mode 100644 index 0000000000..b8535c266a --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-wrmsrns.d @@ -0,0 +1,12 @@ +#as: +#objdump: -dw +#name: x86_64 WRMSRNS insns +#source: wrmsrns.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*0f 01 c6\s+wrmsrns +\s*[a-f0-9]+:\s*0f 01 c6\s+wrmsrns diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 60a334bbd6..8c88114202 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -1000,6 +1000,7 @@ enum enum { PREFIX_90 = 0, + PREFIX_0F01_REG_0_MOD_3_RM_6, PREFIX_0F01_REG_1_RM_4, PREFIX_0F01_REG_1_RM_5, PREFIX_0F01_REG_1_RM_6, @@ -2970,6 +2971,11 @@ static const struct dis386 prefix_table[][4] = { { NULL, { { NULL, 0 } }, PREFIX_IGNORED } }, + /* PREFIX_0F01_REG_0_MOD_3_RM_6 */ + { + { "wrmsrns", { Skip_MODRM }, 0 }, + }, + /* PREFIX_0F01_REG_1_RM_4 */ { { Bad_Opcode }, @@ -8733,6 +8739,7 @@ static const struct dis386 rm_table[][8] = { { "vmresume", { Skip_MODRM }, 0 }, { "vmxoff", { Skip_MODRM }, 0 }, { "pconfig", { Skip_MODRM }, 0 }, + { PREFIX_TABLE (PREFIX_0F01_REG_0_MOD_3_RM_6) }, }, { /* RM_0F01_REG_1 */ diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 3a7511a242..5714f731ad 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -255,6 +255,8 @@ static initializer cpu_flag_init[] = "CpuCMPCCXADD" }, { "CPU_RAOINT_FLAGS", "CpuRAOINT" }, + { "CPU_WRMSRNS_FLAGS", + "CpuWRMSRNS" }, { "CPU_IAMCU_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuIAMCU" }, { "CPU_ADX_FLAGS", @@ -459,6 +461,8 @@ static initializer cpu_flag_init[] = "CpuCMPCCXADD" }, { "CPU_ANY_RAOINT_FLAGS", "CpuRAOINT" }, + { "CPU_ANY_WRMSRNS_FLAGS", + "CpuWRMSRNS" }, }; static initializer operand_type_init[] = @@ -665,6 +669,7 @@ static bitfield cpu_flags[] = BITFIELD (CpuAVX_NE_CONVERT), BITFIELD (CpuCMPCCXADD), BITFIELD (CpuRAOINT), + BITFIELD (CpuWRMSRNS), BITFIELD (CpuMWAITX), BITFIELD (CpuCLZERO), BITFIELD (CpuOSPKE), diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index cb6c372203..90e0591ae2 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -219,6 +219,8 @@ enum CpuCMPCCXADD, /* Intel RAO INT Instructions support required. */ CpuRAOINT, + /* Intel WRMSRNS Instructions support required */ + CpuWRMSRNS, /* mwaitx instruction required */ CpuMWAITX, /* Clzero instruction required */ @@ -403,6 +405,7 @@ typedef union i386_cpu_flags unsigned int cpuavx_ne_convert:1; unsigned int cpucmpccxadd:1; unsigned int cpuraoint:1; + unsigned int cpuwrmsrns:1; unsigned int cpumwaitx:1; unsigned int cpuclzero:1; unsigned int cpuospke:1; diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 4affd056b2..0b3aa8936e 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -3326,3 +3326,9 @@ aor, 0xf20f38fc, None, CpuRAOINT, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ld axor, 0xf30f38fc, None, CpuRAOINT, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf,{ Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex} // RAOINT instructions end. + +// WRMSRNS instructions. + +wrmsrns, 0x0f01c6, None, CpuWRMSRNS, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {} + +// WRMSRNS instructions end.