diff --git a/gas/NEWS b/gas/NEWS
index 3246e7e825..961449545d 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,7 @@
 -*- text -*-
 
+* Add support for Intel AMX-FP16 instructions.
+
 * Add support for Intel MSRLIST instructions.
 
 * Add support for Intel WRMSRNS instructions.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 981fd9f73d..73aa2c66aa 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1101,6 +1101,7 @@ static const arch_entry cpu_arch[] =
   SUBARCH (raoint, RAOINT, ANY_RAOINT, false),
   SUBARCH (wrmsrns, WRMSRNS, ANY_WRMSRNS, false),
   SUBARCH (msrlist, MSRLIST, ANY_MSRLIST, false),
+  SUBARCH (amx_fp16, AMX_FP16, ANY_AMX_FP16, false),
 };
 
 #undef SUBARCH
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 1bf953ef73..dc7e281e6d 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -220,6 +220,7 @@ accept various extension mnemonics.  For example,
 @code{raoint},
 @code{wrmsrns},
 @code{msrlist},
+@code{amx_fp16},
 @code{noavx512f},
 @code{noavx512cd},
 @code{noavx512er},
@@ -247,6 +248,7 @@ accept various extension mnemonics.  For example,
 @code{noraoint},
 @code{nowrmsrns},
 @code{nomsrlist},
+@code{noamx_fp16},
 @code{noenqcmd},
 @code{noserialize},
 @code{notsxldtrk},
@@ -1549,7 +1551,7 @@ supported on the CPU specified.  The choices for @var{cpu_type} are:
 @item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @samp{.ibt}
 @item @samp{.avx_ifma} @tab @samp{.avx_vnni_int8} @tab @samp{.avx_ne_convert}
 @item @samp{.cmpccxadd} @tab @samp{.raoint} @tab @samp{.wrmsrns}
-@item @samp{.msrlist}
+@item @samp{.msrlist} @tab @samp{.amx_fp16}
 @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
 @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
 @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk}
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 5da64b4076..9f5fa7f612 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -1173,6 +1173,9 @@ if [gas_64_check] then {
     run_dump_test "x86-64-wrmsrns-intel"
     run_dump_test "x86-64-msrlist"
     run_dump_test "x86-64-msrlist-intel"
+    run_dump_test "x86-64-amx-fp16"
+    run_dump_test "x86-64-amx-fp16-intel"
+    run_dump_test "x86-64-amx-fp16-bad"
     run_dump_test "x86-64-clzero"
     run_dump_test "x86-64-mwaitx-bdver4"
     run_list_test "x86-64-mwaitx-reg"
diff --git a/gas/testsuite/gas/i386/x86-64-amx-fp16-bad.d b/gas/testsuite/gas/i386/x86-64-amx-fp16-bad.d
new file mode 100644
index 0000000000..a53ebf486d
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-amx-fp16-bad.d
@@ -0,0 +1,19 @@
+#as:
+#objdump: -drw
+#name: x86_64 Illegal AMX-FP16 insns
+#source: x86-64-amx-fp16-bad.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <\.text>:
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d3 5c[ 	]*\(bad\)[ 	]*
+[ 	]*[a-f0-9]+:[ 	]*dc 90 90 90 90 90[ 	]*fcoml.*
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 57 5c[ 	]*\(bad\)[ 	]*
+[ 	]*[a-f0-9]+:[ 	]*dc 90 90 90 90 90[ 	]*fcoml.*
+[ 	]*[a-f0-9]+:[ 	]*c4 62 53 5c dc[ 	]*tdpfp16ps %tmm5,%tmm4,\(bad\)
+[ 	]*[a-f0-9]+:[ 	]*c4 c2 53 5c dc[ 	]*tdpfp16ps %tmm5,\(bad\),%tmm3
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 33 5c dc[ 	]*tdpfp16ps \(bad\),%tmm4,%tmm3
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-amx-fp16-bad.s b/gas/testsuite/gas/i386/x86-64-amx-fp16-bad.s
new file mode 100644
index 0000000000..da5be1086e
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-amx-fp16-bad.s
@@ -0,0 +1,35 @@
+# Check Illegal 64bit AMX-FP16 instructions
+
+.text
+	#tdpfp16ps %tmm5,%tmm4,%tmm3 set VEX.W = 1 (illegal value).
+	.byte 0xc4
+	.byte 0xe2
+	.byte 0xd3
+	.byte 0x5c
+	.byte 0xdc
+	.fill 0x05, 0x01, 0x90
+	#tdpfp16ps %tmm5,%tmm4,%tmm3 set VEX.L = 1 (illegal value).
+	.byte 0xc4
+	.byte 0xe2
+	.byte 0x57
+	.byte 0x5c
+	.byte 0xdc
+	.fill 0x05, 0x01, 0x90
+	#tdpfp16ps %tmm5,%tmm4,%tmm3 set VEX.R = 0 (illegal value).
+	.byte 0xc4
+	.byte 0x62
+	.byte 0x53
+	.byte 0x5c
+	.byte 0xdc
+	#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.B = 0 (illegal value).
+	.byte 0xc4
+	.byte 0xc2
+	.byte 0x53
+	.byte 0x5c
+	.byte 0xdc
+	#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.VVVV = 0110 (illegal value).
+	.byte 0xc4
+	.byte 0xe2
+	.byte 0x33
+	.byte 0x5c
+	.byte 0xdc
diff --git a/gas/testsuite/gas/i386/x86-64-amx-fp16-intel.d b/gas/testsuite/gas/i386/x86-64-amx-fp16-intel.d
new file mode 100644
index 0000000000..497898b760
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-amx-fp16-intel.d
@@ -0,0 +1,13 @@
+#as:
+#objdump: -d -Mintel
+#name: x86_64 AMX-FP16 insns (Intel disassembly)
+#source: x86-64-amx-fp16.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 53 5c dc[ 	]*tdpfp16ps tmm3,tmm4,tmm5
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 53 5c dc[ 	]*tdpfp16ps tmm3,tmm4,tmm5
diff --git a/gas/testsuite/gas/i386/x86-64-amx-fp16.d b/gas/testsuite/gas/i386/x86-64-amx-fp16.d
new file mode 100644
index 0000000000..7d3af95a4d
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-amx-fp16.d
@@ -0,0 +1,13 @@
+#as:
+#objdump: -dw
+#name: x86_64 AMX-FP16 insns
+#source: x86-64-amx-fp16.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 53 5c dc[ 	]*tdpfp16ps %tmm5,%tmm4,%tmm3
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 53 5c dc[ 	]*tdpfp16ps %tmm5,%tmm4,%tmm3
diff --git a/gas/testsuite/gas/i386/x86-64-amx-fp16.s b/gas/testsuite/gas/i386/x86-64-amx-fp16.s
new file mode 100644
index 0000000000..5a007904ed
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-amx-fp16.s
@@ -0,0 +1,9 @@
+# Check 64bit AMX-FP16 instructions
+
+	.allow_index_reg
+	.text
+_start:
+	tdpfp16ps %tmm5, %tmm4, %tmm3
+
+.intel_syntax noprefix
+	tdpfp16ps tmm3, tmm4, tmm5
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 0601bee877..be25d3f612 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -933,6 +933,7 @@ enum
   MOD_VEX_0F384B_X86_64_P_3_W_0,
   MOD_VEX_0F385A,
   MOD_VEX_0F385C_X86_64_P_1_W_0,
+  MOD_VEX_0F385C_X86_64_P_3_W_0,
   MOD_VEX_0F385E_X86_64_P_0_W_0,
   MOD_VEX_0F385E_X86_64_P_1_W_0,
   MOD_VEX_0F385E_X86_64_P_2_W_0,
@@ -1399,6 +1400,7 @@ enum
   VEX_LEN_0F384B_X86_64_P_3_W_0_M_0,
   VEX_LEN_0F385A_M_0,
   VEX_LEN_0F385C_X86_64_P_1_W_0_M_0,
+  VEX_LEN_0F385C_X86_64_P_3_W_0_M_0,
   VEX_LEN_0F385E_X86_64_P_0_W_0_M_0,
   VEX_LEN_0F385E_X86_64_P_1_W_0_M_0,
   VEX_LEN_0F385E_X86_64_P_2_W_0_M_0,
@@ -1565,6 +1567,7 @@ enum
   VEX_W_0F3859,
   VEX_W_0F385A_M_0_L_0,
   VEX_W_0F385C_X86_64_P_1,
+  VEX_W_0F385C_X86_64_P_3,
   VEX_W_0F385E_X86_64_P_0,
   VEX_W_0F385E_X86_64_P_1,
   VEX_W_0F385E_X86_64_P_2,
@@ -4088,6 +4091,7 @@ static const struct dis386 prefix_table[][4] = {
     { Bad_Opcode },
     { VEX_W_TABLE (VEX_W_0F385C_X86_64_P_1) },
     { Bad_Opcode },
+    { VEX_W_TABLE (VEX_W_0F385C_X86_64_P_3) },
   },
 
   /* PREFIX_VEX_0F385E_X86_64 */
@@ -7120,6 +7124,11 @@ static const struct dis386 vex_len_table[][2] = {
     { "tdpbf16ps", { TMM, EXtmm, VexTmm }, 0 },
   },
 
+  /* VEX_LEN_0F385C_X86_64_P_3_W_0_M_0 */
+  {
+    { "tdpfp16ps", { TMM, EXtmm, VexTmm }, 0 },
+  },
+
   /* VEX_LEN_0F385E_X86_64_P_0_W_0_M_0 */
   {
     { "tdpbuud", {TMM, EXtmm, VexTmm }, 0 },
@@ -7788,6 +7797,10 @@ static const struct dis386 vex_w_table[][2] = {
     /* VEX_W_0F385C_X86_64_P_1 */
     { MOD_TABLE (MOD_VEX_0F385C_X86_64_P_1_W_0) },
   },
+  {
+    /* VEX_W_0F385C_X86_64_P_3 */
+    { MOD_TABLE (MOD_VEX_0F385C_X86_64_P_3_W_0) },
+  },
   {
     /* VEX_W_0F385E_X86_64_P_0 */
     { MOD_TABLE (MOD_VEX_0F385E_X86_64_P_0_W_0) },
@@ -8610,6 +8623,11 @@ static const struct dis386 mod_table[][2] = {
     { Bad_Opcode },
     { VEX_LEN_TABLE (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0) },
   },
+  {
+    /* MOD_VEX_0F385C_X86_64_P_3_W_0 */
+    { Bad_Opcode },
+    { VEX_LEN_TABLE (VEX_LEN_0F385C_X86_64_P_3_W_0_M_0) },
+  },
   {
     /* MOD_VEX_0F385E_X86_64_P_0_W_0 */
     { Bad_Opcode },
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index eac229e54d..d10b462548 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -259,6 +259,8 @@ static initializer cpu_flag_init[] =
     "CpuWRMSRNS" },
   { "CPU_MSRLIST_FLAGS",
     "CpuMSRLIST" },
+  { "CPU_AMX_FP16_FLAGS",
+    "CpuAMX_FP16" },
   { "CPU_IAMCU_FLAGS",
     "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuIAMCU" },
   { "CPU_ADX_FLAGS",
@@ -426,7 +428,7 @@ static initializer cpu_flag_init[] =
   { "CPU_ANY_AMX_BF16_FLAGS",
     "CpuAMX_BF16" },
   { "CPU_ANY_AMX_TILE_FLAGS",
-    "CpuAMX_TILE|CpuAMX_INT8|CpuAMX_BF16" },
+    "CpuAMX_TILE|CpuAMX_INT8|CpuAMX_BF16|CpuAMX_FP16" },
   { "CPU_ANY_AVX_VNNI_FLAGS",
     "CpuAVX_VNNI" },
   { "CPU_ANY_MOVDIRI_FLAGS",
@@ -467,6 +469,8 @@ static initializer cpu_flag_init[] =
     "CpuWRMSRNS" },
   { "CPU_ANY_MSRLIST_FLAGS",
     "CpuMSRLIST" },
+  { "CPU_ANY_AMX_FP16_FLAGS",
+    "CpuAMX_FP16" },
 };
 
 static initializer operand_type_init[] =
@@ -675,6 +679,7 @@ static bitfield cpu_flags[] =
   BITFIELD (CpuRAOINT),
   BITFIELD (CpuWRMSRNS),
   BITFIELD (CpuMSRLIST),
+  BITFIELD (CpuAMX_FP16),
   BITFIELD (CpuMWAITX),
   BITFIELD (CpuCLZERO),
   BITFIELD (CpuOSPKE),
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 75c23aaec6..0dec14e365 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -223,6 +223,8 @@ enum
   CpuWRMSRNS,
   /* Intel MSRLIST Instructions support required.  */
   CpuMSRLIST,
+  /* AMX-FP16 instructions required */
+  CpuAMX_FP16,
   /* mwaitx instruction required */
   CpuMWAITX,
   /* Clzero instruction required */
@@ -409,6 +411,7 @@ typedef union i386_cpu_flags
       unsigned int cpuraoint:1;
       unsigned int cpuwrmsrns:1;
       unsigned int cpumsrlist:1;
+      unsigned int cpuamx_fp16:1;
       unsigned int cpumwaitx:1;
       unsigned int cpuclzero:1;
       unsigned int cpuospke:1;
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 0dd7106a1c..95bb2fc1fd 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -3339,3 +3339,9 @@ rdmsrlist, 0xf20f01c6, None, CpuMSRLIST|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|N
 wrmsrlist, 0xf30f01c6, None, CpuMSRLIST|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
 
 // MSRLIST instructions end.
+
+// AMX-FP16 instructions.
+
+tdpfp16ps, 0xf25c, None, CpuAMX_FP16|Cpu64, Modrm|Vex128|Space0F38|VexVVVV=1|VexW0|SwapSources|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegTMM, RegTMM, RegTMM }
+
+// AMX-FP16 instructions end.
