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[8.43.85.97]) by mx.google.com with ESMTPS id b23-20020aa7cd17000000b00457c6a2a3f8si1777580edw.68.2022.10.14.02.19.28 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Oct 2022 02:19:28 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=t9VgRind; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 43A5D384D15C for ; Fri, 14 Oct 2022 09:17:19 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 43A5D384D15C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1665739039; bh=BytP+TDGizwzmsXR/rLBw18VmVFwmAYlbtmCNFGaJeE=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=t9VgRindMBGqEtRzgTc8uCQMMBybVCm4wUcJMncLk8KwdSeCoJYOap5uyZ9JMl8ZI 1rHIod1MeYHsmcVwSL8I3TkdoVaVXzOfvKPFpPn7Ar2uyti4QoaByp/8ufQpqzxJyg YF1K0Lr7euHaSSWdtz4T8UpH+g5NFmGe66GAjooY= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by sourceware.org (Postfix) with ESMTPS id ADFD8385C317 for ; Fri, 14 Oct 2022 09:15:00 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org ADFD8385C317 X-IronPort-AV: E=McAfee;i="6500,9779,10499"; a="369520194" X-IronPort-AV: E=Sophos;i="5.95,182,1661842800"; d="scan'208";a="369520194" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Oct 2022 02:14:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10499"; a="629873085" X-IronPort-AV: E=Sophos;i="5.95,182,1661842800"; d="scan'208";a="629873085" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmsmga007.fm.intel.com with ESMTP; 14 Oct 2022 02:14:55 -0700 Received: from shliclel314.sh.intel.com (shliclel314.sh.intel.com [10.239.240.214]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 9C3B5100AC61; Fri, 14 Oct 2022 17:14:50 +0800 (CST) To: binutils@sourceware.org Subject: [PATCH 09/10] Support Intel AMX-FP16 Date: Fri, 14 Oct 2022 17:12:47 +0800 Message-Id: <20221014091248.4920-10-haochen.jiang@intel.com> X-Mailer: git-send-email 2.18.2 In-Reply-To: <20221014091248.4920-1-haochen.jiang@intel.com> References: <20221014091248.4920-1-haochen.jiang@intel.com> X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Haochen Jiang via Binutils From: "Jiang, Haochen" Reply-To: Haochen Jiang Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746654115106645628?= X-GMAIL-MSGID: =?utf-8?q?1746654115106645628?= From: "Cui,Lili" gas/ * NEWS: Add support for Intel AMX-FP16 instruction. * config/tc-i386.c: Add amx_fp16. * doc/c-i386.texi: Document .amx_fp16, noamx_fp16. * testsuite/gas/i386/i386.exp: Add AMX-FP16 tests. * testsuite/gas/i386/x86-64-amx-fp16-intel.d: New test. * testsuite/gas/i386/x86-64-amx-fp16.d: Likewise. * testsuite/gas/i386/x86-64-amx-fp16.s: Likewise. * testsuite/gas/i386/x86-64-amx-fp16-bad.d: Likewise. * testsuite/gas/i386/x86-64-amx-fp16-bad.s: Likewise. opcodes/ * i386-dis.c (MOD_VEX_0F385C_X86_64_P_3_W_0): New. (VEX_LEN_0F385C_X86_64_P_3_W_0_M_0): Likewise. (VEX_W_0F385C_X86_64_P_3): Likewise. (prefix_table): Add VEX_W_0F385C_X86_64_P_3. (vex_len_table): Add VEX_LEN_0F385C_X86_64_P_3_W_0_M_0. (vex_w_table): Add VEX_W_0F385C_X86_64_P_3. (mod_table): Add MOD_VEX_0F385C_X86_64_P_3_W_0. * i386-gen.c (cpu_flag_init): Add AMX-FP16_FLAGS and CPU_ANY_AMX-FP16_FLAGS. (CPU_ANY_AMX_TILE_FLAGS): Add CpuAMX_FP16. (cpu_flags): Add CpuAMX-FP16. * i386-opc.h (enum): Add CpuAMX-FP16. (i386_cpu_flags): Add cpuamx_fp16. * i386-opc.tbl: Add Intel AMX-FP16 instruction. * i386-init.h: Regenerate. * i386-tbl.h: Likewise. --- gas/NEWS | 2 + gas/config/tc-i386.c | 1 + gas/doc/c-i386.texi | 4 +- gas/testsuite/gas/i386/i386.exp | 3 + gas/testsuite/gas/i386/x86-64-amx-fp16-bad.d | 19 + gas/testsuite/gas/i386/x86-64-amx-fp16-bad.s | 35 + .../gas/i386/x86-64-amx-fp16-intel.d | 13 + gas/testsuite/gas/i386/x86-64-amx-fp16.d | 13 + gas/testsuite/gas/i386/x86-64-amx-fp16.s | 9 + opcodes/i386-dis.c | 18 + opcodes/i386-gen.c | 7 +- opcodes/i386-init.h | 520 +- opcodes/i386-opc.h | 3 + opcodes/i386-opc.tbl | 6 + opcodes/i386-tbl.h | 7837 +++++++++-------- 15 files changed, 4327 insertions(+), 4163 deletions(-) create mode 100644 gas/testsuite/gas/i386/x86-64-amx-fp16-bad.d create mode 100644 gas/testsuite/gas/i386/x86-64-amx-fp16-bad.s create mode 100644 gas/testsuite/gas/i386/x86-64-amx-fp16-intel.d create mode 100644 gas/testsuite/gas/i386/x86-64-amx-fp16.d create mode 100644 gas/testsuite/gas/i386/x86-64-amx-fp16.s diff --git a/gas/NEWS b/gas/NEWS index 3246e7e825..961449545d 100644 --- a/gas/NEWS +++ b/gas/NEWS @@ -1,5 +1,7 @@ -*- text -*- +* Add support for Intel AMX-FP16 instructions. + * Add support for Intel MSRLIST instructions. * Add support for Intel WRMSRNS instructions. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 981fd9f73d..73aa2c66aa 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1101,6 +1101,7 @@ static const arch_entry cpu_arch[] = SUBARCH (raoint, RAOINT, ANY_RAOINT, false), SUBARCH (wrmsrns, WRMSRNS, ANY_WRMSRNS, false), SUBARCH (msrlist, MSRLIST, ANY_MSRLIST, false), + SUBARCH (amx_fp16, AMX_FP16, ANY_AMX_FP16, false), }; #undef SUBARCH diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 1bf953ef73..dc7e281e6d 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -220,6 +220,7 @@ accept various extension mnemonics. For example, @code{raoint}, @code{wrmsrns}, @code{msrlist}, +@code{amx_fp16}, @code{noavx512f}, @code{noavx512cd}, @code{noavx512er}, @@ -247,6 +248,7 @@ accept various extension mnemonics. For example, @code{noraoint}, @code{nowrmsrns}, @code{nomsrlist}, +@code{noamx_fp16}, @code{noenqcmd}, @code{noserialize}, @code{notsxldtrk}, @@ -1549,7 +1551,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @samp{.ibt} @item @samp{.avx_ifma} @tab @samp{.avx_vnni_int8} @tab @samp{.avx_ne_convert} @item @samp{.cmpccxadd} @tab @samp{.raoint} @tab @samp{.wrmsrns} -@item @samp{.msrlist} +@item @samp{.msrlist} @tab @samp{.amx_fp16} @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote} @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq} @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk} diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 5da64b4076..9f5fa7f612 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -1173,6 +1173,9 @@ if [gas_64_check] then { run_dump_test "x86-64-wrmsrns-intel" run_dump_test "x86-64-msrlist" run_dump_test "x86-64-msrlist-intel" + run_dump_test "x86-64-amx-fp16" + run_dump_test "x86-64-amx-fp16-intel" + run_dump_test "x86-64-amx-fp16-bad" run_dump_test "x86-64-clzero" run_dump_test "x86-64-mwaitx-bdver4" run_list_test "x86-64-mwaitx-reg" diff --git a/gas/testsuite/gas/i386/x86-64-amx-fp16-bad.d b/gas/testsuite/gas/i386/x86-64-amx-fp16-bad.d new file mode 100644 index 0000000000..a53ebf486d --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-amx-fp16-bad.d @@ -0,0 +1,19 @@ +#as: +#objdump: -drw +#name: x86_64 Illegal AMX-FP16 insns +#source: x86-64-amx-fp16-bad.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <\.text>: +[ ]*[a-f0-9]+:[ ]*c4 e2 d3 5c[ ]*\(bad\)[ ]* +[ ]*[a-f0-9]+:[ ]*dc 90 90 90 90 90[ ]*fcoml.* +[ ]*[a-f0-9]+:[ ]*c4 e2 57 5c[ ]*\(bad\)[ ]* +[ ]*[a-f0-9]+:[ ]*dc 90 90 90 90 90[ ]*fcoml.* +[ ]*[a-f0-9]+:[ ]*c4 62 53 5c dc[ ]*tdpfp16ps %tmm5,%tmm4,\(bad\) +[ ]*[a-f0-9]+:[ ]*c4 c2 53 5c dc[ ]*tdpfp16ps %tmm5,\(bad\),%tmm3 +[ ]*[a-f0-9]+:[ ]*c4 e2 33 5c dc[ ]*tdpfp16ps \(bad\),%tmm4,%tmm3 +#pass diff --git a/gas/testsuite/gas/i386/x86-64-amx-fp16-bad.s b/gas/testsuite/gas/i386/x86-64-amx-fp16-bad.s new file mode 100644 index 0000000000..da5be1086e --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-amx-fp16-bad.s @@ -0,0 +1,35 @@ +# Check Illegal 64bit AMX-FP16 instructions + +.text + #tdpfp16ps %tmm5,%tmm4,%tmm3 set VEX.W = 1 (illegal value). + .byte 0xc4 + .byte 0xe2 + .byte 0xd3 + .byte 0x5c + .byte 0xdc + .fill 0x05, 0x01, 0x90 + #tdpfp16ps %tmm5,%tmm4,%tmm3 set VEX.L = 1 (illegal value). + .byte 0xc4 + .byte 0xe2 + .byte 0x57 + .byte 0x5c + .byte 0xdc + .fill 0x05, 0x01, 0x90 + #tdpfp16ps %tmm5,%tmm4,%tmm3 set VEX.R = 0 (illegal value). + .byte 0xc4 + .byte 0x62 + .byte 0x53 + .byte 0x5c + .byte 0xdc + #tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.B = 0 (illegal value). + .byte 0xc4 + .byte 0xc2 + .byte 0x53 + .byte 0x5c + .byte 0xdc + #tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.VVVV = 0110 (illegal value). + .byte 0xc4 + .byte 0xe2 + .byte 0x33 + .byte 0x5c + .byte 0xdc diff --git a/gas/testsuite/gas/i386/x86-64-amx-fp16-intel.d b/gas/testsuite/gas/i386/x86-64-amx-fp16-intel.d new file mode 100644 index 0000000000..497898b760 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-amx-fp16-intel.d @@ -0,0 +1,13 @@ +#as: +#objdump: -d -Mintel +#name: x86_64 AMX-FP16 insns (Intel disassembly) +#source: x86-64-amx-fp16.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*c4 e2 53 5c dc[ ]*tdpfp16ps tmm3,tmm4,tmm5 +[ ]*[a-f0-9]+:[ ]*c4 e2 53 5c dc[ ]*tdpfp16ps tmm3,tmm4,tmm5 diff --git a/gas/testsuite/gas/i386/x86-64-amx-fp16.d b/gas/testsuite/gas/i386/x86-64-amx-fp16.d new file mode 100644 index 0000000000..7d3af95a4d --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-amx-fp16.d @@ -0,0 +1,13 @@ +#as: +#objdump: -dw +#name: x86_64 AMX-FP16 insns +#source: x86-64-amx-fp16.s + +.*: +file format .* + + +Disassembly of section \.text: + +0+ <_start>: +[ ]*[a-f0-9]+:[ ]*c4 e2 53 5c dc[ ]*tdpfp16ps %tmm5,%tmm4,%tmm3 +[ ]*[a-f0-9]+:[ ]*c4 e2 53 5c dc[ ]*tdpfp16ps %tmm5,%tmm4,%tmm3 diff --git a/gas/testsuite/gas/i386/x86-64-amx-fp16.s b/gas/testsuite/gas/i386/x86-64-amx-fp16.s new file mode 100644 index 0000000000..5a007904ed --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-amx-fp16.s @@ -0,0 +1,9 @@ +# Check 64bit AMX-FP16 instructions + + .allow_index_reg + .text +_start: + tdpfp16ps %tmm5, %tmm4, %tmm3 + +.intel_syntax noprefix + tdpfp16ps tmm3, tmm4, tmm5 diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 0601bee877..be25d3f612 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -933,6 +933,7 @@ enum MOD_VEX_0F384B_X86_64_P_3_W_0, MOD_VEX_0F385A, MOD_VEX_0F385C_X86_64_P_1_W_0, + MOD_VEX_0F385C_X86_64_P_3_W_0, MOD_VEX_0F385E_X86_64_P_0_W_0, MOD_VEX_0F385E_X86_64_P_1_W_0, MOD_VEX_0F385E_X86_64_P_2_W_0, @@ -1399,6 +1400,7 @@ enum VEX_LEN_0F384B_X86_64_P_3_W_0_M_0, VEX_LEN_0F385A_M_0, VEX_LEN_0F385C_X86_64_P_1_W_0_M_0, + VEX_LEN_0F385C_X86_64_P_3_W_0_M_0, VEX_LEN_0F385E_X86_64_P_0_W_0_M_0, VEX_LEN_0F385E_X86_64_P_1_W_0_M_0, VEX_LEN_0F385E_X86_64_P_2_W_0_M_0, @@ -1565,6 +1567,7 @@ enum VEX_W_0F3859, VEX_W_0F385A_M_0_L_0, VEX_W_0F385C_X86_64_P_1, + VEX_W_0F385C_X86_64_P_3, VEX_W_0F385E_X86_64_P_0, VEX_W_0F385E_X86_64_P_1, VEX_W_0F385E_X86_64_P_2, @@ -4088,6 +4091,7 @@ static const struct dis386 prefix_table[][4] = { { Bad_Opcode }, { VEX_W_TABLE (VEX_W_0F385C_X86_64_P_1) }, { Bad_Opcode }, + { VEX_W_TABLE (VEX_W_0F385C_X86_64_P_3) }, }, /* PREFIX_VEX_0F385E_X86_64 */ @@ -7120,6 +7124,11 @@ static const struct dis386 vex_len_table[][2] = { { "tdpbf16ps", { TMM, EXtmm, VexTmm }, 0 }, }, + /* VEX_LEN_0F385C_X86_64_P_3_W_0_M_0 */ + { + { "tdpfp16ps", { TMM, EXtmm, VexTmm }, 0 }, + }, + /* VEX_LEN_0F385E_X86_64_P_0_W_0_M_0 */ { { "tdpbuud", {TMM, EXtmm, VexTmm }, 0 }, @@ -7788,6 +7797,10 @@ static const struct dis386 vex_w_table[][2] = { /* VEX_W_0F385C_X86_64_P_1 */ { MOD_TABLE (MOD_VEX_0F385C_X86_64_P_1_W_0) }, }, + { + /* VEX_W_0F385C_X86_64_P_3 */ + { MOD_TABLE (MOD_VEX_0F385C_X86_64_P_3_W_0) }, + }, { /* VEX_W_0F385E_X86_64_P_0 */ { MOD_TABLE (MOD_VEX_0F385E_X86_64_P_0_W_0) }, @@ -8610,6 +8623,11 @@ static const struct dis386 mod_table[][2] = { { Bad_Opcode }, { VEX_LEN_TABLE (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0) }, }, + { + /* MOD_VEX_0F385C_X86_64_P_3_W_0 */ + { Bad_Opcode }, + { VEX_LEN_TABLE (VEX_LEN_0F385C_X86_64_P_3_W_0_M_0) }, + }, { /* MOD_VEX_0F385E_X86_64_P_0_W_0 */ { Bad_Opcode }, diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index eac229e54d..d10b462548 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -259,6 +259,8 @@ static initializer cpu_flag_init[] = "CpuWRMSRNS" }, { "CPU_MSRLIST_FLAGS", "CpuMSRLIST" }, + { "CPU_AMX_FP16_FLAGS", + "CpuAMX_FP16" }, { "CPU_IAMCU_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuIAMCU" }, { "CPU_ADX_FLAGS", @@ -426,7 +428,7 @@ static initializer cpu_flag_init[] = { "CPU_ANY_AMX_BF16_FLAGS", "CpuAMX_BF16" }, { "CPU_ANY_AMX_TILE_FLAGS", - "CpuAMX_TILE|CpuAMX_INT8|CpuAMX_BF16" }, + "CpuAMX_TILE|CpuAMX_INT8|CpuAMX_BF16|CpuAMX_FP16" }, { "CPU_ANY_AVX_VNNI_FLAGS", "CpuAVX_VNNI" }, { "CPU_ANY_MOVDIRI_FLAGS", @@ -467,6 +469,8 @@ static initializer cpu_flag_init[] = "CpuWRMSRNS" }, { "CPU_ANY_MSRLIST_FLAGS", "CpuMSRLIST" }, + { "CPU_ANY_AMX_FP16_FLAGS", + "CpuAMX_FP16" }, }; static initializer operand_type_init[] = @@ -675,6 +679,7 @@ static bitfield cpu_flags[] = BITFIELD (CpuRAOINT), BITFIELD (CpuWRMSRNS), BITFIELD (CpuMSRLIST), + BITFIELD (CpuAMX_FP16), BITFIELD (CpuMWAITX), BITFIELD (CpuCLZERO), BITFIELD (CpuOSPKE), diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 75c23aaec6..0dec14e365 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -223,6 +223,8 @@ enum CpuWRMSRNS, /* Intel MSRLIST Instructions support required. */ CpuMSRLIST, + /* AMX-FP16 instructions required */ + CpuAMX_FP16, /* mwaitx instruction required */ CpuMWAITX, /* Clzero instruction required */ @@ -409,6 +411,7 @@ typedef union i386_cpu_flags unsigned int cpuraoint:1; unsigned int cpuwrmsrns:1; unsigned int cpumsrlist:1; + unsigned int cpuamx_fp16:1; unsigned int cpumwaitx:1; unsigned int cpuclzero:1; unsigned int cpuospke:1; diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 0dd7106a1c..95bb2fc1fd 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -3339,3 +3339,9 @@ rdmsrlist, 0xf20f01c6, None, CpuMSRLIST|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|N wrmsrlist, 0xf30f01c6, None, CpuMSRLIST|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {} // MSRLIST instructions end. + +// AMX-FP16 instructions. + +tdpfp16ps, 0xf25c, None, CpuAMX_FP16|Cpu64, Modrm|Vex128|Space0F38|VexVVVV=1|VexW0|SwapSources|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegTMM, RegTMM, RegTMM } + +// AMX-FP16 instructions end.