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Show patches with
: Submitter =
Nelson Chu
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| 36 patches
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Date
Submitter
Delegate
State
RISC-V: Support B, Zaamo and Zalrsc extensions.
RISC-V: Support B, Zaamo and Zalrsc extensions.
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1
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2024-02-05
Nelson Chu
Unresolved
RISC-V: Don't generate branch/jump relocation if symbol is local when no-relax.
RISC-V: Don't generate branch/jump relocation if symbol is local when no-relax.
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1
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2024-01-29
Nelson Chu
Accepted
RISC-V: PR31179, The SET/ADD/SUB fix breaks ABI compatibility with 2.41 objects
RISC-V: PR31179, The SET/ADD/SUB fix breaks ABI compatibility with 2.41 objects
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1
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2023-12-20
Nelson Chu
Unresolved
[committed] RISC-V/gas: Clarify the definition of `relaxable' in md_apply_fix
[committed] RISC-V/gas: Clarify the definition of `relaxable' in md_apply_fix
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1
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2023-12-11
Nelson Chu
Accepted
[committed] RISC-V: Make sure rv32q conflict won't affect the fp-q-insns-32 gas testcase.
[committed] RISC-V: Make sure rv32q conflict won't affect the fp-q-insns-32 gas testcase.
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1
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2023-11-06
Nelson Chu
Unresolved
[committed] RISC-V: Moved out linker internal relocations after R_RISCV_max.
[committed] RISC-V: Moved out linker internal relocations after R_RISCV_max.
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1
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2023-11-06
Nelson Chu
Unresolved
RISC-V: Dump instruction without checking architecture support as usual.
RISC-V: Dump instruction without checking architecture support as usual.
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1
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2023-10-27
Nelson Chu
Accepted
RISC-V: Clarify the behaviors of SET/ADD/SUB relocations.
RISC-V: Clarify the behaviors of SET/ADD/SUB relocations.
1 - -
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1
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2023-10-19
Nelson Chu
Unresolved
[committed] RISC-V: Don't do undefweak relaxations for the linker_def symbols.
[committed] RISC-V: Don't do undefweak relaxations for the linker_def symbols.
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1
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2023-10-19
Nelson Chu
Accepted
[committed] RISC-V: Make sure rv32q conflict won't affect the zfa gas testcases.
[committed] RISC-V: Make sure rv32q conflict won't affect the zfa gas testcases.
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1
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2023-10-18
Nelson Chu
Unresolved
RISC-V: Support Tag_RISCV_x3_reg_usage.
RISC-V: Support Tag_RISCV_x3_reg_usage.
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1
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2023-09-15
Nelson Chu
Accepted
[Committed] RISC-V: Clarify the naming rules of vendor operands.
[Committed] RISC-V: Clarify the naming rules of vendor operands.
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1
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2023-09-07
Nelson Chu
Unresolved
[Committed] RISC-V: Report "c or zca" for INSN_CLASS_C when error reporting.
[Committed] RISC-V: Report "c or zca" for INSN_CLASS_C when error reporting.
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1
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2023-08-18
Nelson Chu
Accepted
RISC-V: PR29823, defined the missing elf_backend_obj_attrs_handle_unknown.
RISC-V: PR29823, defined the missing elf_backend_obj_attrs_handle_unknown.
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1
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2023-06-09
Nelson Chu
Accepted
[PR,ld/22263] RISC-V: Avoid spurious R_RISCV_NONE for pr22263-1 test.
[PR,ld/22263] RISC-V: Avoid spurious R_RISCV_NONE for pr22263-1 test.
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1
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2023-05-27
Nelson Chu
Unresolved
RISC-V: Support subtraction of .uleb128.
RISC-V: Support subtraction of .uleb128.
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1
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2023-05-18
Nelson Chu
Unresolved
RISC-V: PR27566, consider ELF_MAXPAGESIZE/COMMONPAGESIZE for gp relaxations.
RISC-V: PR27566, consider ELF_MAXPAGESIZE/COMMONPAGESIZE for gp relaxations.
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1
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2023-05-12
Nelson Chu
Unresolved
[PR,ld/22263,PR,ld/25694] RISC-V: Avoid dynamic TLS relocs in PIE.
[PR,ld/22263,PR,ld/25694] RISC-V: Avoid dynamic TLS relocs in PIE.
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1
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2023-05-04
Nelson Chu
Accepted
RISC-V: Minor improvements for dis-assembler.
RISC-V: Minor improvements for dis-assembler.
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1
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2023-05-04
Nelson Chu
Accepted
[2/2] RISC-V: Enable x0 base relaxation for relax_pc even if --no-relax-gp.
[1/2] RISC-V: Relax R_RISCV_[PCREL_]LO12_I/S to R_RISCV_GPREL_I/S for undefined weak.
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1
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2023-04-21
Nelson Chu
Unresolved
[1/2] RISC-V: Relax R_RISCV_[PCREL_]LO12_I/S to R_RISCV_GPREL_I/S for undefined weak.
[1/2] RISC-V: Relax R_RISCV_[PCREL_]LO12_I/S to R_RISCV_GPREL_I/S for undefined weak.
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1
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2023-04-21
Nelson Chu
Unresolved
RISC-V: Optimize relaxation of gp with max_alignment.
RISC-V: Optimize relaxation of gp with max_alignment.
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1
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2023-04-17
Nelson Chu
Accepted
[3/3] RISC-V: PR28789, Reject R_RISCV_PCREL relocations with ABS symbol in PIC/PIE.
[1/3] RISC-V: Extract the ld code which are too complicated, and may be reused.
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1
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2023-03-25
Nelson Chu
Accepted
[2/3] RISC-V: Clarify link behaviors of R_RISCV_32/64 relocations with ABS symbol.
[1/3] RISC-V: Extract the ld code which are too complicated, and may be reused.
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1
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2023-03-25
Nelson Chu
Accepted
[1/3] RISC-V: Extract the ld code which are too complicated, and may be reused.
[1/3] RISC-V: Extract the ld code which are too complicated, and may be reused.
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1
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2023-03-25
Nelson Chu
Accepted
RISC-V: Clarify link behaviors of R_RISCV_32/64 relocations with ABS symbol.
RISC-V: Clarify link behaviors of R_RISCV_32/64 relocations with ABS symbol.
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1
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2023-03-17
Nelson Chu
Accepted
RISC-V: Segment fault in riscv_elf_append_rela.
RISC-V: Segment fault in riscv_elf_append_rela.
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1
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2023-03-09
Nelson Chu
Accepted
RISC-V: Relax the order checking for the architecture string.
RISC-V: Relax the order checking for the architecture string.
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1
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2022-12-21
Nelson Chu
Accepted
[2/2] RISC-V: Clarify the suppress rule of mapping symbol with architecture string.
[1/2] RISC-V: File-level architecture shouldn't be affected by section-level ones.
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1
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2022-11-04
Nelson Chu
Accepted
[1/2] RISC-V: File-level architecture shouldn't be affected by section-level ones.
[1/2] RISC-V: File-level architecture shouldn't be affected by section-level ones.
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1
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2022-11-04
Nelson Chu
Accepted
[committed] RISC-V: Fixed the missing $x+arch when adding odd paddings for alignment.
[committed] RISC-V: Fixed the missing $x+arch when adding odd paddings for alignment.
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1
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2022-11-02
Nelson Chu
Repeat Merge
[committed] RISC-V: Always generate mapping symbols at the start of the sections.
[committed] RISC-V: Always generate mapping symbols at the start of the sections.
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1
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2022-10-29
Nelson Chu
Repeat Merge
RISC-V: Added SiFive custom cache control extensions.
RISC-V: Added SiFive custom cache control extensions.
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1
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2022-10-28
Nelson Chu
Accepted
[committed] RISC-V: Fix build failures for -Werror=sign-compare.
[committed] RISC-V: Fix build failures for -Werror=sign-compare.
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1
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2022-10-27
Nelson Chu
Repeat Merge
[committed,2/2] RISC-V: Should reset `again' flag for _bfd_riscv_relax_pc.
[committed,1/2] RISC-V: Improve link time complexity.
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1
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2022-10-25
Nelson Chu
Unresolved
[committed,1/2] RISC-V: Improve link time complexity.
[committed,1/2] RISC-V: Improve link time complexity.
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1
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2022-10-25
Nelson Chu
Unresolved