Show patches with: Archived = No       |   3267 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[8/8] section-select: Fix exclude-file-3 ld: Speed up section selection - - - -1- 2022-11-25 Michael Matz Unresolved
[7/8] section-select: Remove bfd_max_section_id again ld: Speed up section selection - - - -1- 2022-11-25 Michael Matz Unresolved
[6/8] section-select: Cleanup ld: Speed up section selection - - - -1- 2022-11-25 Michael Matz Unresolved
[5/8] section-select: Remove unused code ld: Speed up section selection - - - -1- 2022-11-25 Michael Matz Unresolved
[4/8] section-select: Completely rebuild matches ld: Speed up section selection - - - -1- 2022-11-25 Michael Matz Unresolved
[3/8] section-select: Implement a prefix-tree ld: Speed up section selection - - - -1- 2022-11-25 Michael Matz Unresolved
[2/8] section-select: Deal with sections added late ld: Speed up section selection - - - 1-- 2022-11-25 Michael Matz Accepted
[1/8] section-select: Lazily resolve section matches ld: Speed up section selection - - - 1-- 2022-11-25 Michael Matz Accepted
Only use wild_sort_fast Only use wild_sort_fast - - - 1-- 2022-11-25 Michael Matz Accepted
Special case more simple patterns Special case more simple patterns - - - 1-- 2022-11-25 Michael Matz Accepted
Fix msp430 section name scribbling and tests Fix msp430 section name scribbling and tests - - - 1-- 2022-11-25 Michael Matz Accepted
[v4,3/3] RISC-V: Better support for long instructions (tests) RISC-V: Better support for long instructions (64 < x <= 176 [bits]) - - - 1-- 2022-11-25 Tsukasa OI Accepted
[v4,2/3] RISC-V: Better support for long instructions (assembler) RISC-V: Better support for long instructions (64 < x <= 176 [bits]) - - - 1-- 2022-11-25 Tsukasa OI Accepted
[v4,1/3] RISC-V: Better support for long instructions (disassembler) RISC-V: Better support for long instructions (64 < x <= 176 [bits]) - - - 1-- 2022-11-25 Tsukasa OI Accepted
[v3,1/3] RISC-V: Better support for long instructions (disassembler) RISC-V: Better support for long instructions (64 < x <= 176 [bits]) - - - 1-- 2022-11-25 Tsukasa OI Accepted
Arm: .noinit and .persistent are not supported for Linux targets Arm: .noinit and .persistent are not supported for Linux targets - - - 1-- 2022-11-25 Jan Beulich Accepted
ld: Write DEBUG_S_FILECHKSMS entries in PDBs ld: Write DEBUG_S_FILECHKSMS entries in PDBs - - - -1- 2022-11-25 Mark Harmstone Unresolved
[v2] ld: Generate PDB string table [v2] ld: Generate PDB string table - - - 1-- 2022-11-25 Mark Harmstone Accepted
[v3,2/2] RISC-V: Better support for long instructions (assembler) RISC-V: Better support for long instructions (64 < x <= 176 [bits]) - - - 1-- 2022-11-25 Tsukasa OI Accepted
[v3,1/2] RISC-V: Better support for long instructions (disassembler) RISC-V: Better support for long instructions (64 < x <= 176 [bits]) - - - 1-- 2022-11-25 Tsukasa OI Accepted
[v4] Add support for nanoMIPS architecture [v4] Add support for nanoMIPS architecture - - - 1-- 2022-11-24 Aleksandar Rikalo Accepted
Commit: Fix compile time warnings in conftest.c files Commit: Fix compile time warnings in conftest.c files - - - -1- 2022-11-24 Nick Clifton Repeat Merge
[PUSHED] readelf: Do not require EI_OSABI for IFUNC. [PUSHED] readelf: Do not require EI_OSABI for IFUNC. - - - -1- 2022-11-24 Martin Liška Repeat Merge
[3/3] x86: clean up after removal of support for gcc <= 2.8.1 x86: FPU insn handling simplifications - - - 1-- 2022-11-24 Jan Beulich Accepted
[2/3] x86: drop FloatR x86: FPU insn handling simplifications - - - 1-- 2022-11-24 Jan Beulich Accepted
[1/3] x86: extend FPU test coverage for AT&T / Intel mnemonic differences x86: FPU insn handling simplifications - - - 1-- 2022-11-24 Jan Beulich Accepted
Tidy objdump printing of section size Tidy objdump printing of section size - - - -1- 2022-11-24 Alan Modra Repeat Merge
Constify nm format array Constify nm format array - - - -1- 2022-11-24 Alan Modra Repeat Merge
PR16995, m68k coldfire emac immediate to macsr incorrect disassembly PR16995, m68k coldfire emac immediate to macsr incorrect disassembly - - - -1- 2022-11-24 Alan Modra Repeat Merge
ld: Generate PDB string table ld: Generate PDB string table - - - 1-- 2022-11-24 Mark Harmstone Accepted
[V2] sframe/doc: remove usage of xrefautomaticsectiontitle [V2] sframe/doc: remove usage of xrefautomaticsectiontitle - - - 1-- 2022-11-24 Indu Bhagat Accepted
gas: Disable --gcodeview on PE targets with no O_secrel gas: Disable --gcodeview on PE targets with no O_secrel - - - 1-- 2022-11-23 Mark Harmstone Accepted
PR22509 - Null pointer dereference on coff_slurp_reloc_table PR22509 - Null pointer dereference on coff_slurp_reloc_table - - - -1- 2022-11-23 Alan Modra Repeat Merge
asan: NULL deref in filter_symbols asan: NULL deref in filter_symbols - - - -1- 2022-11-23 Alan Modra Repeat Merge
[3/3] x86: widen applicability and use of CheckRegSize x86: correct checking of matching operand sizes - - - 1-- 2022-11-23 Jan Beulich Accepted
[2/3] x86: add missing CheckRegSize x86: correct checking of matching operand sizes - - - 1-- 2022-11-23 Jan Beulich Accepted
[1/3] x86: correct handling of LAR and LSL x86: correct checking of matching operand sizes - - - 1-- 2022-11-23 Jan Beulich Accepted
[v2,2/2] RISC-V: Better support for long instructions RISC-V: Better support for long instructions (64 < x <= 176 [bits]) - - - 1-- 2022-11-23 Tsukasa OI Accepted
[v2,1/2] RISC-V: Make .insn tests stricter RISC-V: Better support for long instructions (64 < x <= 176 [bits]) - - - 1-- 2022-11-23 Tsukasa OI Accepted
sframe/doc: remove usage of xrefautomaticsectiontitle sframe/doc: remove usage of xrefautomaticsectiontitle - - - 1-- 2022-11-22 Indu Bhagat Accepted
x86: Don't define _TLS_MODULE_BASE_ for ld -r x86: Don't define _TLS_MODULE_BASE_ for ld -r - - - -1- 2022-11-22 H.J. Lu Repeat Merge
Don't use "long" in readelf for file offsets Don't use "long" in readelf for file offsets - - - -1- 2022-11-22 Alan Modra Repeat Merge
x86: Remove libopcodes dependency x86: Remove libopcodes dependency - - - 1-- 2022-11-22 H.J. Lu Accepted
[PUSHED] opcodes: Correct address for ARC's "isa_config" aux reg [PUSHED] opcodes: Correct address for ARC's "isa_config" aux reg - - - -1- 2022-11-22 Shahab Vahedi Repeat Merge
[v3] riscv: Add AIA extension support (Smaia, Ssaia) [v3] riscv: Add AIA extension support (Smaia, Ssaia) - - - 1-- 2022-11-22 Christoph Müllner Accepted
PR29807, SIGSEGV when linking fuzzed PE object PR29807, SIGSEGV when linking fuzzed PE object - - - -1- 2022-11-21 Alan Modra Repeat Merge
opcodes: Correct address for ARC's "isa_config" aux reg opcodes: Correct address for ARC's "isa_config" aux reg - - - 1-- 2022-11-21 Shahab Vahedi Accepted
[v2] RISC-V: Make R_RISCV_SUB6 conforms to riscv ABI standard [v2] RISC-V: Make R_RISCV_SUB6 conforms to riscv ABI standard - - - 1-- 2022-11-21 Xiao Zeng Accepted
[v3] Add support for nanoMIPS architecture [v3] Add support for nanoMIPS architecture - - - 1-- 2022-11-21 Aleksandar Rikalo Accepted
[v3,3/3] gdb/testsuite: RISC-V disassembler option tests RISC-V: Add overridable "priv-spec" and "arch" disassembler options - - - -1- 2022-11-20 Tsukasa OI Unresolved
[v3,2/3] RISC-V: Add "arch" disassembler option RISC-V: Add overridable "priv-spec" and "arch" disassembler options - - - -1- 2022-11-20 Tsukasa OI Unresolved
[v3,1/3] RISC-V: Make "priv-spec" overridable RISC-V: Add overridable "priv-spec" and "arch" disassembler options - - - -1- 2022-11-20 Tsukasa OI Unresolved
[3/3] RISC-V: Optimized search on mapping symbols RISC-V: Disassembler Core Optimization 1-2 (Mapping symbols) - - - -1- 2022-11-20 Tsukasa OI Unresolved
[2/3] RISC-V: Per-section private data initialization RISC-V: Disassembler Core Optimization 1-2 (Mapping symbols) - - - -1- 2022-11-20 Tsukasa OI Unresolved
[1/3] RISC-V: Easy optimization on riscv_search_mapping_symbol RISC-V: Disassembler Core Optimization 1-2 (Mapping symbols) - - - -1- 2022-11-20 Tsukasa OI Unresolved
[3/3] RISC-V: Cache instruction support RISC-V: Disassembler Core Optimization 1-1 (Hash table and Caching) - - - -1- 2022-11-20 Tsukasa OI Unresolved
[2/3] RISC-V: Fallback on faster hash table RISC-V: Disassembler Core Optimization 1-1 (Hash table and Caching) - - - -1- 2022-11-20 Tsukasa OI Unresolved
[1/3] RISC-V: Use faster hash table on disassembling RISC-V: Disassembler Core Optimization 1-1 (Hash table and Caching) - - - -1- 2022-11-20 Tsukasa OI Unresolved
[2/2] RISC-V: Better support for long instructions RISC-V: Better support for long instructions (64 < x <= 176 [bits]) - - - 1-- 2022-11-19 Tsukasa OI Accepted
[1/2] RISC-V: Make .insn tests stricter RISC-V: Better support for long instructions (64 < x <= 176 [bits]) - - - 1-- 2022-11-19 Tsukasa OI Accepted
[v2,4/4] x86: drop sentinel from i386_optab[] x86: break gas dependency on libopcodes - - - 1-- 2022-11-18 Jan Beulich Accepted
[v2,3/4] x86: break gas dependency on libopcodes x86: break gas dependency on libopcodes - - - 1-- 2022-11-18 Jan Beulich Accepted
[v2,2/4] x86: remove i386-opc.c x86: break gas dependency on libopcodes - - - 1-- 2022-11-18 Jan Beulich Accepted
[v2,1/4] x86: instantiate i386_{op, reg}tab[] in gas instead of in libopcodes x86: break gas dependency on libopcodes - - - 1-- 2022-11-18 Jan Beulich Accepted
[v4,8/8] RISC-V: Use defined mask and match values RISC-V: Various opcode tidying (batch 1) - - - 1-- 2022-11-18 Tsukasa OI Accepted
[v4,7/8] RISC-V: Make alias instructions aliases RISC-V: Various opcode tidying (batch 1) - - - 1-- 2022-11-18 Tsukasa OI Accepted
[v4,6/8] RISC-V: Tidying up with fmv.w.x and fmv.x.w RISC-V: Various opcode tidying (batch 1) - - - 1-- 2022-11-18 Tsukasa OI Accepted
[v4,5/8] RISC-V: Complete tidying up with SCALL and SBREAK RISC-V: Various opcode tidying (batch 1) - - - 1-- 2022-11-18 Tsukasa OI Accepted
[v4,4/8] RISC-V: Remove unused instruction macros RISC-V: Various opcode tidying (batch 1) - - - 1-- 2022-11-18 Tsukasa OI Accepted
[v4,3/8] RISC-V: Remove spaces in opcode entries RISC-V: Various opcode tidying (batch 1) - - - 1-- 2022-11-18 Tsukasa OI Accepted
[v4,2/8] RISC-V: Fix obvious misalignments ('Zbb'/'Zba') RISC-V: Various opcode tidying (batch 1) - - - 1-- 2022-11-18 Tsukasa OI Accepted
[v4,1/8] RISC-V: Add a space at the end of pinfo RISC-V: Various opcode tidying (batch 1) - - - 1-- 2022-11-18 Tsukasa OI Accepted
RISC-V: Add INSN_DREF to memory read/write instructions RISC-V: Add INSN_DREF to memory read/write instructions - - - 1-- 2022-11-18 Tsukasa OI Accepted
PR29799 heap buffer overflow in display_gdb_index dwarf.c:10548 PR29799 heap buffer overflow in display_gdb_index dwarf.c:10548 - - - -1- 2022-11-18 Alan Modra Repeat Merge
go32 sanity check go32 sanity check - - - -1- 2022-11-18 Alan Modra Repeat Merge
riscv: Add AIA extension support (Smaia, Ssaia) riscv: Add AIA extension support (Smaia, Ssaia) - - - 1-- 2022-11-18 Christoph Müllner Accepted
binutils: partially revert 17c6c3b99156fe82c1e637e1a5fd9f163ac788c8 binutils: partially revert 17c6c3b99156fe82c1e637e1a5fd9f163ac788c8 - - - 1-- 2022-11-17 徐持恒 Xu Chiheng Accepted
i386: Move i386_seg_prefixes to gas i386: Move i386_seg_prefixes to gas - - - -1- 2022-11-17 H.J. Lu Repeat Merge
readelf: use fseeko64 or fseeko if possible readelf: use fseeko64 or fseeko if possible - - - 1-- 2022-11-17 Brett Werling Accepted
[2/2] x86: break gas dependency on libopcodes x86: break gas dependency on libopcodes - - - 1-- 2022-11-17 Jan Beulich Accepted
[1/2] x86: instantiate i386_{op, reg}tab[] in gas instead of in libopcodes x86: break gas dependency on libopcodes - - - 1-- 2022-11-17 Jan Beulich Accepted
[V2,gas,aarch64] : fix build breakage for aarch64-pe [V2,gas,aarch64] : fix build breakage for aarch64-pe - - - 1-- 2022-11-17 Indu Bhagat Accepted
[gas,aarch64] : fix build breakage for aarch64-pe [gas,aarch64] : fix build breakage for aarch64-pe - - - 1-- 2022-11-16 Indu Bhagat Accepted
ld: Always call elf_backend_output_arch_local_syms ld: Always call elf_backend_output_arch_local_syms - - - 1-- 2022-11-16 H.J. Lu Accepted
PR29788, gprofng cannot display Java's generated assembly code PR29788, gprofng cannot display Java's generated assembly code - - - 1-- 2022-11-16 Vladimir Mezentsev Accepted
aarch64-pe can't fill 16 bytes in section .text aarch64-pe can't fill 16 bytes in section .text - - - -1- 2022-11-15 Alan Modra Repeat Merge
readelf: use fseeko64 or fseeko if possible readelf: use fseeko64 or fseeko if possible - - - 1-- 2022-11-15 Brett Werling Accepted
[v1,1/1] RISC-V: Make R_RISCV_SUB6 conforms to riscv abi standard RISC-V: Make R_RISCV_SUB6 conforms to riscv abi standard - 1 - 1-- 2022-11-15 Xiao Zeng Accepted
[11/11] RISC-V: Move disassembler private data initialization RISC-V: Requirements for disassembler optimizations batch 1 - - - 1-- 2022-11-15 Tsukasa OI Accepted
[10/11] RISC-V: Reorganize arch-related initialization and management RISC-V: Requirements for disassembler optimizations batch 1 - - - 1-- 2022-11-15 Tsukasa OI Accepted
[09/11] RISC-V: Reorganize disassembler state initialization RISC-V: Requirements for disassembler optimizations batch 1 - - - 1-- 2022-11-15 Tsukasa OI Accepted
[08/11] RISC-V: Split match/print steps on disassembler RISC-V: Requirements for disassembler optimizations batch 1 - - - 1-- 2022-11-15 Tsukasa OI Accepted
[07/11] opcodes/riscv-dis.c: Add form feed for separation RISC-V: Requirements for disassembler optimizations batch 1 - - - 1-- 2022-11-15 Tsukasa OI Accepted
[06/11] RISC-V: Use static xlen on ADDIW sequence RISC-V: Requirements for disassembler optimizations batch 1 - - - 1-- 2022-11-15 Tsukasa OI Accepted
[05/11] RISC-V: One time CSR hash table initialization RISC-V: Requirements for disassembler optimizations batch 1 - - - 1-- 2022-11-15 Tsukasa OI Accepted
[04/11] RISC-V: Split riscv_get_map_state into two steps RISC-V: Requirements for disassembler optimizations batch 1 - - - 1-- 2022-11-15 Tsukasa OI Accepted
[03/11] RISC-V: Make mapping symbol checking consistent RISC-V: Requirements for disassembler optimizations batch 1 - - - 1-- 2022-11-15 Tsukasa OI Accepted
[02/11] RISC-V: Add test for 'Zfinx' register switching RISC-V: Requirements for disassembler optimizations batch 1 - - - 1-- 2022-11-15 Tsukasa OI Accepted
[01/11] opcodes/riscv-dis.c: More tidying RISC-V: Requirements for disassembler optimizations batch 1 - - - 1-- 2022-11-15 Tsukasa OI Accepted
[v3,8/8] RISC-V: Use defined mask and match values RISC-V: Various opcode tidying (batch 1) - - - 1-- 2022-11-15 Tsukasa OI Accepted
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