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Patch
Series
A/R/T
S/W/F
Date
Submitter
Delegate
State
[v2,4/5] LoongArch: gas: Add support for tls le relax.
LoongArch tls le model linker relaxation support.
- - -
-
1
-
2023-12-02
changjiachen
Unresolved
[v2,3/5] LoongArch: opcodes: Add support for tls le relax.
LoongArch tls le model linker relaxation support.
- - -
-
1
-
2023-12-02
changjiachen
Unresolved
[v2,2/5] LoongArch: include: Add support for tls le relax.
LoongArch tls le model linker relaxation support.
- - -
-
1
-
2023-12-02
changjiachen
Unresolved
[v2,1/5] LoongArch: bfd: Add support for tls le relax.
LoongArch tls le model linker relaxation support.
- - -
-
1
-
2023-12-02
changjiachen
Unresolved
Fix ld/x86: reduce testsuite dependency on system object files
Fix ld/x86: reduce testsuite dependency on system object files
- - -
-
1
-
2023-12-01
H.J. Lu
Unresolved
[2/2] x86: fold assembly dialect attributes
x86: assembly dialect tidying
- - -
-
1
-
2023-12-01
Jan Beulich
Unresolved
[v1,5/5] LoongArch: ld: Add support for tls le relax.
LoongArch tls le model linker relaxation support.
- - -
-
1
-
2023-12-01
changjiachen
Unresolved
[v1,4/5] LoongArch: gas: Add support for tls le relax.
LoongArch tls le model linker relaxation support.
- - -
-
1
-
2023-12-01
changjiachen
Unresolved
[v1,3/5] LoongArch: opcodes: Add support for tls le relax.
LoongArch tls le model linker relaxation support.
- - -
-
1
-
2023-12-01
changjiachen
Unresolved
[v1,2/5] LoongArch: include: Add support for tls le relax.
LoongArch tls le model linker relaxation support.
- - -
-
1
-
2023-12-01
changjiachen
Unresolved
[v1,1/5] LoongArch: bfd: Add support for tls le relax.
LoongArch tls le model linker relaxation support.
- - -
-
1
-
2023-12-01
changjiachen
Unresolved
[v1,4/4] LoongArch: Add testsuits for TLSDESC in gas and ld.
LoongArch: Add support for TLS Descriptors (TLSDESC)
- - -
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1
-
2023-12-01
Lulu Cai
Unresolved
[v1,3/4] LoongArch: Add transition support for DESC to LE.
LoongArch: Add support for TLS Descriptors (TLSDESC)
- - -
-
1
-
2023-12-01
Lulu Cai
Unresolved
[v1,2/4] LoongArch: Add support for TLSDESC in ld.
LoongArch: Add support for TLS Descriptors (TLSDESC)
- - -
-
1
-
2023-12-01
Lulu Cai
Unresolved
[v1,1/4] LoongArch: Add new relocs and macro for TLSDESC.
LoongArch: Add support for TLS Descriptors (TLSDESC)
- - -
-
1
-
2023-12-01
Lulu Cai
Unresolved
Arm64: fix build for certain gcc versions
Arm64: fix build for certain gcc versions
- - -
-
1
-
2023-12-01
Jan Beulich
Unresolved
ld: fix build with old makeinfo
ld: fix build with old makeinfo
- - -
-
1
-
2023-12-01
Jan Beulich
Unresolved
binutils/Dwarf: avoid "shadowing" of glibc function name
binutils/Dwarf: avoid "shadowing" of glibc function name
- - -
-
1
-
2023-12-01
Jan Beulich
Unresolved
RISC-V: Make riscv_is_mapping_symbol stricter
RISC-V: Make riscv_is_mapping_symbol stricter
- - -
-
1
-
2023-12-01
Patrick O'Neill
Unresolved
[v1,2/2] LoongArch: Add call and tail pseudo instructions
Add new relocation R_LARCH_CALL36
- - -
-
1
-
2023-11-30
mengqinggang
Unresolved
[v1,1/2] LoongArch: Add new relocation R_LARCH_CALL36
Add new relocation R_LARCH_CALL36
- - -
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1
-
2023-11-30
mengqinggang
Unresolved
[COMMITTED] gas: support double-slash line comments in BPF assembly
[COMMITTED] gas: support double-slash line comments in BPF assembly
- - -
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1
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2023-11-30
Jose E. Marchesi
Unresolved
[v3] RISC-V: Avoid updating state until symbol is found
[v3] RISC-V: Avoid updating state until symbol is found
- - -
-
1
-
2023-11-30
Patrick O'Neill
Unresolved
s390: Support for jump visualization in disassembly
s390: Support for jump visualization in disassembly
- 1 -
-
1
-
2023-11-29
Jens Remus
Unresolved
gprofng: updated man pages and user guide
gprofng: updated man pages and user guide
- - -
-
1
-
2023-11-28
Vladimir Mezentsev
Unresolved
[COMMITTED] gas: change meaning of ; in the BPF assembler
[COMMITTED] gas: change meaning of ; in the BPF assembler
- - -
-
1
-
2023-11-28
Jose E. Marchesi
Unresolved
[v3,5/9] RISC-V: Initial ld.bfd support for TLSDESC.
RISC-V: Implement TLS Descriptors.
- - -
-
1
-
2023-11-28
Tatsuyuki Ishi
Unresolved
[v3,4/9] RISC-V: Define and use GOT entry size constants for TLS.
RISC-V: Implement TLS Descriptors.
- - -
-
1
-
2023-11-28
Tatsuyuki Ishi
Unresolved
[v3,3/9] RISC-V: Add assembly support for TLSDESC.
RISC-V: Implement TLS Descriptors.
- - -
-
1
-
2023-11-28
Tatsuyuki Ishi
Unresolved
[v3,2/9] RISC-V: Add TLSDESC reloc definitions.
RISC-V: Implement TLS Descriptors.
- - -
-
1
-
2023-11-28
Tatsuyuki Ishi
Unresolved
RISC-V: Supports Zcmt extension.
RISC-V: Supports Zcmt extension.
- - -
-
1
-
2023-11-28
Jiawei
Unresolved
LoongArch: Add R_LARCH_ALIGN_MAX relocation
LoongArch: Add R_LARCH_ALIGN_MAX relocation
- - -
-
1
-
2023-11-28
mengqinggang
Unresolved
Support APX PUSHP/POPP
Support APX PUSHP/POPP
- - -
-
1
-
2023-11-27
Cui, Lili
Unresolved
[2/2] testsuite: Clean up .allow_index_reg in i386 tests
testsuite: Clean up i386 tests
- - -
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1
-
2023-11-27
Jiang, Haochen
Unresolved
[1/2] testsuite: Clean up #as in dump file for i386 tests
testsuite: Clean up i386 tests
- - -
-
1
-
2023-11-27
Jiang, Haochen
Unresolved
[v2] RISC-V: Imply 'Zicntr' and 'Zihpm' implicitly depended on 'Zicsr'
[v2] RISC-V: Imply 'Zicntr' and 'Zihpm' implicitly depended on 'Zicsr'
- - -
-
1
-
2023-11-27
Xiao Zeng
Unresolved
RISC-V: Imply 'Zicsr' from 'Zicntr' and 'Zihpm'
RISC-V: Imply 'Zicsr' from 'Zicntr' and 'Zihpm'
- - -
-
1
-
2023-11-27
Xiao Zeng
Unresolved
libiberty, ld: Use x86 HW optimized sha1
libiberty, ld: Use x86 HW optimized sha1
- - -
-
1
-
2023-11-25
Jakub Jelinek
Unresolved
[Binutils] AArch64: Enable Debug (FEAT_DEBUGv8p9) extension
[Binutils] AArch64: Enable Debug (FEAT_DEBUGv8p9) extension
- - -
-
1
-
2023-11-24
Saurabh Jha
Unresolved
x86: allow 32-bit reg to be used with U{RD,WR}MSR
x86: allow 32-bit reg to be used with U{RD,WR}MSR
- - -
-
1
-
2023-11-24
Jan Beulich
Unresolved
[6/6] gas: drop unused fields from struct segment_info_struct
correct and further utilize x86'es last-insn tracking
- - -
-
1
-
2023-11-24
Jan Beulich
Unresolved
[5/6] x86: adjust NOP generation after potential non-insn
correct and further utilize x86'es last-insn tracking
- - -
-
1
-
2023-11-24
Jan Beulich
Unresolved
[4/6] x86: i386_cons_align() badly affects diagnostics
correct and further utilize x86'es last-insn tracking
- - -
-
1
-
2023-11-24
Jan Beulich
Unresolved
[3/6] gas: no md_cons_align() for .nop{,s}
correct and further utilize x86'es last-insn tracking
- - -
-
1
-
2023-11-24
Jan Beulich
Unresolved
[2/6] x86: suppress optimization after potential non-insn
correct and further utilize x86'es last-insn tracking
- - -
-
1
-
2023-11-24
Jan Beulich
Unresolved
[1/6] x86: last-insn recording should be per-section
correct and further utilize x86'es last-insn tracking
- - -
-
1
-
2023-11-24
Jan Beulich
Unresolved
Commit: Fix building s390 target with clang
Commit: Fix building s390 target with clang
- - -
-
1
-
2023-11-24
Nick Clifton
Unresolved
RISC-V: Add SiFive custom vector coprocessor interface instructions v1.0
RISC-V: Add SiFive custom vector coprocessor interface instructions v1.0
- - -
-
1
-
2023-11-24
Kito Cheng
Unresolved
[v3,9/9] Support APX JMPABS for disassembler
[1/9] Make const_1_mode print $1 in AT&T syntax
- - -
-
1
-
2023-11-24
Cui, Lili
Unresolved
[v3,8/9] Support APX NDD optimized encoding.
[1/9] Make const_1_mode print $1 in AT&T syntax
- - -
-
1
-
2023-11-24
Cui, Lili
Unresolved
[v3,7/9] Support APX Push2/Pop2
[1/9] Make const_1_mode print $1 in AT&T syntax
- - -
-
1
-
2023-11-24
Cui, Lili
Unresolved
[v3,6/9] Support APX NDD
[1/9] Make const_1_mode print $1 in AT&T syntax
- - -
-
1
-
2023-11-24
Cui, Lili
Unresolved
[v3,5/9] Add tests for APX GPR32 with extend evex prefix
[1/9] Make const_1_mode print $1 in AT&T syntax
- - -
-
1
-
2023-11-24
Cui, Lili
Unresolved
[v3,4/9] Support APX GPR32 with extend evex prefix
[1/9] Make const_1_mode print $1 in AT&T syntax
- - -
-
1
-
2023-11-24
Cui, Lili
Unresolved
[v3,2/9] Support APX GPR32 with rex2 prefix
[1/9] Make const_1_mode print $1 in AT&T syntax
- - -
-
1
-
2023-11-24
Cui, Lili
Unresolved
[1/9] Make const_1_mode print $1 in AT&T syntax
[1/9] Make const_1_mode print $1 in AT&T syntax
- - -
-
1
-
2023-11-24
Cui, Lili
Unresolved
RISCV: Do fixup for local symbols while with "-mno-relax"
RISCV: Do fixup for local symbols while with "-mno-relax"
- - -
-
1
-
2023-11-23
Lifang Xia
Unresolved
[v2,5/6] s390: Add missing extended mnemonics
Untitled series #69587
- 1 -
-
1
-
2023-11-22
Jens Remus
Unresolved
[v2,4/6] s390: Align optional operand definition to specs
Untitled series #69587
- 1 -
-
1
-
2023-11-22
Jens Remus
Unresolved
[REVIEW,ONLY] UNRATIFIED RISC-V: Add support for the 'Zimop' extension
[REVIEW,ONLY] UNRATIFIED RISC-V: Add support for the 'Zimop' extension
- - -
-
1
-
2023-11-22
Lyut Nersisyan
Unresolved
MIPS/GAS: Set MSA info in .gnu_attribute section if used
MIPS/GAS: Set MSA info in .gnu_attribute section if used
- - -
-
1
-
2023-11-22
YunQiang Su
Unresolved
[4/5] diagnostics: add diagnostic_context::get_location_text
v2 of libdiagnostics
- - -
-
1
-
2023-11-21
David Malcolm
Unresolved
[3/5] libdiagnostics v2: add C++ wrapper API
v2 of libdiagnostics
- - -
-
1
-
2023-11-21
David Malcolm
Unresolved
[2/5] libdiagnostics v2: work-in-progress implementation
v2 of libdiagnostics
- - -
-
1
-
2023-11-21
David Malcolm
Unresolved
bpf: Fixed register parsing disambiguating with possible symbol.
bpf: Fixed register parsing disambiguating with possible symbol.
- - -
-
1
-
2023-11-21
Cupertino Miranda
Unresolved
RISC-V: Update 'Zfa' extension version
RISC-V: Update 'Zfa' extension version
- - -
-
1
-
2023-11-21
Xiao Zeng
Unresolved
x86: shrink opcode sets table
x86: shrink opcode sets table
- - -
-
1
-
2023-11-20
Jan Beulich
Unresolved
x86: also prefer VEX encoding over EVEX one for VCVTNEPS2BF16 when possible
x86: also prefer VEX encoding over EVEX one for VCVTNEPS2BF16 when possible
- - -
-
1
-
2023-11-20
Jan Beulich
Unresolved
[v3,1/2] RISC-V: Support Zcmp push/pop instructions.
[v3,1/2] RISC-V: Support Zcmp push/pop instructions.
- - -
-
1
-
2023-11-20
Jiawei
Unresolved
[COMMITED] gas: bpf: do not allow referring to register names as symbols in operands
[COMMITED] gas: bpf: do not allow referring to register names as symbols in operands
- - -
-
1
-
2023-11-18
Jose E. Marchesi
Unresolved
[v2] bpf: avoid creating wrong symbols while parsing
[v2] bpf: avoid creating wrong symbols while parsing
- - -
-
1
-
2023-11-17
David Faust
Unresolved
[3/5,BINUTILS] aarch64: Add support to new features in RAS extension.
Untitled series #68615
- - -
-
1
-
2023-11-16
Srinath Parvathaneni
Unresolved
[2/5,BINUTILS] aarch64: Add features to the Statistical Profiling Extension.
Untitled series #68615
- - -
-
1
-
2023-11-16
Srinath Parvathaneni
Unresolved
[v1,5/6] LoongArch: Modify link_info.relax_pass from 3 to 2
Fix some bugs of relaxation
- - -
-
1
-
2023-11-16
mengqinggang
Unresolved
[v1,3/6] LoongArch: Multiple relax_trip in one relax_pass
Fix some bugs of relaxation
- - -
-
1
-
2023-11-16
mengqinggang
Unresolved
[v1,2/6] LoongArch: Directly delete relaxed instuctions in first relaxation pass
Fix some bugs of relaxation
- - -
-
1
-
2023-11-16
mengqinggang
Unresolved
[v1,1/6] LoongArch: Fix ld --no-relax bug
Fix some bugs of relaxation
- - -
-
1
-
2023-11-16
mengqinggang
Unresolved
[COMMITTED] Finalized intl-update patches (deux)
[COMMITTED] Finalized intl-update patches (deux)
- - -
-
1
-
2023-11-15
Sam James
Unresolved
[v3] Support APX NDD optimized encoding.
[v3] Support APX NDD optimized encoding.
- - -
-
1
-
2023-11-15
Hu, Lin1
Unresolved
[2/2] bpf: remove symbols created during failed parse
gas,bpf: cleanup bad symbols created while parsing
- - -
-
1
-
2023-11-14
David Faust
Unresolved
[1/2] Reorder APX insns in i386.tbl
[1/2] Reorder APX insns in i386.tbl
- - -
-
1
-
2023-11-14
Hu, Lin1
Unresolved
[3/3] RISC-V: Add support for XCVmem extension in CV32E40P
RISC-V: Support CORE-V XCVELW, XCVBI, and XCVMEM extensions
- - -
-
1
-
2023-11-13
Mary Bennett
Unresolved
[2/3] RISC-V: Add support for XCVbi extension in CV32E40P
RISC-V: Support CORE-V XCVELW, XCVBI, and XCVMEM extensions
- - -
-
1
-
2023-11-13
Mary Bennett
Unresolved
[1/3] RISC-V: Add support for XCVelw extension in CV32E40P
RISC-V: Support CORE-V XCVELW, XCVBI, and XCVMEM extensions
- - -
-
1
-
2023-11-13
Mary Bennett
Unresolved
[v5,4/4] Gold/MIPS: Add mips64*/mips64*el triple support
Untitled series #67998
- - -
-
1
-
2023-11-13
YunQiang Su
Unresolved
[12/12] RISC-V: Add vector permutation instructions for T-Head VECTOR vendor extension
[01/12] RISC-V: Add T-Head VECTOR vendor extension.
- - -
-
1
-
2023-11-10
Jin Ma
Unresolved
[11/12] RISC-V: Add vector mask instructions for T-Head VECTOR vendor extension
[01/12] RISC-V: Add T-Head VECTOR vendor extension.
- - -
-
1
-
2023-11-10
Jin Ma
Unresolved
[10/12] RISC-V: Add reductions instructions for T-Head VECTOR vendor extension
[01/12] RISC-V: Add T-Head VECTOR vendor extension.
- - -
-
1
-
2023-11-10
Jin Ma
Unresolved
[08/12] RISC-V: Add fixed-point arithmetic instructions for T-Head VECTOR vendor extension
[01/12] RISC-V: Add T-Head VECTOR vendor extension.
- - -
-
1
-
2023-11-10
Jin Ma
Unresolved
[07/12] RISC-V: Add integer arithmetic instructions for T-Head VECTOR vendor extension
[01/12] RISC-V: Add T-Head VECTOR vendor extension.
- - -
-
1
-
2023-11-10
Jin Ma
Unresolved
[05/12] RISC-V: Add the sub-extension "XTheadZvlsseg" for T-Head VECTOR vendor extension
[01/12] RISC-V: Add T-Head VECTOR vendor extension.
- - -
-
1
-
2023-11-10
Jin Ma
Unresolved
[04/12] RISC-V: Add load/store instructions for T-Head VECTOR vendor extension
[01/12] RISC-V: Add T-Head VECTOR vendor extension.
- - -
-
1
-
2023-11-10
Jin Ma
Unresolved
[02/12] RISC-V: Add CSRs for T-Head VECTOR vendor extension
[01/12] RISC-V: Add T-Head VECTOR vendor extension.
- - -
-
1
-
2023-11-10
Jin Ma
Unresolved
[01/12] RISC-V: Add T-Head VECTOR vendor extension.
[01/12] RISC-V: Add T-Head VECTOR vendor extension.
- - -
-
1
-
2023-11-10
Jin Ma
Unresolved
[v4,2/2] GAS/MIPS: Add module-defer-warn2-r2 testcase for r2+ triples
GAS/MIPS: Fix testcase module-defer-warn2 for r2+ triples
- - -
-
1
-
2023-11-10
YunQiang Su
Unresolved
x86: improve a few diagnostics
x86: improve a few diagnostics
- - -
-
1
-
2023-11-09
Jan Beulich
Unresolved
[committed] ld: aarch64: Use lp64 abi in recent BTI stub tests
[committed] ld: aarch64: Use lp64 abi in recent BTI stub tests
- - -
-
1
-
2023-11-09
Szabolcs Nagy
Unresolved
aarch64: Fix error in THE system register checking
aarch64: Fix error in THE system register checking
- - -
-
1
-
2023-11-09
Victor Do Nascimento
Unresolved
[v3,3/2] x86: do away with is_evex_encoding()
x86: insn template CPU specifier processing
- - -
-
1
-
2023-11-07
Jan Beulich
Unresolved
[v3,2/2] x86: split insn templates' CPU field
x86: insn template CPU specifier processing
- - -
-
1
-
2023-11-07
Jan Beulich
Unresolved
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