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[8.43.85.97]) by mx.google.com with ESMTPS id k15-20020a170906578f00b00992aaed9f81si346566ejq.356.2023.08.30.20.22.37 for <ouuuleilei@gmail.com> (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Aug 2023 20:22:37 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=kXyd8HR8; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id EE88638582B7 for <ouuuleilei@gmail.com>; Thu, 31 Aug 2023 03:22:35 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org EE88638582B7 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1693452156; bh=mD9D+5Bx7G/oYDRHnDn+Eptv51FdFaM+vENHxYuZIUM=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=kXyd8HR8Mlg6Bwmyt44M4MY/D43RjQV/ZYkKBVJXz7okogYATAQxp8+v1xw3B7LXz zHMXOc4lVo9WDDJLAY773wc175XDIHhOgb3x8zVTeAgNTGVlHvbxhVOKhdDVZ/fJeL MP4wTr1hC+lrDf1xmUUDYccMxwDtdHAKLkjzF1n4= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 5E7713858D20; Thu, 31 Aug 2023 03:22:13 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 5E7713858D20 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 6E92F300089; Thu, 31 Aug 2023 03:22:09 +0000 (UTC) To: Tsukasa OI <research_trasio@irq.a4lg.com>, Palmer Dabbelt <palmer@dabbelt.com>, Andrew Waterman <andrew@sifive.com>, Jim Wilson <jim.wilson.gcc@gmail.com>, Nelson Chu <nelson@rivosinc.com>, Kito Cheng <kito.cheng@sifive.com> Cc: binutils@sourceware.org, gdb-patches@sourceware.org Subject: [PATCH v2 0/3] RISC-V: Add ratified 'E' base ISA support with draft ABIs Date: Thu, 31 Aug 2023 03:21:53 +0000 Message-ID: <cover.1693452083.git.research_trasio@irq.a4lg.com> In-Reply-To: <cover.1690251857.git.research_trasio@irq.a4lg.com> References: <cover.1690251857.git.research_trasio@irq.a4lg.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-5.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, KAM_MANYTO, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list <binutils.sourceware.org> List-Unsubscribe: <https://sourceware.org/mailman/options/binutils>, <mailto:binutils-request@sourceware.org?subject=unsubscribe> List-Archive: <https://sourceware.org/pipermail/binutils/> List-Post: <mailto:binutils@sourceware.org> List-Help: <mailto:binutils-request@sourceware.org?subject=help> List-Subscribe: <https://sourceware.org/mailman/listinfo/binutils>, <mailto:binutils-request@sourceware.org?subject=subscribe> From: Tsukasa OI via Binutils <binutils@sourceware.org> Reply-To: Tsukasa OI <research_trasio@irq.a4lg.com> Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" <binutils-bounces+ouuuleilei=gmail.com@sourceware.org> X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772357703317342749 X-GMAIL-MSGID: 1775713289009686626 |
Series |
RISC-V: Add ratified 'E' base ISA support with draft ABIs
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Message
Tsukasa OI
Aug. 31, 2023, 3:21 a.m. UTC
Hi, PATCH v1 (only Binutils): <https://sourceware.org/pipermail/binutils/2023-July/128583.html> Changes: v1 -> v2 - Added preliminary GDB support Related Project: PATCH 1/3: Binutils PATCH 2/3: Binutils PATCH 3/3: GDB This patch set reflects ratified 'E' base ISAs (except version number of 'E') and draft/pre-draft RVE ABIs, ILP32E and LP64E. RV32E / RV64E (ratified): The latest RISC-V ISA Manual <https://github.com/riscv/riscv-isa-manual/releases/tag/riscv-isa-release-1239329-2023-05-23> ILP32E (draft): RISCV ABIs Specification version 1.0 <https://github.com/riscv-non-isa/riscv-elf-psabi-doc/releases/tag/v1.0> LP64E (pre-draft): Submission to add RVE API corresponding RV64E <https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/299> Adding pre-draft LP64E would be a problem on GCC but I bet not on Binutils (ELF flags [to handle on Binutils/GAS] are not very detailed). Note that this patch set does not reflect the version number of the 'E' base ISA (ratified version 2.0) because the latest ratified specification, "20191213", comes with the draft version 1.9 and adding the version 2.0 with ISA_SPEC_CLASS_DRAFT does not work (due to the default value of `DEFAULT_RISCV_ISA_SPEC'; note that it cannot be set to "draft"). I think the next unprivileged ISA specification release is the best timing to add 'E' version 2.0 (along with new ISA_SPEC_CLASS_20??????). Thanks, Tsukasa Tsukasa OI (3): RISC-V: Remove RV64E conflict RISC-V: Add "lp64e" ABI support RISC-V: Add RV64E support to GDB bfd/elfxx-riscv.c | 7 ----- gas/config/tc-riscv.c | 4 ++- gas/doc/c-riscv.texi | 5 ++- .../gas/riscv/mabi-fail-rv32e-lp64d.l | 2 +- .../gas/riscv/mabi-fail-rv32e-lp64f.l | 2 +- .../gas/riscv/mabi-fail-rv32e-lp64q.l | 2 +- gas/testsuite/gas/riscv/march-fail-base-02.d | 3 -- gas/testsuite/gas/riscv/march-fail-base-02.l | 2 -- gdb/arch/riscv.c | 15 +++++++-- gdb/arch/riscv.h | 2 +- gdb/features/Makefile | 1 + gdb/features/riscv/rv64e-xregs.c | 30 ++++++++++++++++++ gdb/features/riscv/rv64e-xregs.xml | 31 +++++++++++++++++++ gdb/riscv-tdep.c | 9 +----- 14 files changed, 85 insertions(+), 30 deletions(-) delete mode 100644 gas/testsuite/gas/riscv/march-fail-base-02.d delete mode 100644 gas/testsuite/gas/riscv/march-fail-base-02.l create mode 100644 gdb/features/riscv/rv64e-xregs.c create mode 100644 gdb/features/riscv/rv64e-xregs.xml base-commit: 68a2d9bf874643da970fe945a9c60c397f6882ad