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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id w21-20020a50fa95000000b0052a3c3ca01fsi7315881edr.559.2023.08.29.18.38.55 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Aug 2023 18:38:55 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=gQr02V+o; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 87F133858C74 for ; Wed, 30 Aug 2023 01:38:54 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 87F133858C74 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1693359534; bh=3mQckI+o/do/HVTx9mtvjyzmsrFcvOA7XC6EWAR4oBg=; h=To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=gQr02V+ohqWXxDV2yEwhYMA0Zv7IzbaVM+PR6VVzh5XoQWOY9czXas+w8pmH4PWpN 6ymdgM4jlaJmd8nsJTb0YPzN8QxPQYyv3QWkhDeC+3NnyIkP2PfO4LMEA5I++aSok3 JZ343V7DU1BXqCct291CrDnYCYri3YhWim7gdg5A= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 4D5783858D28 for ; Wed, 30 Aug 2023 01:38:41 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 4D5783858D28 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id A99A4300089; Wed, 30 Aug 2023 01:38:38 +0000 (UTC) To: Tsukasa OI , Palmer Dabbelt , Andrew Waterman , Jim Wilson , Nelson Chu , Kito Cheng , Jeff Law , Greg Favor Cc: binutils@sourceware.org Subject: [PATCH 0/1] RISC-V: Make XVentanaCondOps RV64 only Date: Wed, 30 Aug 2023 01:38:33 +0000 Message-ID: Mime-Version: 1.0 X-Spam-Status: No, score=-6.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, KAM_MANYTO, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1775616168598779499 X-GMAIL-MSGID: 1775616168598779499 Hello, I noticed that two instructions in the XVentanaCondOps vendor extension -- "vt.maskc" and "vt.maskcn" -- are defined for all XLEN values. This is against the manual and LLVM. 1. The instruction manual Currently defines the instructions only for RV64. > All current cores by Ventana Micro implement RV64 and are designed as > 64-bit only, the RV32-column is marked "n/a". But it also says it's (in theory) XLEN-agonistic. > The instructions in the XVentanaCondOps extension are defined to operate > on XLEN and would thus be directly applicable to RV32. 2. LLVM (llvm/lib/Target/RISCV/RISCVInstrInfoXVentana.td) > let Predicates = [IsRV64, HasVendorXVentanaCondOps] It indicates that XVentanaCondOps instructions are only enabled on RV64. Unless Ventana is working on some RV32 processors (and soon to be released ), I think disabling XVentanaCondOps instructions on RV32 would be safer (to prevent possible misuses). I would like to hear thoughts especially from Ventana employees since I am just a volunteer. I also chose not to reject XVentanaCondOps + RV32 because it is not stated that is illegal (unlike Zcf + RV64). This patch set makes XVentanaCondOps + RV32 empty (yet legal). Sincerely, Tsukasa Tsukasa OI (1): RISC-V: Make XVentanaCondOps RV64 only gas/testsuite/gas/riscv/x-ventana-condops-32.d | 3 +++ gas/testsuite/gas/riscv/x-ventana-condops-32.l | 3 +++ opcodes/riscv-opc.c | 4 ++-- 3 files changed, 8 insertions(+), 2 deletions(-) create mode 100644 gas/testsuite/gas/riscv/x-ventana-condops-32.d create mode 100644 gas/testsuite/gas/riscv/x-ventana-condops-32.l base-commit: 0637da3c7325b28a2c05f016d7f290513b1cd19b