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[8.43.85.97]) by mx.google.com with ESMTPS id n13-20020a05640205cd00b004485081f004si16018783edx.598.2022.10.19.06.12.21 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Oct 2022 06:12:21 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=fvcwShyk; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7C990385742A for ; Wed, 19 Oct 2022 13:12:17 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7C990385742A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666185137; bh=VupnVM8IdJT9mapHSTpzppuNXttJ+M0naX20Iw3hMDs=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=fvcwShykWdbSNE7QrBaxE1XE/8u/XE59tQ3Zr2t2FqS4lb68aMRlteCzUHX2fs/29 uljP8yAledYBT5XdMmMPow36bFoUJczC73enG00iGQF8Pn+PI8V13vhvw3SI+3Yh4Q NcYshOEbwrrvpmgHNM0N38IsBV9nSuVE1E1dtmJQ= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender.a4lg.com [153.120.152.154]) by sourceware.org (Postfix) with ESMTPS id 214CB3857BB2 for ; Wed, 19 Oct 2022 13:12:09 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 214CB3857BB2 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 7FE76300089; Wed, 19 Oct 2022 13:12:06 +0000 (UTC) To: Tsukasa OI , Nelson Chu , Kito Cheng , Palmer Dabbelt Subject: [PATCH v2 0/8] RISC-V: Various opcode tidying (batch 1) Date: Wed, 19 Oct 2022 13:11:54 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-6.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Cc: binutils@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747121750397381245?= X-GMAIL-MSGID: =?utf-8?q?1747121750397381245?= Hello, This patchset contains various tidying of RISC-V opcodes that would... (a) Make coding style more consistent and/or more readable (b) Remove unused constants (c) Make new instruction names primary (clean old names except aliases) (d) Make opcode entries functionally consistent. I call this "batch 1" and deals with the most obvious (yet small and various) issues. [Overview of this Patchset] PATCH 1/8: (a) Tidying (add space at the tail of pinfo) PATCH 2/8: (a) Tidying (fix obvious misalignments on 'Zbb'/'Zba') PATCH 3/8: (a) Tidying (remove spaces around "|" operator) PATCH 4/8: (b) Remove unused instruction macros PATCH 5/8: (c) SCALL -> ECALL, SBREAK -> EBREAK (RISC-V ISA v2.1) PATCH 6/8: (c) FMV.S.X -> FMV.W.X, FMV.X.S -> FMV.X.W (RISC-V ISA v2.2) PATCH 7/8: (c) Make old instruction names aliases PATCH 8/8: (d) Use defined (and named) constants for instruction defining Thanks, Tsukasa Tsukasa OI (8): RISC-V: Add a space at the end of pinfo RISC-V: Fix obvious misalignments ('Zbb'/'Zba') RISC-V: Remove spaces in opcode entries RISC-V: Remove unused instruction macros RISC-V: Complete tidying up with SCALL and SBREAK RISC-V: Tidying up with fmv.w.x and fmv.x.w RISC-V: Make alias instructions aliases RISC-V: Use defined mask and match values include/opcode/riscv-opc.h | 47 +-- opcodes/riscv-opc.c | 706 ++++++++++++++++++------------------- 2 files changed, 359 insertions(+), 394 deletions(-) base-commit: 2b06e59de0675c2cb526af2de6803dae29703d15