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[8.43.85.97]) by mx.google.com with ESMTPS id sa12-20020a1709076d0c00b007799e328e10si4594863ejc.999.2022.10.04.04.26.15 for <ouuuleilei@gmail.com> (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Oct 2022 04:26:15 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=mFUUzRXf; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1EF41385C41C for <ouuuleilei@gmail.com>; Tue, 4 Oct 2022 11:26:14 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1EF41385C41C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1664882774; bh=HMRey27JVokUP/ARfdDwsinverfFUgiCNhj/iusfwas=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=mFUUzRXfgbdskxCkby/ZjT8a+5/LunUSkCyWw9JLcRuaNnEpjgWc6owQ1mdNehozD mAqwImH/Xo0z7ymO+xXiyD3LHDbfFet4EZLh7K+PGfXJH8672/TK6oqSohzOrgJUsI AjOkuA0v89gnEKjm7/+NCJy/AJlrT+YWji+xvRUs= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id ED4303858C74; Tue, 4 Oct 2022 11:26:02 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org ED4303858C74 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 8C44F300089; Tue, 4 Oct 2022 11:26:00 +0000 (UTC) To: Tsukasa OI <research_trasio@irq.a4lg.com>, Nelson Chu <nelson@rivosinc.com>, Kito Cheng <kito.cheng@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Andrew Burgess <aburgess@redhat.com>, Jan Beulich <jbeulich@suse.com>, Andreas Schwab <schwab@suse.de> Subject: [PATCH v3 0/2] RISC-V: Fix buffer overflow after 176-bit instruction support Date: Tue, 4 Oct 2022 11:25:55 +0000 Message-Id: <cover.1664882725.git.research_trasio@irq.a4lg.com> In-Reply-To: <cover.1664876744.git.research_trasio@irq.a4lg.com> References: <cover.1664876744.git.research_trasio@irq.a4lg.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-6.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, KAM_MANYTO, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list <binutils.sourceware.org> List-Unsubscribe: <https://sourceware.org/mailman/options/binutils>, <mailto:binutils-request@sourceware.org?subject=unsubscribe> List-Archive: <https://sourceware.org/pipermail/binutils/> List-Post: <mailto:binutils@sourceware.org> List-Help: <mailto:binutils-request@sourceware.org?subject=help> List-Subscribe: <https://sourceware.org/mailman/listinfo/binutils>, <mailto:binutils-request@sourceware.org?subject=subscribe> From: Tsukasa OI via Binutils <binutils@sourceware.org> Reply-To: Tsukasa OI <research_trasio@irq.a4lg.com> Cc: binutils@sourceware.org, gdb-patches@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" <binutils-bounces+ouuuleilei=gmail.com@sourceware.org> X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1745749828616799813?= X-GMAIL-MSGID: =?utf-8?q?1745756121090096246?= |
Series |
RISC-V: Fix buffer overflow after 176-bit instruction support
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Message
Tsukasa OI
Oct. 4, 2022, 11:25 a.m. UTC
Hello, This is the PATCH v3 for quick stack buffer overflow fix. [Changes: v2 -> v3] - PATCH 1/2: Define RISCV_MAX_INSN_LEN in riscv_insn_length function (idea by Jan Beulich) - PATCH 2/2: Fix comment and commit message [Changes: v1 -> v2] - Fix assertion failure on riscv_insn::decode - Use new constant RISCV_MAX_INSN_LEN for buffer size PATCH 1: Binutils PATCH 2: GDB (v2/3: depends on PATCH 1) Thanks, Tsukasa Tsukasa OI (2): RISC-V: Fix buffer overflow on print_insn_riscv gdb/riscv: Partial support for instructions up to 176-bit gdb/riscv-tdep.c | 9 +++++---- include/opcode/riscv.h | 2 ++ opcodes/riscv-dis.c | 2 +- 3 files changed, 8 insertions(+), 5 deletions(-) base-commit: d71eca64e70c31e0d32396a0b6c60e3ea9eb420b
Comments
On 04.10.2022 13:25, Tsukasa OI wrote: > This is the PATCH v3 for quick stack buffer overflow fix. > > [Changes: v2 -> v3] > - PATCH 1/2: Define RISCV_MAX_INSN_LEN in riscv_insn_length function > (idea by Jan Beulich) > - PATCH 2/2: Fix comment and commit message Lgtm now, fwiw. Like elsewhere I'd prefer the arch maintainers to actually approve the change to go in. Jan
OK, thanks. If the problem is resolved and test cases are passed, please commit. Thanks Nelson On Tue, Oct 4, 2022 at 8:23 PM Jan Beulich <jbeulich@suse.com> wrote: > > On 04.10.2022 13:25, Tsukasa OI wrote: > > This is the PATCH v3 for quick stack buffer overflow fix. > > > > [Changes: v2 -> v3] > > - PATCH 1/2: Define RISCV_MAX_INSN_LEN in riscv_insn_length function > > (idea by Jan Beulich) > > - PATCH 2/2: Fix comment and commit message > > Lgtm now, fwiw. Like elsewhere I'd prefer the arch maintainers to actually > approve the change to go in. > > Jan