mbox series

[00/10] x86: re-work ISA extension dependency handling

Message ID 973d3274-7adc-3a7c-5aaa-916fd5adc093@suse.com
Headers
Series x86: re-work ISA extension dependency handling |

Message

Jan Beulich Dec. 19, 2022, 8:31 a.m. UTC 
  Getting both forward and reverse ISA dependencies right / consistent has
been a permanent source of mistakes, myself included. Reduce what needs
specifying manually to just the direct forward dependencies. Plus a
number of dependencies weren't put in place at all.

01: re-work ISA extension dependency handling
02: correct what gets disabled by certain ".arch .no*"
03: correct SSE dependencies
04: add dependencies on AVX2
05: rework noavx512-1 testcase
06: correct dependencies of a few AVX512 sub-features
07: correct XSAVE* dependencies
08: add dependencies on VMX
09: add dependencies on SVME
10: correct/improve TSX controls

Jan

Comments

H.J. Lu Dec. 20, 2022, 2:25 a.m. UTC | #1 
On Mon, Dec 19, 2022 at 12:31 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> Getting both forward and reverse ISA dependencies right / consistent has
> been a permanent source of mistakes, myself included. Reduce what needs
> specifying manually to just the direct forward dependencies. Plus a
> number of dependencies weren't put in place at all.
>
> 01: re-work ISA extension dependency handling
> 02: correct what gets disabled by certain ".arch .no*"
> 03: correct SSE dependencies
> 04: add dependencies on AVX2
> 05: rework noavx512-1 testcase
> 06: correct dependencies of a few AVX512 sub-features
> 07: correct XSAVE* dependencies
> 08: add dependencies on VMX
> 09: add dependencies on SVME
> 10: correct/improve TSX controls
>
> Jan

If a CPUID feature, like X, implies another CPUID feature, Y,
disable X shouldn't disable Y.  Will this patch set still support
this without adding CpuX to all Y instructions?
Jan Beulich Dec. 20, 2022, 8:09 a.m. UTC | #2 
On 20.12.2022 03:25, H.J. Lu wrote:
> On Mon, Dec 19, 2022 at 12:31 AM Jan Beulich <jbeulich@suse.com> wrote:
>>
>> Getting both forward and reverse ISA dependencies right / consistent has
>> been a permanent source of mistakes, myself included. Reduce what needs
>> specifying manually to just the direct forward dependencies. Plus a
>> number of dependencies weren't put in place at all.
>>
>> 01: re-work ISA extension dependency handling
>> 02: correct what gets disabled by certain ".arch .no*"
>> 03: correct SSE dependencies
>> 04: add dependencies on AVX2
>> 05: rework noavx512-1 testcase
>> 06: correct dependencies of a few AVX512 sub-features
>> 07: correct XSAVE* dependencies
>> 08: add dependencies on VMX
>> 09: add dependencies on SVME
>> 10: correct/improve TSX controls
> 
> If a CPUID feature, like X, implies another CPUID feature, Y,
> disable X shouldn't disable Y.  Will this patch set still support
> this without adding CpuX to all Y instructions?

This series doesn't alter behavior in this regard (as can also be seen by
there not being any changes to the insn templates, nor to respective test
cases; the one testcase the series does touch is being altered separately
first for the very reason of demonstrating that behavior of the assembler
doesn't change, except of course for adding previously missing connections
between ISA extensions). The meaning of CPU{,_ANY}_*_FLAGS remains exactly
the same. It is only the way they're calculated which changes.

Jan