[0/4] x86: misc CPU type related assembler adjustments

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Series	x86: misc CPU type related assembler adjustments \| [0/4] x86: misc CPU type related assembler adjustments [1/4] x86-64: LAR and LSL don't need REX.W [2/4] x86: have insns acting on segment selector values allow for consistent operands [3/4] x86-64: don't permit LAHF/SAHF with "generic64" [4/4] x86: MONITOR/MWAIT are not SSE3 insns

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Subject: [PATCH 0/4] x86: misc CPU type related assembler adjustments
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Series

x86: misc CPU type related assembler adjustments |

Message

Jan Beulich Feb. 10, 2023, 8:47 a.m. UTC

  Perhaps with the exception of the 1st one, all changes here have more
or less potential of being controversial; constructive comments
appreciated.

1: LAR and LSL don't need REX.W
2: have insns acting on segment selector values allow for consistent operands
3: don't permit LAHF/SAHF with "generic64"
4: MONITOR/MWAIT are not SSE3 insns

Jan