[0/6] Arm64: (mostly) SVE adjustments

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Series	Arm64: (mostly) SVE adjustments \| [0/6] Arm64: (mostly) SVE adjustments [1/6] Arm64: correct B16B16 indexed bf{mla,mls,mul} [2/6] Arm64: check matching operands for predicated B16B16 insns [3/6] Arm64: check tied operand specifier in aarch64-gen [4/6] Arm64: correct SVE2.1 ld{3,4}q / st{3,4}q (scalar plus immediate) [5/6] Arm64: correct SVE2.1 ld2q (scalar plus scalar) [6/6] gas/NEWS: drop mention of Arm64's SVE2.1 and SME2.1

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Date: Fri, 23 Feb 2024 12:26:37 +0100
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To: Binutils <binutils@sourceware.org>
Cc: Richard Earnshaw <rearnsha@arm.com>,
 Marcus Shawcroft <marcus.shawcroft@arm.com>, Nick Clifton <nickc@redhat.com>
From: Jan Beulich <jbeulich@suse.com>
Subject: [PATCH 0/6] Arm64: (mostly) SVE adjustments
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Series

Arm64: (mostly) SVE adjustments |

Message

Jan Beulich Feb. 23, 2024, 11:26 a.m. UTC

  Some of the issues addressed here were pointed out before, but only
not overly involved ones of those (plus a couple of subsequent findings)
are taken care of. The rest is left to people more familiar with the
inner workings of the operand type machinery.

1: correct B16B16 indexed bf{mla,mls,mul}
2: check matching operands for predicated B16B16 insns
3: check tied operand specifier in aarch64-gen
4: correct SVE2.1 ld{3,4}q / st{3,4}q (scalar plus immediate)
5: correct SVE2.1 ld2q (scalar plus scalar)
6: gas/NEWS: drop mention of Arm64's SVE2.1 and SME2.1

At least the last patch wants backporting to 2.42.

Jan