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[8.43.85.97]) by mx.google.com with ESMTPS id az20-20020a05620a171400b0077f2efdfb57si24540782qkb.448.2023.12.18.22.41.27 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Dec 2023 22:41:27 -0800 (PST) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=xupt.edu.cn Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 2EB81386D602 for ; Tue, 19 Dec 2023 06:41:09 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-m6026.netease.com (mail-m6026.netease.com [210.79.60.26]) by sourceware.org (Postfix) with ESMTPS id 00F5138582B6 for ; Tue, 19 Dec 2023 06:40:23 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 00F5138582B6 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=stu.xupt.edu.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=stu.xupt.edu.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 00F5138582B6 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=210.79.60.26 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702968029; cv=none; b=hcXgCFUSDycEwowWFhjvc7Lw1wijJeRKDtB6y5UUmAXOI4zVDJ87Idpmr8D4DfTlhX7snNsYZWLpJK5P2fm/iM3zzdLhcGq+PmkVnBdFQpUmroFs9f40jYuLYcMelqPkOldeJYoRCqb9MV5TYlEK9fLcuCnDoU39g8ldkb33qJM= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1702968029; c=relaxed/simple; bh=DOto/JB47XjZGWhEebB3hfckTCwfDb3avtwYcecGsv0=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=uD/WBvgwWLcZHyHFQvqflqVij9w/v1xJeiMJb2CBoBHLEwJKhUXxxbNxPqJkgtDgsWE5AGLhvwiyYv+X3kSvj7k1KYHCv5qri4ECoZETsFrfHH0JkPGnoGcRbMwSE6vZW125QV3vb/w3rJ5DGNbzdc+tko6eCwU1NO6pV6Gdygw= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from ubuntu.localdomain (unknown [111.18.37.203]) by mail-m121144.qiye.163.com (Hmail) with ESMTPA id A6A93AC00C6; Tue, 19 Dec 2023 14:40:12 +0800 (CST) From: changjiachen To: binutils@sourceware.org Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn, liuzhensong@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name, maskray@google.com, cailulu@loongson.cn, luweining@loongson.cn, wanglei@loongson.cn, hejinyang@loongson.cn, Lazy_Linux@126.com, mengqinggang@loongson.cn, changjiachen Subject: [PATCH v4 0/5] LoongArch tls le model linker relaxation support. Date: Tue, 19 Dec 2023 14:40:06 +0800 Message-Id: <20231219064011.90412-1-changjiachen@stu.xupt.edu.cn> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVkaGE9MVkJDTEJJTEhIHU9PH1UTARMWGhIXJBQOD1 lXWRgSC1lBWUpKSlVKQ1VITFVJS0hZV1kWGg8SFR0UWUFZT0tIVUpKS0hKQ1VKS0tVS1kG X-HM-Tid: 0a8c80cdb190b039kuuua6a93ac00c6 X-HM-MType: 10 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6PzI6LCo*MTw1GS9LHgs#TQw# DlYKFB9VSlVKTEtJQk1DS0pIQkhMVTMWGhIXVRgTGhUcERIaGBMeFTsIDw5VAw4LD1UeHw5VGBVF WVdZEgtZQVlKSkpVSkNVSExVSUtIWVdZCAFZQU5CSkg3Bg++ X-Spam-Status: No, score=-5.8 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785342082385236482 X-GMAIL-MSGID: 1785691464990953320 This is the v4 version of patches to support loongarch linker tls le model relax. Changes from v3: * For the fourth operand in the add.d $a0,$a0,$a0,%le_add_r(a) insn, some exception information is added. * Added add.d $a0,$a0,$a0,%le_add_r(a) instruction format to check test cases in gas/testsuite/gas/loongarch. example: a.s add.d $a0,$a0,$a0,8 $ gas/as-new a.s a.s: Assembler messages: a.s:1: error: no match insn: add.d $a0,$a0,$a0,8 Changes from v2: * Some problems in the v2 patch are answered as follows. Question: use ".reloc.,R_LARCH_TLS_LE_ADD_R,sym" to generate relocation or %le_add_r(sym) to generate relocation. Reply: First, after a test, the R_LARCH_TLS_LE_ADD_R can be generated using ".reloc.,R_LARCH_TLS_LE_ADD_R,sym", or "%le_add_r(sym)". However,".reloc" generates R_LARCH_TLS_LE_ADD_R relocation directly, and it is not easy to add "R_LARCH_RELAX" relocation. "%le_add_r(sym)" Adds the R_LARCH_TLS_LE_ADD_R and R_LARCH_RELAX relocation commands, which is easier to implement. Of course, there is another way to generate ".reloc.,R_LARCH_TLS_LE_ADD_R,sym" and ".reloc.,R_LARCH_RELAX,sym" directly in gcc. However, this implementation causes the -mrelax/-mno-relax option to be set in both gcc and gas, which can be confusing. One problem with this is that add.d $r12,$r12,$r2 and add.d $r12,$r12,$r2, %le_add_r(sym) are too similar, so I have to add comments in loongarch_fix_opcodes[]. The goal is to make it as clear as possible to developers. * modified code format in loongarch_relax_tls_le(),use loongarch_relax_delete_bytes() instead of R_LARCH_DELETE to implement the delete instruction operation. * modified R_LARCH_TLS_LE_ADD_R type_name:"tls_le_add_r"-->"le_add_r". * modify comment information. * some comments added to "add.d" in loongarch_opcode loongarch_fix_opcodes[]. * remove some unnecessary content from the ld/testsuite/ld-loongarch test case. Changes from v1: * Modified v1-0000-cover-letter.patch part of the explanatory content. Before Modify: example: __thread int a = 1; old insn sequence: lu12i.w $r12,%le_hi20_r(a) ori $r12,$r12,%le_lo12_r(a) add.d $r12,$r12,$r2,%le_add_r(a) li.w $r13,$r0,1 stptr.w $r13,$r12,0 new insn sequence: lu12i.w $r12,%le_hi20_r(a) add.d $r12,$r12,$r2,%le_add_r(a) li.w $r13,$r0,1 st.w $r13,$r12,%le_lo12_r(a) After Modify: example: __thread int a = 1; old insn sequence(at the O0 optimization level): lu12i.w $r12,%le_hi20(a) ori $r12,$r12,%le_lo12(a) add.d $r12,$r12,$r2 addi.w $r13,$r0,1 stptr.w $r13,$r12,0 new insn sequence(at the O0 optimization level): lu12i.w $r12,%le_hi20_r(a) add.d $r12,$r12,$r2,%le_add_r(a) addi.w $r13,$r0,1 st.w $r13,$r12,%le_lo12_r(a) changjiachen (5): LoongArch: bfd: Add support for tls le relax. LoongArch: include: Add support for tls le relax. LoongArch: opcodes: Add support for tls le relax. oongArch: gas: Add support for tls le relax. LoongArch: ld: Add support for tls le relax. bfd/bfd-in2.h | 4 + bfd/elfnn-loongarch.c | 76 +++++++++ bfd/elfxx-loongarch.c | 50 ++++++ bfd/libbfd.h | 3 + bfd/reloc.c | 6 + gas/config/tc-loongarch.c | 33 +++- gas/testsuite/gas/loongarch/loongarch.exp | 9 ++ gas/testsuite/gas/loongarch/reloc.d | 18 +++ gas/testsuite/gas/loongarch/reloc.s | 11 ++ .../gas/loongarch/tls_le_insn_format_check.s | 5 + include/elf/loongarch.h | 12 ++ ld/testsuite/ld-loongarch-elf/old-tls-le.s | 19 +++ .../relax-bound-check-tls-le.s | 48 ++++++ ld/testsuite/ld-loongarch-elf/relax-tls-le.s | 17 ++ ld/testsuite/ld-loongarch-elf/relax.exp | 151 +++++++++++++++++- .../tls-relax-compatible-check-new.s | 29 ++++ .../tls-relax-compatible-check-old.s | 27 ++++ opcodes/loongarch-opc.c | 1 + 18 files changed, 516 insertions(+), 3 deletions(-) create mode 100644 gas/testsuite/gas/loongarch/tls_le_insn_format_check.s create mode 100644 ld/testsuite/ld-loongarch-elf/old-tls-le.s create mode 100644 ld/testsuite/ld-loongarch-elf/relax-bound-check-tls-le.s create mode 100644 ld/testsuite/ld-loongarch-elf/relax-tls-le.s create mode 100644 ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-new.s create mode 100644 ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-old.s