From patchwork Wed Oct 19 14:55:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jiang, Haochen" X-Patchwork-Id: 356 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp371222wrs; Wed, 19 Oct 2022 07:56:25 -0700 (PDT) X-Google-Smtp-Source: AMsMyM4Kggri7tsrFe0a9PSXzM78dwcrkMi1ahIUmtVHwoelaWl5o7FICzFWKwucbQiIaYJ0hJru X-Received: by 2002:a17:906:478e:b0:78e:4b5:a547 with SMTP id cw14-20020a170906478e00b0078e04b5a547mr7193296ejc.81.1666191385214; Wed, 19 Oct 2022 07:56:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666191385; cv=none; d=google.com; s=arc-20160816; b=hlW27W7ay9hwkcxqd0zqExd1F5c1iPOQjgDXPaO/SDMzLRDMb1Ha0orwEMJrseAAeX C9fOdi3nUvDLGOYs5zXhDePmKqlRDLGBDhIC90VDHUoaIE8vZbk+wxZiXigVuzTxlpu+ vlV9UV7j7riHxCMN7kA2CS8Yjzbg+4rueZpDtVtgXi6RBk+2f+i7ShDtDryiEeDt0F89 Q7gNut038Inz75QTC8aWp1shihOEDM/ZUK1YtirKWBViRCg8sFeg48Hg7jV3sGCenhhO Y0yWAmb917rT2tpHtFzmcRFYpZSyRNGVjABz9PFUnAPXTrsKea3UCiwDqAQLu8ORKhc1 6FJw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:reply-to:from:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence:message-id:date :subject:to:dmarc-filter:delivered-to:dkim-signature:dkim-filter; bh=fPkottVXjPzkOdikxrReqJg3sroVY7b+nrd27PI74V4=; b=StGFcTApd9/6AvceDrv8CF98etS/3HFJzlPO54V6G4cclTPg1MJipCeoms7RTILi58 jJeeusMGwH5/kko6nSKy5nwXHrRB0iCtF79vQqh67RNiW2RTtqO4wD7A42glBFIObJhW k2bQ/8uWTp+DwbhDtWVM2SiEvl9qu7znV0CssyB1fc3Aiy4dnD/WmnkDaiaCpzkxk+xY PqUe6xSjExc2a1+pNyr9yiufpmqDOHyyHDM0b194bZ1peFi9VAnLWqYzIzdkcFMBv4JW WhRuP/6k3AqX1DgLmK7+JRebaIGCpo133P0exSFNpbp81lbcttDg+Vy41x+QMRzJk3Bx PeKw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=TtKAiYaX; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from sourceware.org (server2.sourceware.org. [8.43.85.97]) by mx.google.com with ESMTPS id n25-20020a170906379900b00782b2a97825si12244817ejc.337.2022.10.19.07.56.25 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Oct 2022 07:56:25 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=TtKAiYaX; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id EE74F3858C2F for ; Wed, 19 Oct 2022 14:56:23 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org EE74F3858C2F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1666191384; bh=fPkottVXjPzkOdikxrReqJg3sroVY7b+nrd27PI74V4=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=TtKAiYaXBEgvYlIWZQ2fwGUASfZrOwV4gt7WgD/uMQK84FhwqSQhRPhMb/fVMAeNb C+iG34UUhtmOsgngXWm7FCnQvua1T0rxvXr3H7TcJ7FsNEU+SGk5AiBTVui2MTA9SX mxjup1F0hmwU4saL76xTQkOn8YPObMhb7Qi6F3BM= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by sourceware.org (Postfix) with ESMTPS id CCAE63858D3C for ; Wed, 19 Oct 2022 14:56:14 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org CCAE63858D3C X-IronPort-AV: E=McAfee;i="6500,9779,10505"; a="289749448" X-IronPort-AV: E=Sophos;i="5.95,196,1661842800"; d="scan'208";a="289749448" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Oct 2022 07:56:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10505"; a="804336371" X-IronPort-AV: E=Sophos;i="5.95,196,1661842800"; d="scan'208";a="804336371" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orsmga005.jf.intel.com with ESMTP; 19 Oct 2022 07:56:11 -0700 Received: from shliclel320.sh.intel.com (shliclel320.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id AD9BB100511A; Wed, 19 Oct 2022 22:56:10 +0800 (CST) To: binutils@sourceware.org Subject: [PATCH v2 0/10] Add new Intel Sierra Forest, Grand Ridge, Granite Rapids Instructions Date: Wed, 19 Oct 2022 22:55:58 +0800 Message-Id: <20221019145608.45213-1-haochen.jiang@intel.com> X-Mailer: git-send-email 2.18.1 X-Spam-Status: No, score=-5.7 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Haochen Jiang via Binutils From: "Jiang, Haochen" Reply-To: Haochen Jiang Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747128297912900259?= X-GMAIL-MSGID: =?utf-8?q?1747128297912900259?= Hi all, This is our v2 patches for newly released Intel Architecture Instruction Set Extensions and Future Features. The document comes following: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html The changes we HAVEN'T DONE: 1. All the reviews in AVX-NE-CONVERT, RAO-INT, PREFETCHI. The patch owner for AVX-NE-CONVERT and RAO-INT is currently busy with the GCC patches adjustment for these two ISAs and haven't finished the change yet. We will update that in next version. For PREFETCHI, since it is quite special, some more discussion is welcomed before further change. For these three patches, there might have some general changes and will be mentioned below. 2. The Suffix things in CMPccXADD. We have inconsistency for No_Suf usage for CMPccXADD and RAO-INT. We will align them in next version. The changes we HAVE DONE: 1. The AVX2 prereq for AVX-IFMA and AVX-VNNI-INT8. 2. The changes from ANY_xxx to xxx for CMPccXADD, WRMSRNS, MSRLIST. It is very unlikely for these three ISAs have future ISAs that depend on them. Therefore, I changed ANY_xxx to xxx. For other ISAs, we keep the ANY_xxx since we suppose there might be dependency on them. But it still need discussion. There is potential we will remove some of them in v3 (most likely AMX-FP16 and PREFETCHI). And we haven't removed those flags in i386-gen.c. It seems that we could also safely remove them right? 3. Removed lockbad testcases in WRMSRNS, MSRLIST, PREFETCHI. Since most of the insts are lockbad, the testcases in these three patches are not needed. 4. Combined CMPccXADD insts in i386-opc.tbl. Use to combine them, also include those alias not is documentation. Including them is better for developer to use them. 5. Changes in tables due to folding AVXVNNI entry patch. 6. Correct the wrong comment for CpuUnused in CMPccXADD patch and add missing comma for SUBARCH in that patch. 7. Fix in comments for singular, VexVVVV=1 to VexVVVV, Vex128 to Vex. 8. Removal for ALL noxxx things in texi file. The reviews need further discussion/investigation: 1. PseudoVexPrefix related ISAs. 2. Table combination and usage in CMPccXADD. Need further investigation how we could make it simpler. And I haven't investigated whether OP_M usage can save the modrm_table pass. 3. SwapSources in CMPccXADD. We may need a special identifier for CMPccXADD since we have VVVV at operand 3, where it is always at operand 2 for all other insts which have VVVV. That is the reason we reuse SwapSources. It might be not that same as the original meaning. But we want to avoid adding a bit for this very rare case. Do we need to change that? 4. The replacement from _ to - in i386-opc.tbl comments. It seems that recent ISA patches are mostly using _. So I am confused about that. 5. Testcase for WRMSRNS and MSRLIST. The 32bit and 64bit can be shared as mentioned. But we cannot just remove one of them right? All the above are the changes in V2 patch. If there is something missing, just remind us. Thx, Haochen