Started by user snail Running as SYSTEM [EnvInject] - Loading node environment variables. Building remotely on docker-jenkins-agent in workspace /home/jenkins/agent/workspace/gcc-patch [WS-CLEANUP] Deleting project workspace... [WS-CLEANUP] Deferred wipeout is used... [WS-CLEANUP] Done The recommended git tool is: NONE using credential 0adb5fc7-caa2-429d-97d2-c7fa2fa1d884 Cloning the remote Git repository Using shallow clone with depth 1 Avoid fetching tags Cloning repository git@github.com:plctlab/patchwork-gcc.git > git init /home/jenkins/agent/workspace/gcc-patch # timeout=10 Fetching upstream changes from git@github.com:plctlab/patchwork-gcc.git > git --version # timeout=10 > git --version # 'git version 2.37.2' using GIT_SSH to set credentials patchwork github wangliu-iscas git ssh key Verifying host key using known hosts file, will automatically accept unseen keys > git fetch --no-tags --force --progress --depth=1 -- git@github.com:plctlab/patchwork-gcc.git +refs/heads/*:refs/remotes/origin/* # timeout=10 > git config remote.origin.url git@github.com:plctlab/patchwork-gcc.git # timeout=10 > git config --add remote.origin.fetch +refs/heads/*:refs/remotes/origin/* # timeout=10 Avoid second fetch > git rev-parse refs/remotes/origin/master^{commit} # timeout=10 Checking out Revision 593c8b73fb15683fdd1a9d85fe7e7e99540de3c8 (refs/remotes/origin/master) > git config core.sparsecheckout # timeout=10 > git checkout -f 593c8b73fb15683fdd1a9d85fe7e7e99540de3c8 # timeout=10 Commit message: "fixincludes: Bypass solaris_math_12 on newer Solaris 11.4" > git rev-list --no-walk 593c8b73fb15683fdd1a9d85fe7e7e99540de3c8 # timeout=10 [EnvInject] - Mask passwords that will be passed as build parameters. [EnvInject] - Executing scripts and injecting environment variables after the SCM step. [EnvInject] - Injecting as environment variables the properties content GITHUB_REPO=https://github.com/plctlab/patchwork-gcc PATCHWORK_URL=https://patchwork.plctlab.org [EnvInject] - Variables injected successfully. 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50919 [COMMITTED] gccrs: backend: Expose Bvariable class through rust-gcc header | | | 50933 [COMMITTED] gccrs: testsuite: add loop condition execution test | | | 50932 [COMMITTED] gccrs: const generics: Forbid default values in Functions, Traits and Impls | | | 50935 [COMMITTED] gccrs: attributes: Add #[macro_use] as builtin | | | 50928 [COMMITTED] gccrs: module lowering: Do not append null pointers as items | | | 50930 [COMMITTED] gccrs: Static Items must be const evaluated | | | 50934 [COMMITTED] gccrs: Statics are a coercion site | | | 50923 [COMMITTED] gccrs: Add testcase for const-eval issue from rust-blog | | | 50931 [COMMITTED] gccrs: rust: Add -frust-compile-until option | | | 50929 [COMMITTED] gccrs: expand: eager evaluate macros inside builtin macros | | | 50920 [COMMITTED] gccrs: testsuite/rust: add a testcase for testing ... | | | 50927 [COMMITTED] gccrs: Cleanup formatting of backend expression visitor | | | 50917 [COMMITTED] gccrs: Make constexpr constructors type-checking more permissive | | | 50922 [COMMITTED] gccrs: Add testcase to show forward declared items work | | | 50936 [COMMITTED] PR target/108589 - Check REG_P for AARCH64_FUSE_ADDSUB_2REG_CONST1 | | | 51000 [pushed] c++: Add fixed test [PR102870] | | | 51029 PR tree-optimization/108356 - Ranger cache - always use range_from_dom when updating. | | | 51031 c++: ICE with -Wlogical-op [PR107755] | | | 51044 RISC-V: Add RVV shift.vx C/C++ API support | | | 51046 RISC-V: Add vsrl.vx C API tests | | | 51047 RISC-V: Add vsra.vx C API tests | | | 51048 RISC-V: Add vsll.vx C++ API tests | | | 51049 RISC-V: Add shift constraint tests | | | 51050 RISC-V: Add vsrl.vx C++ API tests | | | 51051 RISC-V: Add vsra.vx C++ API tests | | | 51054 RISC-V: Add vsll.vx C++ API tests | | | 51068 libsanitizer: cherry-pick commit 742bcbf685bc from upstream | | | 51073 [pushed] wwwdocs: gcc-5: Fix deep link into GDB manual | | | 51109 [pushed] c++: aggregate base and TARGET_EXPR_ELIDING_P [PR108559] | | | 51121 Simplify "1 - bool_val" to "bool_val ^ 1" | | | 51119 Simplify "1 - bool_val" to "bool_val ^ 1" | | | 51122 RISC-V: Fix constraint bug for binary operation | | | 51134 [pushed] doc: add notes about limitations of -fanalyzer | | | 51135 [pushed] c++: Add -Wno-changes-meaning | | | 51136 [pushed] analyzer: fix -Wanalyzer-allocation-size false -ve on alloca [PR108616] | | | 51137 [pushed] analyzer: fix uses of alloca in testsuite | | | 51210 x86: Use DW_EH_PE_indirect|DW_EH_PE_pcrel encodings for -fno-pic code | | | 51211 [1/3] New reg note REG_CFA_NORESTORE | | | 51213 [2/3] IBM zSystems: Make stack_tie to work with hard frame-pointer | | | 51212 [3/3] IBM zSystems: Save argument registers to the stack -mpreserve-args | | | 51250 [committed] c++, openmp: Handle some OMP_*/OACC_* constructs during constant expression evaluation [PR108607] | | | 51253 arm: Fix warning in libgcc/config/arm/pr-support.c | | | 51252 arm: [MVE] Add missing length=8 attribute | | | 51259 [pushed] testsuite: Fix g++.dg/gomp warnings for aarch64 | | | 51260 [pushed] compare-elim: Fix an RTL checking failure | | | 51261 [pushed] wwwdocs: readings: Remove Herman D. Knoble's Fortran Resources | | | 51262 [pushed] wwwdocs: testing: Update LAPACK links | | | 51310 ree: Fix -fcompare-debug issues in combine_reaching_defs [PR108573] | | | 51312 [og12] Fix 'omp_allocator_handle_kind' example in 'gfortran.dg/gomp/allocate-4.f90' (was: [PATCH 1/5] [gfortran] Add parsing support for allocate directive (OpenMP 5.0).) | | | 51315 CPROP: Allow cprop optimization when the function has a single block | | | 51359 libstdc++ testsuite: Correct S0 in std/time/hh_mm_ss/1.cc | | | 51423 amdgcn: Add instruction pattern for conditional shift operations | | | 51476 [committed,v2] testsuite: Run __bos tests to completion | | | 51501 PR tree-optimization/107570 - Reset SCEV after folding in VRP. | | | 51547 [committed] Fortran: error recovery on invalid array section [PR108609] | | | 51572 [committed] libstdc++: Do not embed tzdata.zi for 8-bit and 16-bit targets | | | 51573 [committed] libstdc++: Fix build failures for avr | | | 51574 [committed] libstdc++: Fix std::random_device for avr | | | 51612 [pushed] wwwdocs: readings: Update Nios II reference | | | 51613 [pushed] libstdc++: Fix link to online GDB manual | | | 51614 [pushed] wwwdocs: frontends: Switch www.modula3.org to https | | | 51615 [pushed] libstdc++: Switch a www.open-std.org link to https | | | 51626 [vect] Don't peel nonlinear iv(mult or shift) for epilog when vf is not constant. | | | 51726 [v5,RISCV] Add 'Zfa' extension according to riscv-isa-manual | | | 51727 Add x86_64-gnu target to contrib/config-list.mk | | | 51799 s390: Add LEN_LOAD/LEN_STORE support. | | | 51806 [committed] nested, openmp: Wrap OMP_CLAUSE_*_GIMPLE_SEQ into GIMPLE_BIND for declare_vars [PR108435] | | | 51810 Replace IFN_TRAP with BUILT_IN_UNREACHABLE_TRAP [PR107300] | | | 51829 rtl-ssa: Fix splitting of clobber groups [PR108508] | | | 51869 [committed] libgomp.texi (OpenMP TR11 impl. status): Fix 'strict' item | | | 51872 middle-end/108625 - wrong folding due to misinterpreted ! | | | 51877 RISC-V: Fix bug of TARGET_COMPUTE_MULTILIB implemented in riscv. | | | 51878 [committed] amdgcn, libgomp: Manually allocated stacks | | | 51942 libgomp: Fix reverse offload issues | | | 51944 [pushed] analyzer: add deref-before-check-qemu-qtest_rsp_args.c test case | | | 51948 [pushed] analyzer: fix -Wanalyzer-fd-type-mismatch false +ve on "listen" [PR108633] | | | 51953 tree: Use comdat tree_code_{type,length} even for C++11/14 [PR108634] | | | 51978 [pushed] testsuite: Add case-values-threshold to pr107876.C | | | 51979 [pushed] rtl-ssa: Extend m_num_defs to a full unsigned int [PR108086] | | | 52074 ipa: Avoid invalid gimple when IPA-CP and IPA-SRA disagree on types (108384) | | | 52099 [committed] libstdc++: Use emplace in std::variant::operator=(T&&) as per LWG 3585 | | | 52100 [committed] libstdc++: Fix std::filesystem errors with -fkeep-inline-functions [PR108636] | | | 52102 Bump up precision size to 16 bits. | | | 52103 [committed] libstdc++: Define std::basic_stringbuf::view() for old std::string ABI | | | 52106 [committed] libstdc++: Use ENOSYS for unsupported filesystem ops on AVR | | | 52107 c++: spurious ADDR_EXPR after overload set pruning [PR107461] | | | 52110 libstdc++: Limit allocations in _Rb_tree | | | 52158 [committed] c: Update checks on constexpr floating-point initializers | | | 52168 testsuite: XFAIL g++.dg/pr71488.C and warn/Warray-bounds-16.C, PR107561 | | | 52176 [pushed] wwwdocs: gcc-11: Update arm "Straight-line Speculation vulnerability" link | | | 52208 [committed] c: Update nullptr_t comparison checks | | | 52225 c++: can't eval PTRMEM_CST in incomplete class [PR107574] | | | 52303 RISC-V: Remove unnecessary register class. | | | 52315 [1/2] PR target/107299: Fix build issue when long double is IEEE 128-bit | | | 52316 [2/2] Rework 128-bit complex multiply and divide. | | | 52325 RISC-V: Add binary vx C/C++ support | | | 52326 RISC-V: Add vmul.vv C API tests | | | 52327 RISC-V: Add vmul.vv C++ API tests | | | 52332 RISC-V: Add vxor.vx C API tests | | | 52333 RISC-V: Add vsub.vx C API tests | | | 52335 RISC-V: Add vrsub.vx C API tests | | | 52336 RISC-V: Add vremu.vx C API tests | | | 52337 RISC-V: Add vrem.vx C API tests | | | 52343 RISC-V: Add vor.vx C API tests | | | 52344 RISC-V: Add vmul.vx C API tests | | | 52347 [aarch64] Code-gen for vector initialization involving constants | | | 52345 RISC-V: Add vminu.vx C API tests | | | 52346 RISC-V: Add vmin.vx C API tests | | | 52348 RISC-V: Add vmaxu.vx C API tests | | | 52349 RISC-V: Add vmax.vx C API tests | | | 52350 RISC-V: Add vdivu C API tests | | | 52351 RISC-V: Add vdiv.vx C API tests | | | 52356 RISC-V: Add vand.vx C API tests | | | 52357 RISC-V: Add vadd.vx C API tests | | | 52359 RISC-V: Add binary op vx constraint tests | | | 52363 RISC-V: Add vxor.vx C++ API tests | | | 52364 RISC-V: Add vsub.vx C++ API tests | | | 52366 RISC-V: Add vrsub.vx C++ API tests | | | 52369 RISC-V: Add vadd.vx C++ API tests | | | 52371 RISC-V: Add vremu.vx C++ API tests. | | | 52372 RISC-V: Add vrem.vx C++ API tests | | | 52373 RISC-V: Add vor.vx C++ API tests | | | 52375 RISC-V: Add vmul.vx C++ API testcase | | | 52377 RISC-V: Add vminu.vx C++ API tests | | | 52382 RISC-V: Add vmin.vx C++ API tests | | | 52387 RISC-V: Add vmaxu.vx C++ API tests. | | | 52388 RISC-V: Add vmax.vx C++ API tests. | | | 52389 RISC-V: Add vdivu.vx C++ API tests | | | 52391 RISC-V: Add vdiv.vx C++ API test. | | | 52392 RISC-V: Add vand.vx C++ API test. | | | 52410 [PR,tree-optimization/18639] Compare nonzero bits in irange with widest_int. | | | 52417 MIPS: use arch_32/64 instead of default_mips_arch | | | 52418 ifcvt: Fix regression in aarch64/fcsel_1.c | | | 52434 [v1] RISC-V: Change the generation mode of ADJUST_SP_RTX from gen_insn to gen_SET. | | | 52455 [1/4] rs6000: build constant via li;rotldi | | | 52457 [2/4] rs6000: build constant via lis;rotldi | | | 52456 [3/4] rs6000: build constant via li/lis;rldicl/rldicr | | | 52458 [4/4] rs6000: build constant via li/lis;rldic | | | 52483 Speedup cse_insn | | | 52490 openmp: Add support for 'present' modifier | | | 52522 Improve RTL CSE hash table hash usage | | | 52544 [wwwdocs] document modula-2 in gcc-13/changes.html (and index.html) | | | 52600 LoongArch: Generate bytepick.[wd] for suitable bit operation pattern | | | 52602 [v2] c++: wrong error with constexpr array and value-init [PR108158] | | | 52603 range-ops: Handle undefined ranges in frange op[12]_range [PR108647] | | | 52612 [pushed] c++: Add fixed test [PR101071] | | | 52635 range-op: Handle op?.undefined_p () in op[12]_range of comparisons [PR108647] | | | 52634 fortran: Fix up hash table usage in gfc_trans_use_stmts [PR108451] | | | 52633 ubsan: Fix up another spot that should have been BUILT_IN_UNREACHABLE_TRAPS [PR108655] | | | 52617 [pushed] libstdc++: Tweak link to ABIcheck project | | | 52618 [pushed] wwwdocs: news/profiledriven: Move citeseerx.ist.psu.edu to https | | | 52652 [1/8] PowerPC: Add -mcpu=future. | | | 52653 [1/8] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair | | | 52654 [2/8] PowerPC: Add support for accumulators in DMR registers. | | | 52656 [3/8] PowerPC: Make MMA insns support DMR registers. | | | 52657 [4/8] PowerPC: Switch to dense math names for all MMA operations | | | 52658 [6/8] PowerPC: Add support for 1,024 bit DMR registers. | | | 52659 [7/8] Support load/store vector with right length. | | | 52660 [8/8] Add saturating subtract built-ins. | | | 52700 [pushed] libstdc++: Adjust link to pdftex | | | 52703 RISC-V: Add unary C/C++ API support | | | 52704 RISC-V: Add vnot.v C API tests | | | 52705 RISC-V: Add vneg.v C/C++ API tests | | | 52706 RISC-V: Add unary constraint tests. | | | 52708 RISC-V: Add vnot.v C++ API tests | | | 52709 RISC-V: Add vneg.v C++ API tests | | | 52715 RISC-V: Fix VSETVL PASS bug in exception handling | | | 52723 libstdc++: Avoid use of naked int32_t in unseq_backend_simd.h, PR108672 | | | 52793 [v3] emit DW_AT_name for DW_TAG_GNU_formal_parameter_pack [PR70536] | | | 52819 c++: equivalence of non-dependent calls [PR107461] | | | 52817 [pushed] wwwdocs: projects/beginner: Remove traces of Interix | | | 52818 [DOC] Document the VEC_PERM_EXPR tree code (and minor clean-ups). | | | 52834 Enable AVX512 512bit vectors by default on Zen4 | | | 52851 RISC-V: Add saturating Addition && Subtraction C/C++ Support | | | 52852 RISC-V: Add saturating Add && Sub vx constraint tests | | | 52853 RISC-V: Add vsadd.vv C++ API tests | | | 52854 RISC-V: Add vsaddu.vv C++ API tests. | | | 52855 RISC-V: Add vsub.vv C++ API tests | | | 52856 RISC-V: Add vssubu.vv C++ API tests | | | 52857 RISC-V: Add vssubu.vv C API tests | | | 52858 RISC-V: Add vssub.vv C API tests | | | 52859 RISC-V: Add vsaddu.vv C API tests | | | 52860 RISC-V: Add vsadd.vv C API tests | | | 52872 [1/3] Allow default libc to be specified to configure | | | 52870 [2/3] Add newlib and picolibc as default C library choices | | | 52871 [3/3] Add '--oslib=' option when default C library is picolibc | | | 52874 RISC-V: Add vssubu.vx C API tests | | | 52875 RISC-V: Add vssub.vx C API tests | | | 52876 RISC-V: Add vsaddu.vx C++ API tests | | | 52877 RISC-V: Add vsadd.vx C++ API tests | | | 52878 RISC-V: Add vssubu.vx C++ API tests | | | 52879 RISC-V: Add vssub.vx C++ API tests | | | 52880 RISC-V: Add vsaddu.vx overloaded API tests | | | 52881 RISC-V: Add vsadd.vx C++ overloaded API tests | | | 52919 [pushed] wwwdocs: mirrors: Remove ftp.uvsq.fr mirror | | | 52920 [pushed] doc: Remove note on PW32 | | | 52990 RISC-V: Add vsext/vzext C/C++ intrinsic support | | | 52991 RISC-V: Add vzext.vf8 C API tests | | | 52992 RISC-V: Add vzext.vf4 C API tests | | | 52993 RISC-V: Add vzext.vf2 C API tests | | | 52994 RISC-V: Add vsext.vf8 C API tests | | | 52995 RISC-V: Add vsext.vf4 C API tests | | | 52996 RISC-V: Add vsext.vf2 C API tests | | | 52997 RISC-V: Add vsext constraint tests | | | 52998 RISC-V: Add vzext.vf8 C++ API tests | | | 52999 RISC-V: Add vzext.vf4 C++ API tests | | | 53000 RISC-V: Add vzext.vf2 C++ API tests | | | 53001 RISC-V: Add vsext C++ API tests | | | 53193 AArch64[committed] testsuite: remove broken test | | | 53194 RISC-V: Add vmulh C/C++ support | | | 53195 libgomp: Fix reverse-offload for GOMP_MAP_TO_PSET | | | 53201 RISC-V: Add vmulhu.vx C API tests | | | 53203 RISC-V: Add vmulhu.vv C API tests | | | 53204 RISC-V: Add vmulhsu.vx C API tests | | | 53210 RISC-V: Add vmulhsu.vv C API tests | | | 53217 RISC-V: Add vmulh.vx C API tests | | | 53218 RISC-V: Add vmulh.vv C API tests | | | 53219 RISC-V: Add vmulhu.vx C++ tests | | | 53220 RISC-V: Add vmulhsu.vx C++ API tests | | | 53221 RISC-V: Add vmulhsu.vv C++ API tests | | | 53222 RISC-V: Add vmulh.vx C++ API tests | | | 53223 RISC-V: Add vmulh.vv C++ API tests | | | 53227 aarch64: Fix up bfmlal lane pattern [PR104921] | | | 53253 [V2] Handle component_ref to a structre/union field including flexible array member [PR101832] | | | 53311 [committed] libstdc++: Disable building additional archives for freestanding | | | 53313 [committed] libstdc++: Fix testsuite warnings about new C++23 deprecations | | | 53312 [committed] libstdc++: Fix non-reserved name for template parameter | | | 53326 aarch64: Fix return_address_sign_ab_exception.C regression | | | 53344 lto-wrapper: Pass through -funwind-tables and -fasynchronous-unwind-tables | | | 53442 [committed] amdgcn: Pass -mstack-size through to runtime | | | 53482 Fortran: ASSOCIATE variables should not be TREE_STATIC [PR95107] | | | 53486 [pushed] wwwdocs: projects/tree-ssa: Use our own copy of GCC Summit 2007 proceedings | | | 53491 [pushed] wwwdocs: readings: Update reference for Blackfin | | | 53701 RISC-V: Add integer widening instructions | | | 53702 RISC-V: Add vwsubu.wx C API tests | | | 53703 RISC-V: Add vwsubu.wx C API tests | | | 53704 RISC-V: Add vwsubu.vx C API tests | | | 53705 RISC-V: Add vwsubu.vv C API tests | | | 53706 RISC-V: Add vwsub.wx C API tests | | | 53707 RISC-V: Add vwsub.wv C API tests | | | 53709 RISC-V: Add vwsub.vx C API tests | | | 53711 RISC-V: Add vwsub.vv C API tests | | | 53712 RISC-V: Add vwmulu C API tests | | | 53713 RISC-V: Add vwmulsu C API tests | | | 53715 RISC-V: Add vwmul C api tests | | | 53716 RISC-V: Add vwcvt C API test | | | 53717 RISC-V: Add vwaddu.w C API tests | | | 53718 RISC-V: Add vwaddu.v C API tests | | | 53719 RISC-V: Add vwadd.w C API tests | | | 53721 RISC-V: Add vwadd.v C API tests | | | 53722 RISC-V: Add constraint tests | | | 53723 RISC-V: Add vwsubu.w C++ api TETS | | | 53724 RISC-V: Add vwsubu.v C++ API test | | | 53725 RISC-V: Add vwsub.w C++ api TESTS | | | 53726 RISC-V: Add vwsub.v C++ API tests | | | 53727 RISC-V: Add vwmulu C++ API tests | | | 53729 RISC-V: Add vwmulsu.v C++ API tests | | | 53730 RISC-V: Add vwmul.v C++ api TETS | | | 53731 RISC-V: Add vwcvt C++ api test | | | 53732 RISC-V: Add vwaddu.w c++ API TESTS | | | 53733 RISC-V: Add vwaddu.v C++ API tests | | | 53734 RISC-V: Add vwadd.w C++ API tests | | | 53735 RISC-V: Add vwadd v C++ api test | | | 53764 RISC-V: allow vx instruction use "zero" as scalar register. | | | 53775 cgraph: Handle simd clones in cgraph_node::set_{const,pure}_flag [PR106433] | | | 53778 ipa-split: Don't split returns_twice functions [PR106923] | | | 53792 [committed] testsuite: Expect -Wdeprecated warning in warn/Wstrict-aliasing-bogus-union-2.C for C++23 | | | 53817 lra: Replace subregs in bare uses & clobbers [PR108681] | | | 53866 Print padding size when aligning struct member | | | 53885 rs6000: Add new patterns rlwinm with mask | | | 53887 tree-optimization/26854 - compile-time hog in SSA forwprop | | | 53889 tree-optimization/26854 - slow bitmap operations | | | 53918 [pushed,PR103541] RA: Implement reuse of equivalent memory for caller saves optimization | | | 53991 [v4] c++: -Wdangling-reference with reference wrapper [PR107532] | | | 53992 [pushed] doc: Update -fchar8_t documentation | | | 53993 testsuite: XFAIL bogus g++.dg/warn/Wstringop-overflow-4.C:144, PR106120 | | | 54040 testsuite: Generalize check_effective_target_lra | | | 54059 Fortran: error handling of global entity appearing in COMMON block [PR103259] | | | 54069 [COMMITTED,GCC,12] Fix PR 108582: ICE due to PHI-OPT removing a still in use ssa_name. | | | 54083 [pushed] analyzer: fix -Wanalyzer-use-of-uninitialized-value false +ve on "read" [PR108661] | | | 54100 Fix 'libgomp.fortran/reverse-offload-6.f90' nvptx offloading compilation (was: [Patch] libgomp: Fix reverse offload issues) | | | 54142 RISC-V: Add vadc/vsbc C/C++ API support | | | 54143 RISC-V: Add vadc.vvm/vadc.vxm C API tests | | | 54144 RISC-V: Add vsbc.vvm/vsbc.vxm C API tests | | | 54155 RISC-V: Add vadc C++ API tests | | | 54149 RISC-V: Add vsbc C++ API tests | | | 54156 [2/3] RISC-V: Add vadc C++ API tests | | | 54158 RISC-V: Fix indent [NFC] | | | 54179 [rs6000] Split TImode for logical operations in expand pass [PR100694] | | | 54261 vect-patterns: Fix up vect_widened_op_tree [PR108692] | | | 54263 vect: Check gather/scatter offset types [PR108316] | | | 54262 c++: Mangle EXCESS_PRECISION_EXPR as fold_convert REAL_CST [PR108698] | | | 54288 tree.def: Remove outdated comment on SAD_EXPR | | | 54325 ada: Fix musl build on Linux | | | 54381 RISC-V: Fix indent | | | 54420 gimplify size expressions in parameters for all types [PR107557] [PR108423] | | | 54424 [committed] testsuite: Fix up PR108525 test [PR108525] | | | 54431 [pushed] testsuite: Import objc-dg-prune in execute.exp | | | 54544 [pushed,wwwdocs] gcc-13: linkify some options | | | 54548 [pushed,wwwdocs] gcc-13: add SARIF and other diagnostics improvements | | | 54549 [pushed,wwwdocs] gcc-13: add -Wxor-used-as-pow | | | 54545 [pushed,wwwdocs] gcc-13: add analyzer improvements | | | 54577 [pushed] analyzer: fix overzealous state purging with on-stack structs [PR108704] | | | 54588 tree-optimization: [PR108684] ICE in verify_ssa due to simple_dce_from_worklist | | | 54600 testsuite: Fix asm-goto-with-outputs tests; limit to lra targets | | | 54601 RISC-V: Add vmadc/vsbc C/C++ API support | | | 54602 RISC-V: Add vmadc C API tests | | | 54603 RISC-V: Add vmsbc C API tests | | | 54604 RISC-V: Add vmadc C++ API tests | | | 54608 RISC-V: Add vmsbc C++ API tests | | | 54618 c++: ICE initing lifetime-extended constexpr var [PR107079] | | | 54619 When simplifing BFR of an insert, require a mode precision integral type (PR108688) | | | 54628 [pushed] doc: Change fsf.org to www.fsf.org | | | 54637 libstdc++: testsuite: Add char8_t to codecvt_unicode | | | 54638 [committed] c: Update checks on constexpr pointer initializers | | | 54669 [v2] c++: ICE initing lifetime-extended constexpr var [PR107079] | | | 54797 [pushed] wwwdocs: readings: Update MicroBlaze Processor Reference reference | | | 54800 c++, debug: Fix up locus of DW_TAG_imported_module [PR108716] | | | 54804 Fortran/OpenMP: Fix -fopenmp-simd for 'omp assume(s)' | | | 54827 testsuite: adjust patterns in RISC-V tests to skip unwind table directives | | | 54855 docs: add cavear for __builtin_cpu_supports | | | 54874 [V1,1/1] UNRATIFIED RISC-V: Add 'ZiCond' extension | | | 54878 [og12] 'c-c++-common/gomp/alloc-pinned-1.c' -> 'libgomp.c-c++-common/alloc-pinned-1.c' (was: [PATCH 5/5] openmp: -foffload-memory=pinned) | | | 54879 [og12] '{c-c++-common,gfortran.dg}/gomp/uses_allocators-*' -> 'libgomp.{c-c++-common,fortran}/uses_allocators-*' (was: [PATCH, OpenMP] Implement uses_allocators clause for target regions) | | | 54880 [og12] 'gfortran.dg/gomp/allocate-4.f90' -> 'libgomp.fortran/allocate-5.f90' (was: [PATCH 1/5] [gfortran] Add parsing support for allocate directive (OpenMP 5.0)) | | | 54902 i386: Call get_available_features for all CPUs with max_level >= 1 [PR100758] | | | 54948 [1/2,v3,ping] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns | | | 54949 [2/2,v3,ping] arm: Add support for MVE Tail-Predicated Low Overhead Loops | | | 54984 target/108738 - optimize bit operations in STV | | | 54985 target/108738 - STV bitmap operations compile-time hog | | | 55042 c++: Don't defer local statics initialized with constant expressions [PR108702] | | | 55043 [wwwdocs] gcc-13/changes.html: Document C++ -fexcess-precision=standard | | | 55051 [1/2] middle-end: Fix wrong overmatching of div-bitmask by using new optabs [PR108583] | | | 55052 [2/2] AArch64 Update div-bitmask to implement new optab instead of target hook [PR108583] | | | 55053 c++: ICE with -fno-elide-constructors and trivial fn [PR101073] | | | 55061 c++: sizeof(expr) in non-templated requires-expr [PR108563] | | | 55091 amdgcn: Add instruction patterns for vector operations on complex numbers | | | 55092 [committed] Fortran: catch invalid kind in character conversion [PR69636,PR103779] | | | 55097 RISC-V: Add vnsrl/vnsra/vncvt/vmerge/vmv C/C++ support | | | 55098 [pushed,PR103541] RA: Implement reuse of equivalent memory for caller saves optimization (version 2) | | | 55099 RISC-V: Add vnsrl C API tests | | | 55100 RISC-V: Add vnsra C API tests | | | 55101 RISC-V: Add vncvt C API tests | | | 55102 RISC-V: Add vmv C API tests | | | 55104 RISC-V: Add vmv.v.x C API tests | | | 55105 RISC-V: Add vmerge C API tests | | | 55106 RISC-V: Add vnsrl C++ API tests | | | 55107 RISC-V: Add vnsra C++ API tests | | | 55108 RISC-V: Add vncvt/vmv C++ API tests | | | 55109 RISC-V: Add vmerge C++ API test | | | 55110 [pushed] analyzer: fix further overzealous state purging [PR108733] | | | 55144 PR tree-optimization/108520 - Add function context for querying global ranges. | | | 55171 [committed] c: Allow conversions of null pointer constants to nullptr_t | | | 55183 [COMMITTED] tree-optimization: [PR108684] ICE in verify_ssa due to simple_dce_from_worklist | | | 55190 PR tree-optimization/108687 - Query rangers cache in readonly mode only internally | | | 55203 [v4] rs6000: Fix incorrect RTL for Power LE when removing the UNSPECS [PR106069] | | | 55209 [PATCHv4,AARCH64] Fix PR target/103100 -mstrict-align and memset on not aligned buffers | | | 55237 RISC-V: Add fixed-point support | | | 55239 RISC-V: Add vssrl.vx C API tests | | | 55240 RISC-V: Add vssrl.vv C API tests | | | 55241 RISC-V: Add vssra.vx C API tests | | | 55242 RISC-V: Add vssra.vv C API tests | | | 55243 RISC-V: Add vsmul.vx C API tests | | | 55244 RISC-V: Add vsmul.vv C API tests | | | 55245 RISC-V: Add vnclip C API tests | | | 55246 RISC-V: Add vasubu.vx C API tests | | | 55247 RISC-V: Add vasubu.vv C API tests | | | 55248 RISC-V: Add vasub.vx C API tests | | | 55249 RISC-V: Add vasub.vv C API tests | | | 55250 RISC-V: Add vaaddu.vx C API tests | | | 55251 RISC-V: Add vaaddu.vv C api tests | | | 55252 RISC-V: Add vaadd.vx C api tests | | | 55253 RISC-V: Finish fixed-point C API tests | | | 55254 RISC-V: Add vssrl.vx C++ API tests | | | 55255 RISC-V: Add vssrl.vv C++ API tests | | | 55257 RISC-V: Add vssra.vx C++ API tests | | | 55258 RISC-V: Add vssra.vv C++ API tests | | | 55261 RISC-V: Add vsmul.vx C++ API tests | | | 55262 RISC-V: Add vsmul.vv C++ API tests | | | 55263 RISC-V: Add vnclip C++ API tests | | | 55264 RISC-V: Add vasubu.vx C++ API tests | | | 55266 RISC-V: Add vasubu.vv C++ API tests | | | 55267 RISC-V: Add vasub.vx C++ API tests | | | 55270 RISC-V: Add vasub.vv C++ api tests | | | 55271 RISC-V: Add vaaddu.vx C++ Api tests | | | 55272 RISC-V: Add vaaddu.vv C++ api tests | | | 55273 RISC-V: Add vaadd.vx C++ API tests | | | 55274 RISC-V: Add vaadd.vv C++ API tests | | | 55363 tree-optimization/106722 - fix CD-DCE edge marking | | | 55366 [GCC] In 'contrib/config-list.mk', clarify i686-symbolics-gnu to i686-gnu (was: RFA: Add makefile for cross-configuration torture test) | | | 55367 RISC-V: Add Full 'v' extension predicate to vsmul intrinsic | | | 55387 tree-optimization/108724 - vectorized code getting piecewise expanded | | | 55399 [v2] OpenMP/Fortran: Fix loop-iter var privatization with !$OMP LOOP [PR108512] | | | 55466 [pushed,PR108500] RA: Use simple LRA for huge functions | | | 55500 [pushed,PR108754] RA: Use caller save equivalent memory only for LRA | | | 55571 [pushed] wwwdocs: news/profiledriven: Update a Citeseer link | | | 55611 [RFC,v1,01/10] docs: Document a canonical RTL for a conditional-zero insns | | | 55612 [RFC,v1,02/10] RISC-V: Recognize Zicond (conditional operations) extension | | | 55613 [RFC,v1,03/10] RISC-V: Generate czero.eqz/nez on noce_try_store_flag_mask if-conversion | | | 55617 [RFC,v1,04/10] RISC-V: Support immediates in Zicond | | | 55616 [RFC,v1,05/10] RISC-V: Support noce_try_store_flag_mask as czero.eqz/czero.nez | | | 55619 [RFC,v1,06/10] RISC-V: Recognize sign-extract + and cases for czero.eqz/nez | | | 55622 [RFC,v1,07/10] RISC-V: Recognize bexti in negated if-conversion | | | 55621 [RFC,v1,08/10] ifcvt: add if-conversion to conditional-zero instructions | | | 55614 [RFC,v1,09/10] RISC-V: Recognize xventanacondops extension | | | 55623 [RFC,v1,10/10] RISC-V: Support XVentanaCondOps extension | | | 55626 [pushed] analyzer: don't warn for deref-before-check for checks in macros [PR108745] | | | 55663 [v3,1/2] Handle component_ref to a structre/union field including C99 FAM [PR101832] | | | 55664 [v3,2/2] Update documentation to clarify a GCC extension (PR77650) | | | 55677 RISC-V: Optimize the code gen of VLM/VSM. | | | 55742 [pushed] libstdc++: Update link to "Worst-case efficient priority queues" | | | 55743 [pushed] wwwdocs: readings: Update link to RX610 landing page | | | 55744 builtin-declaration-mismatch-7: fix LLP64 targets | | | 55754 RISC-V: Bugfix for mode tieable of the rvv bool types | | | 55764 ipa-cp: Punt for too large offsets [PR108605] | | | 55801 [pushed] doc: Adjust link to WG14 N965 | | | 55836 IBM zSystems: Do not propagate scheduler state across basic blocks [PR108102] | | | 55842 IBM zSystems: Fix predicate execute_operation | | | 55884 [pushed] libstdc++: Change www.unix.org to unix.org | | | 55896 RISC-V: Handle vlenb correctly in unwinding | | | 55900 [pushed] doc: Remove direct reference to configure/build docs | | | 55965 [C] Fix ICE related to implicit access attributes for VLA arguments [PR105660] | | | 55980 [pushed] libstdc++: Tweak link to N1780 (C++ standard) | | | 56000 [V2] rs6000: Add new patterns rlwinm with mask | | | 56045 [V2] rs6000: Enhance lowpart/highpart DI->SF by mtvsrws/mtvsrd | | | 56059 RISC-V: Add integer compare C/C++ intrinsic support | | | 56061 RISC-V: Add vmsne.vx C api tests | | | 56062 RISC-V: Add vmsne vv C api tests | | | 56063 RISC-V: Add vmslt vx C api tests | | | 56064 RISC-V: Add vmslt vv C api tests | | | 56065 RISC-V: Add vmsle vx C api tests | | | 56066 RISC-V: Add vmsle vv C api tests | | | 56067 RISC-V: Add vmsgt vx C api tests | | | 56068 RISC-V: Add vmsgt vv C api tests | | | 56075 RISC-V: Add vmsge vx C api tests | | | 56076 RISC-V: Add vmsge vv C api tests | | | 56083 RISC-V: Add vmseq vx C api tests | | | 56084 RISC-V: Add vmseq vv C api tests | | | 56085 RISC-V: Add binop constraints tests for integer compare | | | 56086 RISC-V: Add vmsne vx C++ tests | | | 56087 RISC-V: Add vmsne vv C++ tests | | | 56088 RISC-V: Add vmslt vx C++ tests | | | 56089 RISC-V: Add vmslt vv C++ api tests | | | 56090 RISC-V: Add vmsle vx C++ api tests | | | 56091 RISC-V: Add vmsle vv C++ api tests | | | 56092 RISC-V: Add vmsgt vx C++ tests | | | 56093 RISC-V: Add vmsgt vv C++ tests | | | 56094 RISC-V: Add vmsge vx C++ api tests | | | 56095 RISC-V: Add vmsge vv C++ tests | | | 56096 RISC-V: Add vmseq vx C++ tests | | | 56097 RISC-V: Add vmseq vv C++ tests | | | 56109 [(pushed)] docs: document new param | | | 56129 [committed] arc: Don't use millicode thunks unless asked for. | | | 56165 LoongArch: Fix multiarch tuple canonization | | | 56168 [Ping] ifcvt: Fix regression in aarch64/fcsel_1.c | | | 56186 [Ping^3] gomp: Various fixes for SVE types [PR101018] | | | 56194 [1/5] RISC-V: Add prototypes for RISC-V Crypto built-in functions | | | 56200 [2/5] RISC-V: Implement ZBKB, ZBKC and ZBKX extensions | | | 56199 [3/5] RISC-V: Implement ZKND and ZKNE extensions | | | 56192 [4/5] RISC-V: Implement ZKNH extensions | | | 56196 [5/5] RISC-V: Implement ZKSH and ZKSED extensions | | | 56201 tree-optimization/108691 - indirect calls to setjmp | | | 56329 tree-optimization/28614 - high FRE time for gcc.c-torture/compile/20001226-1.c | | | 56397 c++: fix ICE in joust_maybe_elide_copy [PR106675] | | | 56398 [1/2] c++: factor out TYPENAME_TYPE substitution | | | 56399 [2/2] c++: TYPENAME_TYPE lookup ignoring non-types [PR107773] | | | 56563 Ping: [PATCH+wwwdocs 0/8] A small Texinfo refinement | | | 56489 apply debug-remap to file names in .su files | | | 56490 i386: Relax extract location operand mode requirements [PR108516] | | | 56536 libgomp: Fix 'target enter data' with always pointer | | | 56548 [pushed,PR108774] RA: Clear reg equiv caller_save_p flag when clearing defined_p flag | | | 56552 [committed] Fortran: error recovery after invalid use of CLASS variable [PR103475] | | | 56589 [pushed] libstdc++: Adjust "The Component Object Model" reference | | | 56609 debug: Support "phrs" for dumping a HARD_REG_SET | | | 56775 asan: Add --param=asan-kernel-mem-intrinsic-prefix= [PR108777] | | | 56789 RISC-V: Finish all integer C/C++ intrinsics | | | 56806 nvptx: Adjust 'scan-assembler' in 'gfortran.dg/weak-1.f90' (was: Support for NOINLINE attribute) | | | 56837 More LLP64 fixes and __PIC__ values fixes for PE targets | | | 56885 c++: Add testcases from some Issaquah DRs | | | 56886 tree-optimization/108782 - nested first order recurrence vectorization | | | 56904 Fix small regression in Ada | | | 56905 [og12] In 'libgomp/allocator.c:omp_realloc', route 'free' through 'MEMSPACE_FREE' (was: [PATCH] libgomp, OpenMP, nvptx: Low-latency memory allocator) | | | 56957 RISC-V: Add vwmacc vx C api tests | | | 56965 RISC-V: Add vwmacc vv C api tests | | | 56967 RISC-V: Add vnmsub vv C api tests | | | 56968 RISC-V: Add vnmsub vx rv64 C api tests | | | 56969 RISC-V: Add vnmsub vx rv32 C api tests | | | 56970 RISC-V: Add vnmsac rv64 C api tests | | | 56971 RISC-V: Add vnmsac vx C api tests | | | 56972 RISC-V: Add vnmsac vv C api tests | | | 56973 RISC-V: Add vmadd vx rv64 c api tests | | | 56974 RISC-V: Add vmadd vx c api tests | | | 56976 RISC-V: Add vmadd vv C api tests | | | 56977 RISC-V: Add vmacc vx c api tests | | | 56979 RISC-V: Add vmacc vx rv32 c api tests | | | 56989 RISC-V: Add vmacc vv c api tests | | | 56991 RISC-V: Add vmacc vv c api tests | | | 56996 RISC-V: Add ternary constraint tests | | | 57014 RISC-V: Add vwmacc vx C++ api tests | | | 57015 RISC-V: Add vwmacc vv C++ api tests | | | 57017 RISC-V: Add vnmsub vx rv64 c++ api tests | | | 57018 RISC-V: Add vnmsub vx rv32 c++ api tests | | | 57019 RISC-V: Add vnmsub vv c++ api tests | | | 57020 RISC-V: Add vnmsac vx rv64 C++ api tests | | | 57021 Speedup DF dataflow solver | | | 57022 RISC-V: Add vnmsac vx C++ api tests | | | 57023 RISC-V: Add vnmsac vv c++ api tests | | | 57024 RISC-V: Add vmadd vx C++ api test | | | 57027 RISC-V: Add vmadd vx c++ api tests | | | 57028 RISC-V: Add vmadd vv c++ api test | | | 57035 RISC-V: Add vmacc vx rv32 c++ api tests | | | 57040 RISC-V: Add vmacc vx rv64 c++ api tests | | | 57044 RISC-V: Add vmacc vv c++ api tests | | | 57059 ipa: Avoid IPA confusing scalar values and single-field aggregates (PR 108679) | | | 57060 More DF worklist solver improvements | | | 57063 RISC-V: Replace simm32_p with immediate_operand (Pmode) | | | 57065 Improve VN PHI hash table handling | | | 57066 Fix possible sanopt compile-time hog | | | 57078 RISC-V: Remove "extern??? for namespace [NFC] | | | 57186 bpf: fix memory constraint of ldx/stx instructions [PR108790] | | | 57210 [pushed] libstdc++: Update an open-std.org link | | | 57243 RISC-V: Rearrange the organization of declarations of RVV intrinsics [NFC] | | | 57246 [og12] Address cast to pointer from integer of different size in 'libgomp/target.c:gomp_target_rev' (was: [OG12][committed] openmp: Add support for the 'present' modifier) | | | 57272 RISC-V: Move saturating add/subtract md pattern location [NFC] | | | 57291 gen_reload: Correct parameter for fatal_insn call | | | 57335 [pushed] wwwdocs: news/profiledriven: Update a link | | | 57351 warn-access: wrong -Wdangling-pointer with labels [PR106080] | | | 57423 [(pushed)] docs: document new --param=asan-kernel-mem-intrinsic-prefix | | | 57424 RISC-V: Normalize SEW = 64 handling into a simplified function | | | 57436 [committed] powerpc: Fix up expansion for WIDEN_MULT_PLUS_EXPR [PR108787] | | | 57460 bpf: Fix double whitespace warning | | | 57469 Update baseline symbols for aarch64-linux | | | 57478 [pushed] testsuite, objective-c: Fix a testcase on Windows. | | | 57484 RISC-V: Rename tu_preds to none_tu_preds [NFC] | | | 57546 doc: Suggest fix for -Woverloaded-virtual warnings | | | 57552 harden-sls-6.c: fix warning on LLP64 | | | 57554 [v2] warn-access: wrong -Wdangling-pointer with labels [PR106080] | | | 57596 Fix PR target/90458 | | | 57599 i386: Rename extr_register_operand to int248_register_operand | | | 57600 testsuite/i386: Cleanup target selectors in i386 target directory. | | | 57601 reload: Handle generating reloads that also clobbers flags | | | 57637 PR tree-optimization/108697 - Create a lazy ssa_cache | | | 57680 [og12] Fix 'libgomp.{c-c++-common,fortran}/target-present-*' test cases (was: [OG12][committed] openmp: Add support for the 'present' modifier) | | | 57683 testsuite: Handle "packed" targets in c-c++-common/auto-init-7.c and -8.c | | | 57704 [pushed] analyzer: fix uninit false +ves [PR108664, PR108666, PR108725] | | | 57713 i386: Relax extract location operand mode requirements | | | 57719 [1/7] libstdc++: Ensure __builtin_constant_p isn't lost on the way | | | 57723 [2/7] libstdc++: Annotate most lambdas with always_inline | | | 57720 [3/7] libstdc++: Document timeout and timeout-factor of simd tests | | | 57724 [4/7] libstdc++: Use a PCH to speed up check-simd | | | 57722 [5/7] libstdc++: printf format string fix in testsuite | | | 57725 [6/7] libstdc++: Fix incorrect __builtin_is_constant_evaluated calls | | | 57721 [7/7] libstdc++: Fix incorrect function call in -ffast-math optimization | | | 57741 [committed] Fortran: error recovery on invalid assumed size reference [PR104554] | | | 57743 [committed] Fortran: error recovery on checking procedure argument intent [PR103608] | | | 57770 testsuite: Add CRIS to check_effective_target_lra non-LRA list | | | 57771 objs-gcc.sh: Only bootstrap if source-directory contains gcc | | | 57827 RISC-V: Add RVV all mask C/C++ intrinsics support | | | 57828 RISC-V: Fix vmnot asm check (Should check vmnot.m instead of vmnot.mm) | | | 57829 RISC-V: Add vm* mask C api tests | | | 57830 RISC-V: Add vid.v/viota.m C api tests | | | 57831 RISC-V: Add the res of all mask C api tests | | | 57832 RISC-V: Add vm* C++ api tests | | | 57833 RISC-V: Add all mask C++ api tests | | | 57880 [1/2,GCC12] AArch64: Update transitive closures of aes, sha2 and sha3 extensions | | | 57881 [2/2,GCC12] AArch64: Gate various crypto intrinsics availability based on features | | | 57891 tree-optimization/108791 - checking ICE with sloppy ADDR_EXPR | | | 57894 [1/5] Add prototypes for RISC-V Crypto built-in functions | | | 57898 [V2,2/5] Implement ZBKB, ZBKC and ZBKX extensions | | | 57896 [V2,3/5] Implement ZKND and ZKNE extensions | | | 57897 [V2,4/5] Implement ZKNH extensions | | | 57895 [V2,5/5] Implement ZKSH and ZKSED extensions | | | 57900 [V2,1/5] Add prototypes for RISC-V Crypto built-in functions | | | 57904 [V2,2/5] Implement ZBKB, ZBKC and ZBKX extensions | | | 57902 [V2,3/5] Implement ZKND and ZKNE extensions | | | 57903 [V2,4/5] Implement ZKNH extensions | | | 57901 [V2,5/5] Implement ZKSH and ZKSED extensions | | | 57922 reassoc: Fix up (ab) handling in eliminate_redundant_comparison [PR108783] | | | 57926 tree-ssa-dse: Fix up handling of lhs of internal calls [PR108657] | | | 57934 rs6000: Fix vector parity support [PR108699] | | | 57959 [committed] libstdc++: Fix uses of non-reserved names in headers | | | 57979 [committed] libgomp: Fix comment typo | | | 57981 [committed] libgomp: Fix up some typos in libgomp.texi | | | 57990 [committed] libstdc++: Fix non-reserved names in PSTL headers | | | 57997 [committed] libstdc++: Add missing space after effective-target name in test | | | 57998 [committed] libstdc++: Fix non-reserved names in | | | 58014 [committed] libstdc++: Make names_pstl.cc require et tbb_backend | | | 58075 don't declare header-defined functions both static and inline, pt 2 | | | 58107 constraint: fix relaxed memory and repeated constraint handling | | | 58113 [committed] libstdc++: Implement P2255R2 dangling checks for std::pair | | | 58111 [committed] libstdc++: Enable CTAD for std::basic_format_args (LWG 3810) | | | 58112 [committed] libstdc++: Fix name of in comment | | | 58114 [committed] libstdc++: Implement (P0290) | | | 58115 [committed] libstdc++: Replace non-ascii character in test | | | 58126 RISC-V: Bugfix for rvv bool mode precision adjustment | | | 58135 Attempt to register OpenMP pinned memory using a device instead of 'mlock' (was: [PATCH] libgomp, openmp: pinned memory) | | | 58146 [ARM] MVE: Implementing auto-vectorized array * scalar instructions | | | 58162 gcc: Remove size limit of PCH for *-*-mingw32 hosts | | | 58166 [pushed] testsuite, objective-c: Cater for Windows intptr type. | | | 58175 simplify-rtx: Fix VOIDmode operand handling in simplify_subreg [PR108805] | | | 58181 [OG12,committed] amdgcn: OpenMP low-latency allocator | | | 58219 testsuite: Tweak gcc.dg/attr-aligned.c for CRIS | | | 58233 [og12] 'libgomp.c/usm-{1,2,3,4}.c': Re-enable non-GCN offloading compilation (was: [OG12 commit] amdgcn, libgomp: USM allocation update) | | | 58237 [og12] Un-break nvptx libgomp build (was: [OG12][committed] amdgcn: OpenMP low-latency allocator) | | | 58238 [og12] Miscellaneous clean-up re OpenMP 'ompx_unified_shared_mem_space', 'ompx_host_mem_space' (was: [PATCH 3/5] openmp, nvptx: ompx_unified_shared_mem_alloc) | | | 58240 [og12] Clarify/verify OpenMP 'omp_calloc' zero-initialization for pinned memory (was: [PATCH] libgomp, openmp: pinned memory) | | | 58260 [og12] Attempt to register OpenMP pinned memory using a device instead of 'mlock' (was: [PATCH] libgomp, openmp: pinned memory) | | | 58274 [pushed] analyzer: respect some conditions from bit masks [PR108806] | | | 58300 [pushed] doc: Reword how to get possible values of a parameter (was: Document all param values and remove defaults (PR middle-end/86078)) | | | 58312 [wwwdocs] testing: Tweak the link to upstream FTensor (was: Anyone using FTensor to test GCC (or otherwise)?) | | | 58315 rs6000: Enhance lowpart/highpart DI->SF by mtvsrws/mtvsrd | | | 58352 [arm,testsuite] asm-flag-4.c: match quotes in expected message | | | 58353 [libstdc++,testsuite] intro/names.cc: undef func on vxw7krn | | | 58354 [arm] xfail fp-uint64-convert-double-* on all arm targets | | | 58356 [libstdc++] Use __gthread_join in jthread/95989 | | | 58357 [PR100127] Test for coroutine header in clang-compatible tests | | | 58360 Skip module_cmi_p and related unsupported module test | | | 58366 Drop need for constant I in ctf test | | | 58369 Accept pmf-vbit-in-delta extra warning | | | 58370 [vxworks] make wint_t and wchar_t the same distinct type | | | 58371 [arm] disable aes-1742098 mitigation for a72 combine tests | | | 58372 -Wdangling-pointer: don't mark SSA lhs sets as stores | | | 58380 [arm] adjust expectations for armv8_2-fp16-move-[12].c | | | 58379 [PR51534,arm] split out pr51534 test for softfp | | | 58378 [arm] adjust tests for quotes around +cdecp | | | 58382 [arm] complete vmsr/vmrs blank and case adjustments | | | 58384 [PR104882,arm] require mve hw for mve run test | | | 58385 [libstdc++] xfail noreplace tests on vxworks | | | 58387 [arm,vxworks] xfail fp-double-convert-float-1.c | | | 58388 [libstdc++] ensure mutex_pool survives _Safe_sequence_base | | | 58389 [PR77760,libstdc++] encode __time_get_state in tm | | | 58392 [v7] xtensa: Eliminate the use of callee-saved register that saves and restores only once | | | 58409 Hazard barrier return support | | | 58413 Add pattern for clo | | | 58457 [v2] rs6000: Fix vector parity support [PR108699] | | | 58458 rs6000: Fix vector_set_var_p9 by considering BE [PR108807] | | | 58470 optabs: Fix up expand_doubleword_shift_condmove for shift_mask == 0 [PR108803] | | | 58497 Fortran: Avoid SAVE_EXPR for deferred-len char types | | | 58520 Fix wrong-code issue in VN | | | 58524 tree-optimization/108821 - store motion and volatiles | | | 58525 [PATCHv2] openmp: Add support for 'present' modifier | | | 58542 [COMMITTED] contrib: Fix make_sunver.pl warning | | | 58545 [COMMITTED] fixincludes: Bypass solaris_math_12 on newer Solaris 11.4 | | | 58546 RISC-V: Add floating-point RVV C/C++ api | | | 58567 doc: Fix typo in -Wall description | | | 58594 RISC-V: Add divmod instruction support | +------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ + git config pull.rebase false + git fetch origin master From github.com:plctlab/patchwork-gcc * branch master -> FETCH_HEAD + git checkout master Switched to a new branch 'master' branch 'master' set up to track 'origin/master'. + git pull origin master From github.com:plctlab/patchwork-gcc * branch master -> FETCH_HEAD Already up to date. + git fetch origin upstream-master From github.com:plctlab/patchwork-gcc * branch upstream-master -> FETCH_HEAD + git checkout upstream-master Switched to a new branch 'upstream-master' branch 'upstream-master' set up to track 'origin/upstream-master'. + git remote add upstream https://github.com/gcc-mirror/gcc.git + git pull upstream master From https://github.com/gcc-mirror/gcc * branch master -> FETCH_HEAD * [new branch] master -> upstream/master Already up to date. + git push -u origin upstream-master Everything up-to-date branch 'upstream-master' set up to track 'origin/upstream-master'. + git checkout master Switched to branch 'master' Your branch is up to date with 'origin/master'. + git merge upstream-master Already up to date. + git push -u origin master Everything up-to-date branch 'master' set up to track 'origin/master'. + branchname=series24115-patch58594 ++ git branch -a ++ grep 'series24115-patch58594$' + checkbranch= + checkbranchresult=null + '[' null = series24115-patch58594 ']' + git checkout -b series24115-patch58594 Switched to a new branch 'series24115-patch58594' ++ curl https://patchwork.plctlab.org/api/1.2/series/24115/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 1434 100 1434 0 0 42176 0 --:--:-- --:--:-- --:--:-- 42176 + series_response='{"id":24115,"url":"https://patchwork.plctlab.org/api/1.2/series/24115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/list/?series=24115","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"RISC-V: Add divmod instruction support","date":"2023-02-17T14:02:40","submitter":{"id":3779,"url":"https://patchwork.plctlab.org/api/1.2/people/3779/","name":"Matevos Mehrabyan","email":"matevosmehrabyan@gmail.com"},"version":1,"total":1,"received_total":1,"received_all":true,"mbox":"https://patchwork.plctlab.org/series/24115/mbox/","cover_letter":null,"patches":[{"id":58594,"url":"https://patchwork.plctlab.org/api/1.2/patches/58594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-17T14:02:40","name":"RISC-V: Add divmod instruction support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/"}]}' ++ jq '.patches[] | (.id|tostring) + "," + .mbox' ++ echo '{"id":24115,"url":"https://patchwork.plctlab.org/api/1.2/series/24115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/list/?series=24115","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"RISC-V: Add divmod instruction support","date":"2023-02-17T14:02:40","submitter":{"id":3779,"url":"https://patchwork.plctlab.org/api/1.2/people/3779/","name":"Matevos Mehrabyan","email":"matevosmehrabyan@gmail.com"},"version":1,"total":1,"received_total":1,"received_all":true,"mbox":"https://patchwork.plctlab.org/series/24115/mbox/","cover_letter":null,"patches":[{"id":58594,"url":"https://patchwork.plctlab.org/api/1.2/patches/58594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2023-02-17T14:02:40","name":"RISC-V: Add divmod instruction support","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/"}]}' + patchid_patchurl='"58594,https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/"' + echo '"58594,https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/"' + IFS=, + read -r series_patch_id series_patch_url ++ echo '"58594' ++ sed 's/"//g' + series_patch_id=58594 ++ echo 'https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/"' ++ sed 's/"//g' + series_patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++ git rev-parse HEAD + commitid_before=593c8b73fb15683fdd1a9d85fe7e7e99540de3c8 + eval '+++ declare -p bout bret declare -- bout="Applying: RISC-V: Add divmod instruction support error: corrupt patch at line 48 error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 RISC-V: Add divmod instruction support When you have resolved this problem, run \"git am --continue\". If you prefer to skip this patch, run \"git am --skip\" instead. To restore the original branch and stop patching, run \"git am --abort\"." declare -- bret="128" ++ berr='\''++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 10201 100 10201 0 0 262k 0 --:--:-- --:--:-- --:--:-- 262k +++ bout='\''\'\'''\''Applying: RISC-V: Add divmod instruction support error: corrupt patch at line 48 error: could not build fake ancestor hint: Use '\''\'\'''\''\'\''\'\'''\'''\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\''\'\''\'\'''\'''\''\'\'''\'' to see the failed patch Patch failed at 0001 RISC-V: Add divmod instruction support When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\''\'\'''\'' +++ bret=128'\'' ++ declare -p berr declare -- berr="++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 10201 100 10201 0 0 262k 0 --:--:-- --:--:-- --:--:-- 262k +++ bout='\''Applying: RISC-V: Add divmod instruction support error: corrupt patch at line 48 error: could not build fake ancestor hint: Use '\''\\'\'''\''git am --show-current-patch=diff'\''\\'\'''\'' to see the failed patch Patch failed at 0001 RISC-V: Add divmod instruction support When you have resolved this problem, run \"git am --continue\". If you prefer to skip this patch, run \"git am --skip\" instead. To restore the original branch and stop patching, run \"git am --abort\".'\'' +++ bret=128"' ++ +++ declare -p bout bret /tmp/jenkins12369919875765723576.sh: line 129: +++: command not found ++ declare -- 'bout=Applying: RISC-V: Add divmod instruction support error: corrupt patch at line 48 error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 RISC-V: Add divmod instruction support When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' ++ declare -- bret=128 ++ ++ 'berr=++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 10201 100 10201 0 0 262k 0 --:--:-- --:--:-- --:--:-- 262k +++ bout='\''Applying: RISC-V: Add divmod instruction support error: corrupt patch at line 48 error: could not build fake ancestor hint: Use '\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\'' to see the failed patch Patch failed at 0001 RISC-V: Add divmod instruction support When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\'' +++ bret=128' /tmp/jenkins12369919875765723576.sh: line 154: ++: command not found ++ ++ declare -p berr /tmp/jenkins12369919875765723576.sh: line 155: ++: command not found ++ declare -- 'berr=++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 10201 100 10201 0 0 262k 0 --:--:-- --:--:-- --:--:-- 262k +++ bout='\''Applying: RISC-V: Add divmod instruction support error: corrupt patch at line 48 error: could not build fake ancestor hint: Use '\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\'' to see the failed patch Patch failed at 0001 RISC-V: Add divmod instruction support When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\'' +++ bret=128' ++ git rev-parse HEAD + commitid_after=593c8b73fb15683fdd1a9d85fe7e7e99540de3c8 + '[' 128 = 0 ']' + [[ ++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 10201 100 10201 0 0 262k 0 --:--:-- --:--:-- --:--:-- 262k +++ bout='Applying: RISC-V: Add divmod instruction support error: corrupt patch at line 48 error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 RISC-V: Add divmod instruction support When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' +++ bret=128 =~ sha1 information is lacking or useless ]] + [[ ++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 10201 100 10201 0 0 262k 0 --:--:-- --:--:-- --:--:-- 262k +++ bout='Applying: RISC-V: Add divmod instruction support error: corrupt patch at line 48 error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 RISC-V: Add divmod instruction support When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' +++ bret=128 =~ Failed to merge in the changes ]] + [[ ++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 10201 100 10201 0 0 262k 0 --:--:-- --:--:-- --:--:-- 262k +++ bout='Applying: RISC-V: Add divmod instruction support error: corrupt patch at line 48 error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 RISC-V: Add divmod instruction support When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' +++ bret=128 =~ corrupt patch at ]] + submit_check warning 'Corrupt patch' https://patchwork.plctlab.org/jenkins/job/gcc-patch/4742/consoleText 'Git am fail log' + check_state=warning + patch_state='Corrupt patch' + repo_url=https://patchwork.plctlab.org/jenkins/job/gcc-patch/4742/consoleText + DESCRIPTION='Git am fail log' + curl -X POST -H 'Authorization: Token [*******]' -F state=warning -F target_url=https://patchwork.plctlab.org/jenkins/job/gcc-patch/4742/consoleText -F context=gcc-patch-check -F 'description=Git am fail log' https://patchwork.plctlab.org/api/patches/58594/checks/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 965 100 425 100 540 11486 14594 --:--:-- --:--:-- --:--:-- 26081 {"id":5360,"url":"https://patchwork.plctlab.org/api/patches/58594/checks/5360/","user":{"id":1,"url":"https://patchwork.plctlab.org/api/users/1/","username":"snail","first_name":"","last_name":"","email":"wangliu@iscas.ac.cn"},"date":"2023-02-17T14:19:14.904439","state":"warning","target_url":"https://patchwork.plctlab.org/jenkins/job/gcc-patch/4742/consoleText","context":"gcc-patch-check","description":"Git am fail log"}+ curl -X PATCH -H 'Authorization: Token [*******]' -F 'state=Corrupt patch' https://patchwork.plctlab.org/api/1.2/patches/58594/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0{"id":58594,"url":"https://patchwork.plctlab.org/api/1.2/patches/58594/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"","list_archive_url":null,"date":"2023-02-17T14:02:40","name":"RISC-V: Add divmod instruction support","commit_ref":null,"pull_url":null,"state":"corrupt-patch","archived":false,"hash":"28c49b3cc00e3a994052f357c52fa46dcfa85ca5","submitter":{"id":3779,"url":"https://patchwork.plctlab.org/api/1.2/people/3779/","name":"Matevos Mehrabyan","email":"matevosmehrabyan@gmail.com"},"delegate":null,"mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALXbNshUoKPUqJiL2Nit7t4Hahg0wYMPMxcWRrwWZf8=7BADng@mail.gmail.com/mbox/","series":[{"id":24115,"url":"https://patchwork.plctlab.org/api/1.2/series/24115/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/list/?series=24115","date":"2023-02-17T14:02:40","name":"RISC-V: Add divmod instruction support","version":1,"mbox":"https://patchwork.plctlab.org/series/24115/mbox/"}],"comments":"https://patchwork.plctlab.org/api/patches/58594/comments/","check":"warning","checks":"https://patchwork.plctlab.org/api/patches/58594/checks/","tags":{},"headers":{"Return-Path":"","Delivered-To":["ouuuleilei@gmail.com","gcc-patches@gcc.gnu.org"],"Received":["by 2002:adf:eb09:0:0:0:0:0 with SMTP id s9csp902148wrn;\n Fri, 17 Feb 2023 06:04:50 -0800 (PST)","from sourceware.org (server2.sourceware.org. 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c=relaxed/relaxed; d=gcc.gnu.org;\n\ts=default; t=1676642620;\n\tbh=34SQiUiUD0LuDMpRav3/fx8LWXHwtQ3B2jLWZ78gIc0=;\n\th=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post:\n\t List-Help:List-Subscribe:From:Reply-To:From;\n\tb=WoUzwv93i0wEmS4/IsmlaqnBHJqdQdUG6npFm89ivn2wSOB0B35F6L4x4ikAh+sCe\n\t XgGDjM6KFMuy9D535h35ZdqinIZjqq2IDfsTM+5kurfXqqKruVJd/rMX77Oq0etCYT\n\t LqUc9mhFanMgjaf+DvJesUl2H9BytPShMohrKEDc=","X-Original-To":"gcc-patches@gcc.gnu.org","DMARC-Filter":"OpenDMARC Filter v1.4.2 sourceware.org 3728E382E6B8","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20210112;\n h=to:subject:message-id:date:from:mime-version:x-gm-message-state\n :from:to:cc:subject:date:message-id:reply-to;\n bh=zswTCrXvuW6W+Lp7x9N1DMCkM6CD9lA5ZzYLjQrbzBE=;\n b=7H9INxNckzk0j6AjR0MOpNaU6yBcXgjxW/fdKCZ4RC8Qppowh5FR8lBMO2Knr/sgum\n CbPm1NtUqWVJidEQ+yFgDb9eDGO5w3KGvVo/mn/laXCBFsuNv+d01ayguOPyDSw4u6sk\n w7W9WAKBUlbQFXqFsRR9FzK8xQRyDiRJzna6AzSk0fnj3bMgChZ+Lz5qSQUUHKTtleC3\n 7feTW/txSzkrYjZbzbH0G2v8rMCMwPny7MFnMl9cG/wRCjUhMHE1iX5i+lUc+KAaIE/B\n uA+vE/M+nCNd9u/csU94uciBYokVWi7VJVKYQezGY1HNnXAocey2NyQR1oS13KoqF0Pv\n iMoA==","X-Gm-Message-State":"AO0yUKXNPQDiWR76S+icxmT9RrAZqeU/c+xbu4ZShI0WZdLAp4NQi5w/\n oezzPiZmG+oxpjUUPxD4lLck9kwNy8qXt9ycu8Tg6XX3dDvw/A==","MIME-Version":"1.0","Date":"Fri, 17 Feb 2023 18:02:40 +0400","Message-ID":"\n ","Subject":"RISC-V: Add divmod instruction support","To":"gcc-patches@gcc.gnu.org","X-Spam-Status":"No, score=-9.6 required=5.0 tests=BAYES_00, DKIM_SIGNED,\n DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0,\n HTML_MESSAGE, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS,\n TXREP autolearn=ham autolearn_force=no version=3.4.6","X-Spam-Checker-Version":"SpamAssassin 3.4.6 (2021-04-09) on\n server2.sourceware.org","Content-Type":"text/plain; charset=\"UTF-8\"","X-Content-Filtered-By":"Mailman/MimeDel 2.1.29","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","From":"Matevos Mehrabyan via Gcc-patches ","Reply-To":"Matevos Mehrabyan ","Errors-To":"gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org","Sender":"\"Gcc-patches\" ","X-getmail-retrieved-from-mailbox":"=?utf-8?q?INBOX?=","X-GMAIL-THRID":"=?utf-8?q?1758087285856488094?=","X-GMAIL-MSGID":"=?utf-8?q?1758087285856488094?="},"content":"Hi all,\nIf we have division and remainder calculations with the same operands:\n\n a = b / c;\n d = b % c;\n\nWe can replace the calculation of remainder with multiplication +\nsubtraction, using the result from the previous division:\n\n a = b / c;\n d = a * c;\n d = b - d;\n\nWhich will be faster.\nCurrently, it isn't done for RISC-V.\n\nI've added an expander for DIVMOD which replaces 'rem' with 'mul + sub'.\n\nBest regards,\nMatevos.\n\ngcc/ChangeLog:\n\n * config/riscv/riscv.md: Added divmod expander.\n\ngcc/testsuite/ChangeLog:\n * gcc.target/riscv/divmod.c: New testcase.\n\n--- inline copy of the patch ---","diff":"diff --git a/gcc/config/riscv/iterators.md b/gcc/config/riscv/iterators.md\nindex f95dd405e12..d941483d9f1 100644\n--- a/gcc/config/riscv/iterators.md\n+++ b/gcc/config/riscv/iterators.md\n@@ -148,6 +148,11 @@\n ;; from the same template.\n (define_code_iterator any_mod [mod umod])\n\n+;; These code iterators allow unsigned and signed divmod to be generated\n+;; from the same template.\n+(define_code_iterator only_div [div udiv])\n+(define_code_attr paired_mod [(div \"mod\") (udiv \"umod\")])\n+\n ;; These code iterators allow the signed and unsigned scc operations to use\n ;; the same template.\n (define_code_iterator any_gt [gt gtu])\n@@ -175,7 +180,8 @@\n (gt \"\") (gtu \"u\")\n (ge \"\") (geu \"u\")\n (lt \"\") (ltu \"u\")\n- (le \"\") (leu \"u\")])\n+ (le \"\") (leu \"u\")\n+ (div \"\") (udiv \"u\")])\n\n ;; is like , but the signed form expands to \"s\" rather than \"\".\n (define_code_attr su [(sign_extend \"s\") (zero_extend \"u\")])\ndiff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md\nindex c8adc5af5d2..2d48ff3f8de 100644\n--- a/gcc/config/riscv/riscv.md\n+++ b/gcc/config/riscv/riscv.md\n@@ -1044,6 +1044,22 @@\n [(set_attr \"type\" \"idiv\")\n (set_attr \"mode\" \"DI\")])\n\n+(define_expand \"divmod4\"\n+ [(parallel\n+ [(set (match_operand:GPR 0 \"register_operand\")\n+ (only_div:GPR (match_operand:GPR 1 \"register_operand\")\n+ (match_operand:GPR 2 \"register_operand\")))\n+ (set (match_operand:GPR 3 \"register_operand\")\n+ (:GPR (match_dup 1) (match_dup 2)))])]\n+ \"TARGET_DIV\"\n+ {\n+ rtx tmp = gen_reg_rtx (mode);\n+ emit_insn (gen_div3 (operands[0], operands[1],\noperands[2]));\n+ emit_insn (gen_mul3 (tmp, operands[0], operands[2]));\n+ emit_insn (gen_sub3 (operands[3], operands[1], tmp));\n+ DONE;\n+ })\n+\n (define_insn \"*si3_extended\"\n [(set (match_operand:DI 0 \"register_operand\" \"=r\")\n (sign_extend:DI\ndiff --git a/gcc/testsuite/gcc.target/riscv/divmod.c\nb/gcc/testsuite/gcc.target/riscv/divmod.c\nnew file mode 100644\nindex 00000000000..254b25e654d\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/riscv/divmod.c\n@@ -0,0 +1,14 @@\n+/* { dg-do compile } */\n+/* { dg-skip-if \"\" { *-*-* } { \"-O0\" \"-O1\" \"-Og\" } } */\n+\n+void\n+foo(int a, int b, int *c, int *d)\n+{\n+ *c = a / b;\n+ *d = a % b;\n+}\n+\n+/* { dg-final { scan-assembler-not \"rem\" } } */\n+/* { dg-final { scan-assembler-times \"mul\" 1 } } */\n+/* { dg-final { scan-assembler-times \"sub\" 1 } } */\n\n","prefixes":[]}+ exit 1 Build step 'Execute shell' marked build as failure Finished: FAILURE