Started by user snail Running as SYSTEM [EnvInject] - Loading node environment variables. Building remotely on docker-jenkins-agent in workspace /home/jenkins/agent/workspace/gcc-patch [WS-CLEANUP] Deleting project workspace... [WS-CLEANUP] Deferred wipeout is used... [WS-CLEANUP] Done The recommended git tool is: NONE using credential 0adb5fc7-caa2-429d-97d2-c7fa2fa1d884 Cloning the remote Git repository Using shallow clone with depth 1 Avoid fetching tags Cloning repository git@github.com:plctlab/patchwork-gcc.git > git init /home/jenkins/agent/workspace/gcc-patch # timeout=10 Fetching upstream changes from git@github.com:plctlab/patchwork-gcc.git > git --version # timeout=10 > git --version # 'git version 2.37.2' using GIT_SSH to set credentials patchwork github wangliu-iscas git ssh key Verifying host key using known hosts file, will automatically accept unseen keys > git fetch --no-tags --force --progress --depth=1 -- git@github.com:plctlab/patchwork-gcc.git +refs/heads/*:refs/remotes/origin/* # timeout=10 > git config remote.origin.url git@github.com:plctlab/patchwork-gcc.git # timeout=10 > git config --add remote.origin.fetch +refs/heads/*:refs/remotes/origin/* # timeout=10 Avoid second fetch > git rev-parse refs/remotes/origin/master^{commit} # timeout=10 Checking out Revision e7310e24b1c0ca67b1bb507c1330b2bf39e59e32 (refs/remotes/origin/master) > git config core.sparsecheckout # timeout=10 > git checkout -f e7310e24b1c0ca67b1bb507c1330b2bf39e59e32 # timeout=10 Commit message: "Make ranger vrp1 default." > git rev-list --no-walk e7310e24b1c0ca67b1bb507c1330b2bf39e59e32 # timeout=10 [EnvInject] - Mask passwords that will be passed as build parameters. [EnvInject] - Executing scripts and injecting environment variables after the SCM step. [EnvInject] - Injecting as environment variables the properties content GITHUB_REPO=https://github.com/plctlab/patchwork-gcc PATCHWORK_URL=https://patchwork.plctlab.org [EnvInject] - Variables injected successfully. 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[PR107492]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20221101170156.52672-1-polacek@redhat.com/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-11/mbox/"}]' + bundle_id=10 + git-pw bundle add 10 13813 +------------+----------------------------------------------------------------------------------------+ | Property | Value | |------------+----------------------------------------------------------------------------------------| | ID | 10 | | Name | gcc-patch_2022-11 | | URL | https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2022-11/ | | Owner | patchwork-bot | | Project | gcc-patch | | Public | True | | Patches | 13283 [ada] fix libgnat build on x86_64-linux-gnux32 with glibc <= 2.31 | | | 13294 [v7,01/34] Add and restructure function declaration macros | | | 13298 [v7,02/34] Rename THUMB_FUNC_START to THUMB_FUNC_ENTRY | | | 13302 [v7,03/34] Fix syntax warnings on conditional instructions | | | 13295 [v7,04/34] Reorganize LIB1ASMFUNCS object wrapper macros | | | 13299 [v7,05/34] Add the __HAVE_FEATURE_IT and IT() macros | | | 13297 [v7,06/34] Refactor 'clz' functions into a new file | | | 13296 [v7,07/34] Refactor 'ctz' functions into a new file | | | 13301 [v7,08/34] Refactor 64-bit shift functions into a new file | | | 13303 [v7,09/34] Import 'clz' functions from the CM0 library | | | 13305 [v7,10/34] Import 'ctz' functions from the CM0 library | | | 13307 [v7,11/34] Import 64-bit shift functions from the CM0 library | | | 13310 [v7,12/34] Import 'clrsb' functions from the CM0 library | | | 13308 [v7,13/34] Import 'ffs' functions from the CM0 library | | | 13313 [v7,14/34] Import 'parity' functions from the CM0 library | | | 13300 [v7,15/34] Import 'popcnt' functions from the CM0 library | | | 13311 [v7,16/34] Refactor Thumb-1 64-bit comparison into a new file | | | 13304 [v7,17/34] Import 64-bit comparison from CM0 library | | | 13309 [v7,18/34] Merge Thumb-2 optimizations for 64-bit comparison | | | 13314 [v7,19/34] Import 32-bit division from the CM0 library | | | 13319 [v7,20/34] Refactor Thumb-1 64-bit division into a new file | | | 13312 [v7,21/34] Import 64-bit division from the CM0 library | | | 13315 [v7,22/34] Import integer multiplication from the CM0 library | | | 13321 [v7,23/34] Refactor Thumb-1 float comparison into a new file | | | 13318 [v7,24/34] Import float comparison from the CM0 library | | | 13316 [v7,25/34] Refactor Thumb-1 float subtraction into a new file | | | 13323 [v7,26/34] Import float addition and subtraction from the CM0 library | | | 13328 [v7,27/34] Import float multiplication from the CM0 library | | | 13329 [v7,28/34] Import float division from the CM0 library | | | 13332 [v7,29/34] Import integer-to-float conversion from the CM0 library | | | 13334 [v7,30/34] Import float-to-integer conversion from the CM0 library | | | 13330 [v7,31/34] Import float<->double conversion from the CM0 library | | | 13335 [v7,32/34] Import float<->__fp16 conversion from the CM0 library | | | 13327 [v7,33/34] Drop single-precision Thumb-1 soft-float functions | | | 13336 [v7,34/34] Add -mpure-code support to the CM0 functions. | | | 13412 c, analyzer: support named constants in analyzer [PR106302] | | | 13431 libstdc++: Implement ranges::as_rvalue_view from P2446R2 | | | 13440 x86: Track converted/skipped registers in STV | | | 13491 [wwwdocs,GCC13] Mention Intel __bf16 support in AVX512BF16 intrinsics. | | | 13492 [pushed] c++: set TREE_NOTHROW after genericize | | | 13530 [v2] LoongArch: Optimize immediate load. | | | 13583 libstdc++: std::from_chars std::{,b}float16_t support | | | 13594 [committed] wwwdocs: projects/tree-ssa: Adjust mark up | | | 13595 [committed] wwwdocs: readings: Remove | | | 13597 [committed] wwwdocs: codingconventions: Move two links to https | | | 13617 c++: Reorganize per-scope lambda discriminators | | | 13630 [committed] wwwdocs: *: Remove extraneous whitespaces around headings | | | 13638 [committed] wwwdocs: codingconventions: Properly link to flake8 | | | 13639 [v3] LoongArch: Optimize immediate load. | | | 13640 [committed] wwwdocs: gcc-4.4: Switch www.open-std.org to https | | | 13643 [committed] wwwdocs: readings: Switch sourceforge.net sub-sites to https | | | 13644 libstdc++: Shortest denormal hex std::to_chars | | | 13655 [AArch64] Cleanup move immediate code | | | 13656 [COMMITTED] Irange::intersect with nonzero bits can indicate change incorrectly. | | | 13657 [COMMITTED] Allow ranger queries on exit block. | | | 13658 [COMMITTED] Remove builtin_unreachable in ranger VRP. | | | 13681 [COMMITTED] Make ranger the vrp1 default. | | | 13682 doc: Remove outdated reference to "core" and front-end downloads | | | 13759 [1/2] i386: correct x87&SSE division modeling in znver.md | | | 13760 [2/2] i386: correct x87&SSE multiplication modeling in znver.md | | | 13802 c++: Disable -Wignored-qualifiers for template args [PR107492] | | | 13813 [v2] RISC-V modified add3 for large stack frame optimization [PR105733] | +------------+----------------------------------------------------------------------------------------+ + git config pull.rebase false + git fetch origin master From github.com:plctlab/patchwork-gcc * branch master -> FETCH_HEAD + git checkout master Switched to a new branch 'master' branch 'master' set up to track 'origin/master'. + git pull origin master From github.com:plctlab/patchwork-gcc * branch master -> FETCH_HEAD Already up to date. + git fetch origin upstream-master From github.com:plctlab/patchwork-gcc * branch upstream-master -> FETCH_HEAD + git checkout upstream-master Switched to a new branch 'upstream-master' branch 'upstream-master' set up to track 'origin/upstream-master'. + git remote add upstream https://github.com/gcc-mirror/gcc.git + git pull upstream master From https://github.com/gcc-mirror/gcc * branch master -> FETCH_HEAD * [new branch] master -> upstream/master Updating e7310e24b..82b0345f6 Fast-forward gcc/tree-vrp.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) + git push -u origin upstream-master To github.com:plctlab/patchwork-gcc.git e7310e24b..82b0345f6 upstream-master -> upstream-master branch 'upstream-master' set up to track 'origin/upstream-master'. + git checkout master Switched to branch 'master' Your branch is up to date with 'origin/master'. + git merge upstream-master Updating e7310e24b..82b0345f6 Fast-forward gcc/tree-vrp.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) + git push -u origin master To github.com:plctlab/patchwork-gcc.git e7310e24b..82b0345f6 master -> master branch 'master' set up to track 'origin/master'. + branchname=series5252-patch13813 ++ git branch -a ++ grep 'series5252-patch13813$' + checkbranch= + checkbranchresult=null + '[' null = series5252-patch13813 ']' + git checkout -b series5252-patch13813 Switched to a new branch 'series5252-patch13813' ++ curl https://patchwork.plctlab.org/api/1.2/series/5252/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 1479 100 1479 0 0 43500 0 --:--:-- --:--:-- --:--:-- 43500 + series_response='{"id":5252,"url":"https://patchwork.plctlab.org/api/1.2/series/5252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/list/?series=5252","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"[v2] RISC-V modified add3 for large stack frame optimization [PR105733]","date":"2022-11-01T17:25:13","submitter":{"id":106,"url":"https://patchwork.plctlab.org/api/1.2/people/106/","name":"Kevin Lee","email":"kevinl@rivosinc.com"},"version":2,"total":1,"received_total":1,"received_all":true,"mbox":"https://patchwork.plctlab.org/series/5252/mbox/","cover_letter":null,"patches":[{"id":13813,"url":"https://patchwork.plctlab.org/api/1.2/patches/13813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-01T17:25:13","name":"[v2] RISC-V modified add3 for large stack frame optimization [PR105733]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/"}]}' ++ echo '{"id":5252,"url":"https://patchwork.plctlab.org/api/1.2/series/5252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/list/?series=5252","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"[v2] RISC-V modified add3 for large stack frame optimization [PR105733]","date":"2022-11-01T17:25:13","submitter":{"id":106,"url":"https://patchwork.plctlab.org/api/1.2/people/106/","name":"Kevin Lee","email":"kevinl@rivosinc.com"},"version":2,"total":1,"received_total":1,"received_all":true,"mbox":"https://patchwork.plctlab.org/series/5252/mbox/","cover_letter":null,"patches":[{"id":13813,"url":"https://patchwork.plctlab.org/api/1.2/patches/13813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/","msgid":"","list_archive_url":null,"date":"2022-11-01T17:25:13","name":"[v2] RISC-V modified add3 for large stack frame optimization [PR105733]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/"}]}' ++ jq '.patches[] | (.id|tostring) + "," + .mbox' + patchid_patchurl='"13813,https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/"' + echo '"13813,https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/"' + IFS=, + read -r series_patch_id series_patch_url ++ echo '"13813' ++ sed 's/"//g' + series_patch_id=13813 ++ echo 'https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/"' ++ sed 's/"//g' + series_patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++ git rev-parse HEAD + commitid_before=82b0345f6137b112728590d7c010dcd2cef08514 + eval '+++ declare -p bout bret declare -- bout="Applying: RISC-V modified add3 for large stack frame optimization [PR105733] error: corrupt patch at line 21 error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 RISC-V modified add3 for large stack frame optimization [PR105733] When you have resolved this problem, run \"git am --continue\". If you prefer to skip this patch, run \"git am --skip\" instead. To restore the original branch and stop patching, run \"git am --abort\"." declare -- bret="128" ++ berr='\''++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 15599 100 15599 0 0 380k 0 --:--:-- --:--:-- --:--:-- 380k +++ bout='\''\'\'''\''Applying: RISC-V modified add3 for large stack frame optimization [PR105733] error: corrupt patch at line 21 error: could not build fake ancestor hint: Use '\''\'\'''\''\'\''\'\'''\'''\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\''\'\''\'\'''\'''\''\'\'''\'' to see the failed patch Patch failed at 0001 RISC-V modified add3 for large stack frame optimization [PR105733] When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\''\'\'''\'' +++ bret=128'\'' ++ declare -p berr declare -- berr="++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 15599 100 15599 0 0 380k 0 --:--:-- --:--:-- --:--:-- 380k +++ bout='\''Applying: RISC-V modified add3 for large stack frame optimization [PR105733] error: corrupt patch at line 21 error: could not build fake ancestor hint: Use '\''\\'\'''\''git am --show-current-patch=diff'\''\\'\'''\'' to see the failed patch Patch failed at 0001 RISC-V modified add3 for large stack frame optimization [PR105733] When you have resolved this problem, run \"git am --continue\". If you prefer to skip this patch, run \"git am --skip\" instead. To restore the original branch and stop patching, run \"git am --abort\".'\'' +++ bret=128"' ++ +++ declare -p bout bret /tmp/jenkins200795333738401296.sh: line 129: +++: command not found ++ declare -- 'bout=Applying: RISC-V modified add3 for large stack frame optimization [PR105733] error: corrupt patch at line 21 error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 RISC-V modified add3 for large stack frame optimization [PR105733] When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' ++ declare -- bret=128 ++ ++ 'berr=++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 15599 100 15599 0 0 380k 0 --:--:-- --:--:-- --:--:-- 380k +++ bout='\''Applying: RISC-V modified add3 for large stack frame optimization [PR105733] error: corrupt patch at line 21 error: could not build fake ancestor hint: Use '\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\'' to see the failed patch Patch failed at 0001 RISC-V modified add3 for large stack frame optimization [PR105733] When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\'' +++ bret=128' /tmp/jenkins200795333738401296.sh: line 154: ++: command not found ++ ++ declare -p berr /tmp/jenkins200795333738401296.sh: line 155: ++: command not found ++ declare -- 'berr=++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 15599 100 15599 0 0 380k 0 --:--:-- --:--:-- --:--:-- 380k +++ bout='\''Applying: RISC-V modified add3 for large stack frame optimization [PR105733] error: corrupt patch at line 21 error: could not build fake ancestor hint: Use '\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\'' to see the failed patch Patch failed at 0001 RISC-V modified add3 for large stack frame optimization [PR105733] When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\'' +++ bret=128' ++ git rev-parse HEAD + commitid_after=82b0345f6137b112728590d7c010dcd2cef08514 + '[' 128 = 0 ']' + [[ ++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 15599 100 15599 0 0 380k 0 --:--:-- --:--:-- --:--:-- 380k +++ bout='Applying: RISC-V modified add3 for large stack frame optimization [PR105733] error: corrupt patch at line 21 error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 RISC-V modified add3 for large stack frame optimization [PR105733] When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' +++ bret=128 =~ sha1 information is lacking or useless ]] + [[ ++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 15599 100 15599 0 0 380k 0 --:--:-- --:--:-- --:--:-- 380k +++ bout='Applying: RISC-V modified add3 for large stack frame optimization [PR105733] error: corrupt patch at line 21 error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 RISC-V modified add3 for large stack frame optimization [PR105733] When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' +++ bret=128 =~ Failed to merge in the changes ]] + [[ ++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 15599 100 15599 0 0 380k 0 --:--:-- --:--:-- --:--:-- 380k +++ bout='Applying: RISC-V modified add3 for large stack frame optimization [PR105733] error: corrupt patch at line 21 error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 RISC-V modified add3 for large stack frame optimization [PR105733] When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' +++ bret=128 =~ corrupt patch at ]] + submit_check warning 'Corrupt patch' https://patchwork.plctlab.org/jenkins/job/gcc-patch/1778/consoleText 'Git am fail log' + check_state=warning + patch_state='Corrupt patch' + repo_url=https://patchwork.plctlab.org/jenkins/job/gcc-patch/1778/consoleText + DESCRIPTION='Git am fail log' + curl -X POST -H 'Authorization: Token [*******]' -F state=warning -F target_url=https://patchwork.plctlab.org/jenkins/job/gcc-patch/1778/consoleText -F context=gcc-patch-check -F 'description=Git am fail log' https://patchwork.plctlab.org/api/patches/13813/checks/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 965 100 425 100 540 17000 21600 --:--:-- --:--:-- --:--:-- 38600 {"id":1624,"url":"https://patchwork.plctlab.org/api/patches/13813/checks/1624/","user":{"id":1,"url":"https://patchwork.plctlab.org/api/users/1/","username":"snail","first_name":"","last_name":"","email":"wangliu@iscas.ac.cn"},"date":"2022-11-01T18:16:04.706306","state":"warning","target_url":"https://patchwork.plctlab.org/jenkins/job/gcc-patch/1778/consoleText","context":"gcc-patch-check","description":"Git am fail log"}+ curl -X PATCH -H 'Authorization: Token [*******]' -F 'state=Corrupt patch' https://patchwork.plctlab.org/api/1.2/patches/13813/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0{"id":13813,"url":"https://patchwork.plctlab.org/api/1.2/patches/13813/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"","list_archive_url":null,"date":"2022-11-01T17:25:13","name":"[v2] RISC-V modified add3 for large stack frame optimization [PR105733]","commit_ref":null,"pull_url":null,"state":"corrupt-patch","archived":false,"hash":"e441eb09be7d4ab11704939eb50c7327d3305fa1","submitter":{"id":106,"url":"https://patchwork.plctlab.org/api/1.2/people/106/","name":"Kevin Lee","email":"kevinl@rivosinc.com"},"delegate":null,"mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/CALkvSf8rorVfVRwvYixbH7uJ8W1Fzc90Jf0G9ruO_3e=XUmOZA@mail.gmail.com/mbox/","series":[{"id":5252,"url":"https://patchwork.plctlab.org/api/1.2/series/5252/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/list/?series=5252","date":"2022-11-01T17:25:13","name":"[v2] RISC-V modified add3 for large stack frame optimization [PR105733]","version":2,"mbox":"https://patchwork.plctlab.org/series/5252/mbox/"}],"comments":"https://patchwork.plctlab.org/api/patches/13813/comments/","check":"warning","checks":"https://patchwork.plctlab.org/api/patches/13813/checks/","tags":{},"headers":{"Return-Path":"","Delivered-To":["ouuuleilei@gmail.com","gcc-patches@gcc.gnu.org"],"Received":["by 2002:a5d:6687:0:0:0:0:0 with SMTP id l7csp3102446wru;\n Tue, 1 Nov 2022 10:26:02 -0700 (PDT)","from sourceware.org (server2.sourceware.org. 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charset=\"UTF-8\"","X-Content-Filtered-By":"Mailman/MimeDel 2.1.29","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Cc":"gnu-toolchain@rivosinc.com","Errors-To":"gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org","Sender":"\"Gcc-patches\" ","X-getmail-retrieved-from-mailbox":"=?utf-8?q?INBOX?=","X-GMAIL-THRID":"=?utf-8?q?1748315471344573046?=","X-GMAIL-MSGID":"=?utf-8?q?1748315471344573046?="},"content":"This is the updated patch of\nhttps://gcc.gnu.org/pipermail/gcc-patches/2022-September/601824.html. Since\nthe riscv-selftest.cc has been added, this version of the patch adds the\nlogic in riscv-selftest.cc to also consider parallel insns.\n The patch has been tested with rv64imafdc / rv64imac / rv32imafdc /\nrv32imac and no additional failures were detected in the testsuite.\n\ngcc/ChangeLog:\nJim Wilson \nMichael Collison \nKevin Lee \n* config/riscv/predicates.md (const_lui_operand): New Predicate.\n(add_operand): Ditto.\n(reg_or_const_int_operand): Ditto.\n* config/riscv/riscv-protos.h (riscv_eliminable_reg): New\nfunction.\n* config/riscv/riscv-selftests.cc (calculate_x_in_sequence):\nConsider Parallel insns.\n* config/riscv/riscv.cc (riscv_eliminable_reg): New function.\n(riscv_adjust_libcall_cfi_prologue): Use gen_rtx_SET and\ngen_rtx_fmt_ee instead of gen_add3_insn.\n(riscv_adjust_libcall_cfi_epilogue): Ditto.\n* config/riscv/riscv.md (addsi3): Remove.\n(add3): New instruction for large stack frame\noptimization.\n(add3_internal): Ditto.\n(adddi3): Remove.\n(add3_internal2): New instruction for insns generated in\nthe prologue and epilogue pass.\n---\ngcc/config/riscv/predicates.md | 13 +++++\ngcc/config/riscv/riscv-protos.h | 1 +\ngcc/config/riscv/riscv-selftests.cc | 3 ++\ngcc/config/riscv/riscv.cc | 20 +++++--\ngcc/config/riscv/riscv.md | 84 ++++++++++++++++++++++++-----\n5 files changed, 104 insertions(+), 17 deletions(-)\n\nDONE;\n})\n+\n(define_expand \"uaddv4\"\n[(set (match_operand:GPR 0 \"register_operand\" \"=r,r\")\n(plus:GPR (match_operand:GPR 1 \"register_operand\" \" r,r\")","diff":"diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md\nindex c2ff41bb0fd..3149f7227ac 100644\n--- a/gcc/config/riscv/predicates.md\n+++ b/gcc/config/riscv/predicates.md\n@@ -35,6 +35,14 @@\n(ior (match_operand 0 \"arith_operand\")\n(match_operand 0 \"lui_operand\")))\n+(define_predicate \"const_lui_operand\"\n+ (and (match_code \"const_int\")\n+ (match_test \"(INTVAL (op) & 0xFFF) == 0 && INTVAL (op) != 0\")))\n+\n+(define_predicate \"add_operand\"\n+ (ior (match_operand 0 \"arith_operand\")\n+ (match_operand 0 \"const_lui_operand\")))\n+\n(define_predicate \"const_csr_operand\"\n(and (match_code \"const_int\")\n(match_test \"IN_RANGE (INTVAL (op), 0, 31)\")))\n@@ -59,6 +67,11 @@\n(ior (match_operand 0 \"const_0_operand\")\n(match_operand 0 \"register_operand\")))\n+;; For use in adds, when adding to an eliminable register.\n+(define_predicate \"reg_or_const_int_operand\"\n+ (ior (match_code \"const_int\")\n+ (match_operand 0 \"register_operand\")))\n+\n;; Only use branch-on-bit sequences when the mask is not an ANDI immediate.\n(define_predicate \"branch_on_bit_operand\"\n(and (match_code \"const_int\")\ndiff --git a/gcc/config/riscv/riscv-protos.h\nb/gcc/config/riscv/riscv-protos.h\nindex 5a718bb62b4..9348ac71956 100644\n--- a/gcc/config/riscv/riscv-protos.h\n+++ b/gcc/config/riscv/riscv-protos.h\n@@ -63,6 +63,7 @@ extern void riscv_expand_conditional_move (rtx, rtx, rtx,\nrtx_code, rtx, rtx);\nextern rtx riscv_legitimize_call_address (rtx);\nextern void riscv_set_return_address (rtx, rtx);\nextern bool riscv_expand_block_move (rtx, rtx, rtx);\n+extern bool riscv_eliminable_reg (rtx);\nextern rtx riscv_return_addr (int, rtx);\nextern poly_int64 riscv_initial_elimination_offset (int, int);\nextern void riscv_expand_prologue (void);\ndiff --git a/gcc/config/riscv/riscv-selftests.cc\nb/gcc/config/riscv/riscv-selftests.cc\nindex 636874ebc0f..50457db708e 100644\n--- a/gcc/config/riscv/riscv-selftests.cc\n+++ b/gcc/config/riscv/riscv-selftests.cc\n@@ -116,6 +116,9 @@ calculate_x_in_sequence (rtx reg)\nrtx pat = PATTERN (insn);\nrtx dest = SET_DEST (pat);\n+ if (GET_CODE (pat) == PARALLEL)\n+ dest = SET_DEST (XVECEXP (pat, 0, 0));\n+\nif (GET_CODE (pat) == CLOBBER)\ncontinue;\ndiff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc\nindex 32f9ef9ade9..de9344b37a3 100644\n--- a/gcc/config/riscv/riscv.cc\n+++ b/gcc/config/riscv/riscv.cc\n@@ -4686,6 +4686,16 @@ riscv_initial_elimination_offset (int from, int to)\nreturn src - dest;\n}\n+/* Return true if X is a register that will be eliminated later on. */\n+bool\n+riscv_eliminable_reg (rtx x)\n+{\n+ return REG_P (x) && (REGNO (x) == FRAME_POINTER_REGNUM\n+ || REGNO (x) == ARG_POINTER_REGNUM\n+ || (REGNO (x) >= FIRST_VIRTUAL_REGISTER\n+ && REGNO (x) <= LAST_VIRTUAL_REGISTER));\n+}\n+\n/* Implement RETURN_ADDR_RTX. We do not support moving back to a\nprevious frame. */\n@@ -4887,8 +4897,9 @@ riscv_adjust_libcall_cfi_prologue ()\n}\n/* Debug info for adjust sp. */\n- adjust_sp_rtx = gen_add3_insn (stack_pointer_rtx,\n- stack_pointer_rtx, GEN_INT (-saved_size));\n+ adjust_sp_rtx = gen_rtx_SET (stack_pointer_rtx,\n+ gen_rtx_fmt_ee (PLUS, GET_MODE (stack_pointer_rtx),\n+ stack_pointer_rtx, GEN_INT (saved_size)));\ndwarf = alloc_reg_note (REG_CFA_ADJUST_CFA, adjust_sp_rtx,\ndwarf);\nreturn dwarf;\n@@ -4990,8 +5001,9 @@ riscv_adjust_libcall_cfi_epilogue ()\nint saved_size = cfun->machine->frame.save_libcall_adjustment;\n/* Debug info for adjust sp. */\n- adjust_sp_rtx = gen_add3_insn (stack_pointer_rtx,\n- stack_pointer_rtx, GEN_INT (saved_size));\n+ adjust_sp_rtx = gen_rtx_SET (stack_pointer_rtx,\n+ gen_rtx_fmt_ee (PLUS, GET_MODE (stack_pointer_rtx),\n+ stack_pointer_rtx, GEN_INT (saved_size)));\ndwarf = alloc_reg_note (REG_CFA_ADJUST_CFA, adjust_sp_rtx,\ndwarf);\ndiff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md\nindex 798f7370a08..985dbdd50c4 100644\n--- a/gcc/config/riscv/riscv.md\n+++ b/gcc/config/riscv/riscv.md\n@@ -446,23 +446,80 @@\n[(set_attr \"type\" \"fadd\")\n(set_attr \"mode\" \"\")])\n-(define_insn \"addsi3\"\n- [(set (match_operand:SI 0 \"register_operand\" \"=r,r\")\n- (plus:SI (match_operand:SI 1 \"register_operand\" \" r,r\")\n- (match_operand:SI 2 \"arith_operand\" \" r,I\")))]\n+(define_expand \"add3\"\n+ [(parallel\n+ [(set (match_operand:GPR 0 \"register_operand\" \"\")\n+ (plus:GPR (match_operand:GPR 1 \"register_operand\" \"\")\n+ (match_operand:GPR 2 \"add_operand\" \"\")))\n+ (clobber (match_scratch:GPR 3 \"\"))])]\n\"\"\n- \"add%i2%~\\t%0,%1,%2\"\n+{\n+ if (riscv_eliminable_reg (operands[1]))\n+ {\n+ if (splittable_const_int_operand (operands[2], mode))\n+ {\n+ /* The idea here is that we emit\n+ add op0, op1, %hi(op2)\n+ addi op0, op0, %lo(op2)\n+ Then when op1, the eliminable reg, gets replaced with sp+offset,\n+ we can simplify the constants. */\n+ HOST_WIDE_INT high_part = CONST_HIGH_PART (INTVAL (operands[2]));\n+ emit_insn (gen_add3_internal (operands[0], operands[1],\n+ GEN_INT (high_part)));\n+ operands[1] = operands[0];\n+ operands[2] = GEN_INT (INTVAL (operands[2]) - high_part);\n+ }\n+ else if (! const_arith_operand (operands[2], mode))\n+ operands[2] = force_reg (mode, operands[2]);\n+ }\n+})\n+\n+(define_insn_and_split \"add3_internal\"\n+ [(set (match_operand:GPR 0 \"register_operand\" \"=r,r,&r,!&r\")\n+ (plus:GPR (match_operand:GPR 1 \"register_operand\" \" %r,r,r,0\")\n+ (match_operand:GPR 2 \"add_operand\" \" r,I,L,L\")))\n+ (clobber (match_scratch:GPR 3 \"=X,X,X,&r\"))]\n+ \"\"\n+{\n+ if ((which_alternative == 2) || (which_alternative == 3))\n+ return \"#\";\n+\n+ if (TARGET_64BIT && mode == SImode)\n+ return \"add%i2w\\t%0,%1,%2\";\n+ else\n+ return \"add%i2\\t%0,%1,%2\";\n+}\n+ \"&& reload_completed && const_lui_operand (o 100 17895 100 17742 100 153 509k 4500 --:--:-- --:--:-- --:--:-- 513k perands[2], mode)\"\n+ [(const_int 0)]\n+{\n+ if (REGNO (operands[0]) != REGNO (operands[1]))\n+ {\n+ emit_insn (gen_mov (operands[0], operands[2]));\n+ emit_insn (gen_add3_internal (operands[0], operands[0],\noperands[1]));\n+ }\n+ else\n+ {\n+ emit_insn (gen_mov (operands[3], operands[2]));\n+ emit_insn (gen_add3_internal (operands[0], operands[0],\noperands[3]));\n+ }\n+ DONE;\n+}\n[(set_attr \"type\" \"arith\")\n- (set_attr \"mode\" \"SI\")])\n+ (set_attr \"mode\" \"\")])\n-(define_insn \"adddi3\"\n- [(set (match_operand:DI 0 \"register_operand\" \"=r,r\")\n- (plus:DI (match_operand:DI 1 \"register_operand\" \" r,r\")\n- (match_operand:DI 2 \"arith_operand\" \" r,I\")))]\n- \"TARGET_64BIT\"\n- \"add%i2\\t%0,%1,%2\"\n+(define_insn \"add3_internal2\"\n+ [(set (match_operand:GPR 0 \"register_operand\" \"=r,r\")\n+ (plus:GPR (match_operand:GPR 1 \"register_operand\" \" %r,r\")\n+ (match_operand:GPR 2 \"arith_operand\" \" r,I\")))]\n+ \"\"\n+ {\n+ if (TARGET_64BIT && mode == SImode)\n+ return \"add%i2w\\t%0,%1,%2\";\n+ else\n+ return \"add%i2\\t%0,%1,%2\";\n+ }\n[(set_attr \"type\" \"arith\")\n- (set_attr \"mode\" \"DI\")])\n+ (set_attr \"mode\" \"\")])\n(define_expand \"addv4\"\n[(set (match_operand:GPR 0 \"register_operand\" \"=r,r\")\n@@ -508,6 +565,7 @@\n","prefixes":["v2"]}+ exit 1 Build step 'Execute shell' marked build as failure Finished: FAILURE