Started by user snail Running as SYSTEM [EnvInject] - Loading node environment variables. Building remotely on docker-jenkins-agent in workspace /home/jenkins/agent/workspace/gcc-patch [WS-CLEANUP] Deleting project workspace... [WS-CLEANUP] Deferred wipeout is used... [WS-CLEANUP] Done The recommended git tool is: NONE using credential 0adb5fc7-caa2-429d-97d2-c7fa2fa1d884 Cloning the remote Git repository Using shallow clone with depth 1 Avoid fetching tags Cloning repository git@github.com:plctlab/patchwork-gcc.git > git init /home/jenkins/agent/workspace/gcc-patch # timeout=10 Fetching upstream changes from git@github.com:plctlab/patchwork-gcc.git > git --version # timeout=10 > git --version # 'git version 2.37.2' using GIT_SSH to set credentials patchwork github wangliu-iscas git ssh key Verifying host key using known hosts file, will automatically accept unseen keys > git fetch --no-tags --force --progress --depth=1 -- git@github.com:plctlab/patchwork-gcc.git +refs/heads/*:refs/remotes/origin/* # timeout=10 > git config remote.origin.url git@github.com:plctlab/patchwork-gcc.git # timeout=10 > git config --add remote.origin.fetch +refs/heads/*:refs/remotes/origin/* # timeout=10 Avoid second fetch > git rev-parse refs/remotes/origin/master^{commit} # timeout=10 Checking out Revision c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a (refs/remotes/origin/master) > git config core.sparsecheckout # timeout=10 > git checkout -f c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a # timeout=10 Commit message: "RISC-V: Reorganize binary autovec testcases" > git rev-list --no-walk c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a # timeout=10 [EnvInject] - Mask passwords that will be passed as build parameters. [EnvInject] - Executing scripts and injecting environment variables after the SCM step. [EnvInject] - Injecting as environment variables the properties content GITHUB_REPO=https://github.com/plctlab/patchwork-gcc PATCHWORK_URL=https://patchwork.plctlab.org [EnvInject] - Variables injected successfully. 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[PR113323]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEIaLhkFP2KOwCC@tucnak/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2024-01/mbox/"}]' + bundle_id=56 + git-pw bundle add 56 187631 +------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | Property | Value | |------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------| | ID | 56 | | Name | gcc-patch_2024-01 | | URL | https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2024-01/ | | Owner | patchwork-bot | | Project | gcc-patch | | Public | True | | Patches | 184129 [v9,1/2] Add condition coverage (MC/DC) | | | 184128 [v9,2/2] Add gcov MC/DC tests for GDC | | | 184130 [middle-end,take,#2] Only call targetm.truly_noop_truncation for truncations. | | | 184142 LoongArch: Provide fmin/fmax RTL pattern for vectors | | | 184154 Match: Improve inverted_equal_p for bool and `^` and `==` [PR113186] | | | 184161 [gcc,1/3] Move GNU/Hurd startfile spec from config/i386/gnu.h to config/gnu.h | | | 184160 [gcc,2/3] aarch64: Add support for aarch64-gnu (GNU/Hurd on AArch64) | | | 184158 [gcc,3/3] libgcc: Add basic support for aarch64-gnu (GNU/Hurd on AArch64) | | | 184175 config-ml.in: Fix multi-os-dir search | | | 184182 [RFA,V3] new pass for sign/zero extension elimination | | | 184189 [committed] RISC-V: Add crypto machine descriptions | | | 184193 [Committed] RISC-V: Declare STMT_VINFO_TYPE (...) as local variable | | | 184199 [committed] RISC-V: Modify copyright year of vector-crypto.md | | | 184206 Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector | | | 184207 testsuite: Reduce gcc.dg/torture/inline-mem-cpy-1.c by 11 for simulators | | | 184208 RISC-V: Make liveness be aware of rgroup number of LENS[dynamic LMUL] | | | 184209 Re???Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector | | | 184268 [Committed] RISC-V: Add simplification of dummy len and dummy mask COND_LEN_xxx pattern | | | 184274 [v5,1/2] RISC-V: Add crypto vector builtin function. | | | 184275 [v5,2/2] RISC-V: Add crypto vector api-testing cases. | | | 184289 [v6,1/2] RISC-V: Add crypto vector builtin function. | | | 184291 [v3,01/12,GCC] arm: vld1q_types_x2 ACLE intrinsics | | | 184298 [v3,02/12,GCC] arm: vld1q_types_x3 ACLE intrinsics | | | 184292 [v3,03/12,GCC] arm: vld1q_types_x4 ACLE intrinsics | | | 184296 [v3,04/12,GCC] arm: vst1_types_x2 ACLE intrinsics | | | 184293 [v3,05/12,GCC] arm: vst1_types_x3 ACLE intrinsics | | | 184300 [v3,06/12,GCC] arm: vst1_types_x4 ACLE intrinsics | | | 184297 [v3,07/12,GCC] arm: vst1q_types_x2 ACLE intrinsics | | | 184301 [v3,08/12,GCC] arm: vst1q_types_x3 ACLE intrinsics | | | 184299 [v3,09/12,GCC] arm: vst1q_types_x4 ACLE intrinsics | | | 184294 [v3,10/12,GCC] arm: vld1_types_x2 ACLE intrinsics | | | 184302 [v3,11/12,GCC] arm: vld1_types_x3 ACLE intrinsics | | | 184303 [v3,12/12,GCC] arm: vld1_types_x4 ACLE intrinsics | | | 184305 Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector | | | 184348 [v3] RISC-V: Bugfix for doesn't honor no-signed-zeros option | | | 184319 [v4] RISC-V: Handle differences between XTheadvector and Vector | | | 184357 libsanitizer: Enable LSan and TSan for riscv64 | | | 184392 [OpenACC,2.7] Implement reductions for arrays and structs | | | 184431 libstdc++: testsuite: reduce max_size_type.cc exec time [PR113175] | | | 184440 [v2,1/2] Implement ASM_DECLARE_FUNCTION_NAME using ASM_OUTPUT_FUNCTION_LABEL | | | 184439 [v2,2/2] asan: Align .LASANPC on function boundary | | | 184443 RISC-V: Implement ZACAS extensions | | | 184534 c++/modules: Emit definitions of ODR-used static members imported from modules [PR112899] | | | 184535 c++/modules: Fix ICE when writing nontrivial variable initializers | | | 184540 [1/4;,v4] options: add gcc/regenerate-opt-urls.py | | | 184548 [v6,2/2] RISC-V: Add crypto vector api-testing cases. | | | 184554 [v3,2/3] libatomic: Enable LSE128 128-bit atomics for armv9.4-a | | | 184628 [v7,2/2] RISC-V: Add crypto vector api-testing cases. | | | 184630 [v4] RISC-V: Handle differences between XTheadvector and Vector | | | 184689 c++: Export usings referring to global module fragment [PR109679] | | | 184691 RISC-V: Fix bug of earliest fusion for infinite loop[VSETVL PASS] | | | 184702 [V2] RISC-V: Fix bug of earliest fusion for infinite loop[VSETVL PASS] | | | 184713 [committed] Small tweaks for update-copyright.py | | | 184733 [v2] c++/modules: Emit definitions of ODR-used static members imported from modules [PR112899] | | | 184774 [committed] Re: [PATCH] openmp: Add support for the 'indirect' clause in C/C++ | | | 184784 Ping: [PATCH] enable ATOMIC_COMPARE_EXCHANGE opt for floating type or types contains padding | | | 184786 [committed] Re: [PATCH] openmp: Add support for the 'indirect' clause in C/C++ | | | 184817 libgomp.texi: Document omp_display_env | | | 184822 c++: explicit inst w/ many constrained partial specs [PR104634] | | | 184826 [2/1] c++: access of class-scope partial tmpl spec | | | 184857 [Committed,V3] RISC-V: Fix bug of earliest fusion for infinite loop[VSETVL PASS] | | | 184858 [Committed] RISC-V: Fix indent | | | 184890 [committed] MIPS: define_attr perf_ratio in mips.md | | | 184891 [committed] MIPS: Implement TARGET_INSN_COSTS | | | 184892 [committed] MIPS: Add pattern insqisi_extended and inshisi_extended | | | 184893 [committed] MIPS/testsuite: Include stdio.h in mipscop tests | | | 184895 [v4] RISC-V: Handle differences between XTheadvector and Vector | | | 184897 [v4] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 184898 LoongArch: Fixed the problem of incorrect judgment of the immediate field of the [x]vld/[x]vst instruction. | | | 184908 [committed,obvious] OpenMP: trivial cleanups to omp-general.cc | | | 184916 [Committed] RISC-V: Refine LMUL computation for MASK_LEN_LOAD/MASK_LEN_STORE IFN | | | 184935 RISC-V: Teach liveness estimation be aware of .vi variant | | | 184944 [Committed,V2] RISC-V: Make liveness estimation be aware of .vi variant | | | 184945 lower-bitint: Punt .*_OVERFLOW optimization if cast from IMAGPART_EXPR appears before REALPART_EXPR [PR113119] | | | 184947 lower-bitint: Fix up lowering of huge _BitInt 0 PHI args [PR113120] | | | 184955 Improve __builtin_popcount* (x) == 1 generation if x is known != 0 [PR90693] | | | 184957 Avoid ICE with m68k-elf -malign-int and libcalls | | | 184959 [v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0 | | | 184962 scev: Avoid ICE on results used in abnormal PHI args [PR113201] | | | 184983 [Committed,V3] RISC-V: Make liveness estimation be aware of .vi variant | | | 185013 contrib: Add script name to usage error in gen_wcwidth.py | | | 185021 [pushed] analyzer: handle arrays of unknown size in access diagrams [PR113222] | | | 185022 [pushed] analyzer: fix deref-before-check false positives due to inlining [PR112790] | | | 185023 [pushed] analyzer: add sarif properties for checker events | | | 185030 Add -falign-all-functions | | | 185035 contrib: Remove C-style comments from Python files | | | 185052 [COMMITTED] libcpp: add function to check XID properties | | | 185064 [avr,applied] PR target/112952 Fix attribute "io" et al. handling. | | | 185122 [pushed,1/2] libstdc++: rename _A badname in | | | 185121 [pushed,2/2] libstdc++: fix typo in | | | 185124 :Re: [PATCH v2] c++/modules: Emit definitions of ODR-used static members imported from modules [PR112899] | | | 185161 [5/4] libbacktrace: improve getting debug information for loaded dlls | | | 185175 [committed] RISC-V: Add crypto vector builtin function. | | | 185176 [committed] RISC-V: Add crypto vector api-testing cases. | | | 185186 [v2] libgfortran: Bugfix if not define HAVE_ATOMIC_FETCH_ADD | | | 185191 RISC-V: Teach liveness computation loop invariant shift amount[Dynamic LMUL] | | | 185207 [v2,1/2] LoongArch: Add the macro implementation of mcmodel=extreme. | | | 185206 [v2,2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs. | | | 185210 [v2,1/7] LoongArch: testsuite:Added support for vector object detection. | | | 185208 [v2,2/7] LoongArch: testsuite:Modify the test behavior of the vect-bic-bitmask-{12, 23}.c file. | | | 185211 [v2,3/7] LoongArch: testsuite:Added detection support for LoongArch architecture in vect-{82, 83}.c. | | | 185212 [v2,4/7] LoongArch: testsuite:Fix FAIL in file bind_c_array_params_2.f90. | | | 185213 [v2,5/7] LoongArch: testsuite:Delete the default run behavior in pr60510.f. | | | 185214 [v2,6/7] LoongArch: testsuite:Added additional vectorization "-mlasx" compilation option. | | | 185209 [v2,7/7] LoongArch: testsuite:Give up the detection of the gcc.dg/fma-{3, 4, 6, 7}.c file. | | | 185216 RISC-V: Allow simplification non-vlmax with len = NUNITS reg to reg move | | | 185219 [x86_64] PR target/107563: Add 3-instruction subroutine vector shift in ix86_expand_vec_perm_const_1 | | | 185228 [v3] LoongArch: testsuite:Added support for vector object detection. | | | 185239 [1/4] LoongArch: Handle ISA evolution switches along with other options | | | 185238 [2/4] LoongArch: Rename ISA_BASE_LA64V100 to ISA_BASE_LA64 | | | 185242 [3/4] LoongArch: Use enums for constants | | | 185241 [4/4] LoongArch: Simplify -mexplicit-reloc definitions | | | 185247 sparc: Char arrays are 64-bit aligned on SPARC | | | 185248 [1/2] sparc: Revert membar optimization that is not suitable for LEON5 | | | 185249 sparc: Treat instructions with length 0 as empty | | | 185250 [2/2] sparc: Add errata workaround to membar patterns | | | 185251 LoongArch: Improve lasx_xvpermi_q_ insn pattern | | | 185252 LoongArch: Optimize zero_extendqisi2 and zero_extendqidi2 patterns | | | 185253 LoongArch: Implenment vec_init where N is a LSX vector mode | | | 185254 [PATCHv2] aarch64/expr: Use ccmp when the outer expression is used twice [PR100942] | | | 185256 [v3,1/2] LoongArch: Add the macro implementation of mcmodel=extreme. | | | 185255 [v3,2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs. | | | 185285 [committed] RISC-V: Clean up testsuite for multi-lib testing [NFC] | | | 185286 [committed] RISC-V: Clean up unused variable [NFC] | | | 185296 [v7,1/2] RISC-V: Add crypto vector builtin function. | | | 185316 RISC-V: Fix avl-type operand index error for ZVBC | | | 185355 [committed] libstdc++: Use if-constexpr in std::__try_use_facet [PR113099] | | | 185359 [committed] libstdc++: Remove UB from month and weekday additions and subtractions. | | | 185374 [committed] libstdc++: Fix std::char_traits::move [PR113200] | | | 185390 LoongArch: Implement option save/restore | | | 185434 [committed] libstdc++: Do not use __is_convertible unconditionally [PR113241] | | | 185450 libstdc++: Add Unicode-aware width estimation for std::format | | | 185445 [committed] libstdc++: Avoid overflow when appending to std::filesystem::path | | | 185455 [pushed] aarch64: Extend VECT_COMPARE_COSTS to !SVE [PR113104] | | | 185457 aarch64: Rework uxtl->zip optimisation [PR113196] | | | 185467 c++: address of NTTP object as targ [PR113242] | | | 185470 libgccjit: Add support for setting the comment ident | | | 185476 [v2,2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops | | | 185516 omp_target_is_accessible (was: [patch] libgomp.texi: Document omp_display_env) | | | 185532 c++: reference variable as default targ [PR101463] | | | 185554 Fortran: bogus warnings with REPEAT intrinsic and -Wconversion-extra [PR96724] | | | 185551 PR target/112886, Add %S to print_operand for vector pair support | | | 185564 Repost [PATCH 1/6] Add -mcpu=future | | | 185565 Repost [PATCH 2/6] PowerPC: Make -mcpu=future enable -mblock-ops-vector-pair. | | | 185566 Repost [PATCH 3/6] PowerPC: Add support for accumulators in DMR registers. | | | 185567 Repost [PATCH 4/6] PowerPC: Make MMA insns support DMR registers. | | | 185568 Repost [PATCH 5/6] PowerPC: Switch to dense math names for all MMA operations. | | | 185569 Repost [PATCH 6/6] PowerPC: Add support for 1,024 bit DMR registers. | | | 185572 [COMMITTED] Regenerate libgomp/configure for copyright year update | | | 185575 [Committed,V2] RISC-V: Allow simplification non-vlmax with len = NUNITS reg to reg move | | | 185576 [Committed,V2] RISC-V: Teach liveness computation loop invariant shift amount | | | 185588 [v3,1/8] c++: Implement __is_const built-in trait | | | 185582 [v3,2/8] libstdc++: Optimize std::is_const compilation performance | | | 185583 [v3,3/8] c++: Implement __is_volatile built-in trait | | | 185584 [v3,4/8] libstdc++: Optimize std::is_volatile compilation performance | | | 185586 [v3,5/8] c++: Implement __is_pointer built-in trait | | | 185587 [v3,6/8] libstdc++: Optimize std::is_pointer compilation performance | | | 185585 [v3,7/8] c++: Implement __is_unbounded_array built-in trait | | | 185589 [v3,8/8] libstdc++: Optimize std::is_unbounded_array compilation performance | | | 185590 [Committed] RISC-V: Update MAX_SEW for available vsevl info[VSETVL PASS] | | | 185618 gimplify: Fix ICE in recalculate_side_effects [PR113228] | | | 185621 [1/3] LoongArch: Optimized some of the symbolic expansion instructions generated during bitwise operations. | | | 185620 [2/3] LoongArch: Redundant sign extension elimination optimization. | | | 185622 [3/3] LoongArch: Redundant sign extension elimination optimization 2. | | | 185623 vect: Fix ICE in vect_analyze_loop_costing [PR113210] | | | 185634 [x86] PR target/113231: Improved costs in Scalar-To-Vector (STV) pass. | | | 185657 [v2] libstdc++: Add Unicode-aware width estimation for std::format | | | 185663 [Patch, fortran PR89645/99065 No IMPLICIT type error with: ASSOCIATE( X => function() ) | | | 185669 [testsuite,applied] PR52641: Fix more sloppy tests | | | 185670 [1/8] OpenMP: metadirective tree data structures and front-end interfaces | | | 185671 [2/8] OpenMP: middle-end support for metadirectives | | | 185672 [3/8] libgomp: runtime support for target_device selector | | | 185673 [4/8] OpenMP: C front end support for metadirectives | | | 185674 [5/8] OpenMP: C++ front-end support for metadirectives | | | 185677 [6/8] OpenMP: common c/c++ testcases for metadirectives | | | 185675 [7/8] OpenMP: Fortran front-end support for metadirectives. | | | 185676 [8/8] OpenMP: Update documentation of metadirective implementation status. | | | 185685 gcn.h: Add builtin_define ("__gfx1030") | | | 185696 [v8,1/4] c++: P0847R7 (deducing this) - prerequisite changes. [PR102609] | | | 185697 [v8,3/4] c++: P0847R7 (deducing this) - diagnostics. [PR102609] | | | 185702 [Committed] RISC-V: Use MAX instead of std::max [VSETVL PASS] | | | 185707 [committed] libstdc++: Remove dg-timeout-factor from test | | | 185704 [committed] libstdc++: Avoid conflicting declaration in eh_call.cc [PR112997] | | | 185725 [testsuite,applied] PR52641: Fix more fallout from sloppy tests. | | | 185736 Add __cow_string C string constructor | | | 185742 [testsuite,applied] PR52641 Fix more fallout from sloppy tests. | | | 185747 [committed] Fix typo in last change | | | 185757 GCN: Add pre-initial support for gfx1100 | | | 185760 [avr,applied] Fix some avr test cases | | | 185761 libstdc++: reduce std::variant template instantiation depth | | | 185771 RISC-V: Also handle sign extension in branch costing | | | 185776 [committed] RISC-V: Fix avl-type operand index error for ZVBC | | | 185777 libstdc++: atomic: Add missing clear_padding in __atomic_float constructor | | | 185782 [v2,1/4] LoongArch: Handle ISA evolution switches along with other options | | | 185783 [v2,2/4] LoongArch: Rename ISA_BASE_LA64V100 to ISA_BASE_LA64 | | | 185779 [v2,3/4] LoongArch: Use enums for constants | | | 185780 [v2,4/4] LoongArch: Simplify -mexplicit-reloc definitions | | | 185791 [committed] libstdc++: Implement P2909R4 ("Dude, where's my char?") for C++20 | | | 185797 [committed,V3] libstdc++: Add Unicode-aware width estimation for std::format | | | 185796 [committed,1/2] libstdc++: Implement P2905R2 "Runtime format strings" for C++20 | | | 185778 [committed,2/2] libstdc++: Implement P2918R0 "Runtime format strings II" for C++26 | | | 185792 strub: Only unbias stack point for SPARC_STACK_BOUNDARY_HACK [PR113100] | | | 185793 testsuite, rs6000: Adjust pcrel-sibcall-1.c with noipa [PR112751] | | | 185794 rs6000: Eliminate zext fed by vclzlsbb [PR111480] | | | 185795 rs6000: Make copysign (x, -1) back to -abs (x) for IEEE128 float [PR112606] | | | 185798 i386: [APX] Add missing document for APX | | | 185813 [committed] RISC-V: Fix testsuite | | | 185814 [1/2] arm: Add cortex-m52 core | | | 185816 [2/2] arm: Add cortex-m52 doc | | | 185839 testsuite: Skip ifcvt-4.c for SPARC V8 | | | 185843 i386: Fix recent testcase fail | | | 185862 [v8,2/2] RISC-V: Add crypto vector api-testing cases. | | | 185863 [v7,1/2] RISC-V: Add crypto vector builtin function. | | | 185871 asan: Do not call asan_function_start () without the current function [PR113251] | | | 185878 Clarify -mmovbe documentation | | | 185879 [v2] c++/modules: Differentiate extern templates and TYPE_DECL_SUPPRESS_DEBUG [PR112820] | | | 185886 [committed] amdgcn: Don't double-count AVGPRs | | | 185887 [committed] amdgcn: Match new XNACK defaults in mkoffload | | | 185907 btf: print string position as comment for validation and testing purposes. | | | 185895 bpf: Correct BTF for kernel_helper attributed decls. | | | 185917 tree-optimization/113026 - avoid vector epilog in more cases | | | 185985 [frontend] : don't ice with pragma NOVECTOR if loop in C has no condition [PR113267] | | | 185992 [v5,1/1] RISC-V: Add support for XCVbi extension in CV32E40P | | | 186006 [1/5] RISC-V: Extract part parsing base ISA logic into a standalone function [NFC] | | | 186007 [2/5] RISC-V: Relax the -march string for accept any order | | | 186008 [3/5] RISC-V: Remove unused function in riscv_subset_list [NFC] | | | 186012 [4/5] RISC-V: Update testsuite due to -march string relaxation | | | 186015 [5/5] RISC-V: Document the syntax of -march | | | 186065 [libatomic] Fix testsuite regressions on ARM [raspberry pi]. | | | 186072 [committed] libstdc++: Remove std::__unicode::__null_sentinel | | | 186101 c++: non-dep array list-init w/ non-triv dtor [PR109899] | | | 186106 [committed] MAINTAINERS: Update my email address | | | 186110 [committed] steering.html: Update my affiliation | | | 186139 [committed] hppa: Fix bind_c_coms.f90 and bind_c_vars.f90 tests on hppa | | | 186146 [committed] Skip gfortran.dg/dec_math.f90 on hppa*-*-hpux* | | | 186147 [committed] xfail dg-final "Sunk statements: 5" on hppa*64*-*-* | | | 186171 Resolve issue with Canadian build for x86_64-w64-mingw32 multilibs | | | 186187 RISC-V: Fix loop invariant check | | | 186188 ??????: Re: [PATCH v8 2/2] RISC-V: Add crypto vector api-testing cases. | | | 186189 ??????: Re: [PATCH v7 1/2] RISC-V: Add crypto vector builtin function. | | | 186190 [Committed] RISC-V: Fix comments of segment load/store intrinsic[NFC] | | | 186191 Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector | | | 186192 [Committed] RISC-V: Fix comments of segment load/store intrinsic | | | 186197 [v5] RISC-V: Handle differences between XTheadvector and Vector | | | 186198 Re???[PATCH v4] RISC-V: Handle differences between XTheadvector and Vector | | | 186227 Add -mevex512 into invoke.texi | | | 186229 i386: [APX] Document inline asm behavior and new switch for APX | | | 186230 [wwwdocs] gcc-14/changes: Update APX inline asm behavior for x86_64 | | | 186249 c++: side effect in nullptr_t conversion fix | | | 186277 vect: Ensure both NITERSM1 and NITERS are INTEGER_CSTs or neither of them [PR113210] | | | 186283 c-family: copy attribute diagnostic fixes [PR113262] | | | 186284 [committed] libgomp: Use absolute pathname to testsuite/flock [PR113192] | | | 186297 Fix PR rtl-optimization/113140 | | | 186298 [Ada] Fix PR ada/113195 | | | 186296 Fix PR rtl-optimization/113140 | | | 186302 [Ada] Fix PR ada/112781 (1/2) | | | 186307 [Ada] Fix PR ada/112781 (2/2) | | | 186311 Optimize A < B ? A : B to MIN_EXPR. | | | 186317 rs6000: Fix ASAN linker errors for Power ELF V1 ABI [PR113284] | | | 186323 rs6000: New pass for replacement of adjacent lxv with lxvp. | | | 186349 tree-optimization/113026 - fix vector epilogue maximum iter bound | | | 186393 [gcc-13] libstdc++: Add Filesystem TS and std::stacktrace symbols to libstdc++exp.a | | | 186361 [committed] aarch64: Fix up GC of aarch64_simd_types [PR113270] | | | 186366 [COMMITTED] ada: Avoid xref on out params of TSS | | | 186369 [COMMITTED] ada: Remove unreachable code in Resolve_Extension_Aggregate | | | 186364 [COMMITTED] ada: Fix precondition in Interfaces.C.Strings | | | 186365 [COMMITTED] ada: Error compiling Ada 2022 object renaming with no subtype mark | | | 186368 [COMMITTED] ada: Fix bug in Sem_Util.Enclosing_Declaration | | | 186367 [COMMITTED] ada: Fix uses of not Present | | | 186375 [COMMITTED] ada: Remove dead code for GNATprove inlining | | | 186378 [COMMITTED] ada: Remove dead detection of recursive inlined subprograms | | | 186380 [COMMITTED] ada: More aggressive inlining of subprogram calls in GNATprove mode | | | 186374 [COMMITTED] ada: Remove side effects depending on the context of subtype declaration | | | 186370 [COMMITTED] ada: Cannot requeue to a procedure implemented by an entry | | | 186373 [COMMITTED] ada: Add __atomic_store_n binding to System.Atomic_Primitives | | | 186377 [COMMITTED] ada: Fix internal error on class-wide allocator inside if-expression | | | 186376 [COMMITTED] ada: Fix limited_with in Check_Scil; allow for <> in pp of aggregate | | | 186381 [COMMITTED] ada: Remove unused runtime entity | | | 186372 [COMMITTED] ada: Excess elements created for indexed aggregates with iterator_specifications | | | 186382 [COMMITTED] ada: Allow passing private types to generic formal incomplete types | | | 186371 [COMMITTED] ada: Minor change replacing "not Present" tests with "No" tests | | | 186383 [COMMITTED] ada: Do not count comparison of addresses as a modification | | | 186379 [COMMITTED] ada: Preliminary cleanup in aliasing support code | | | 186384 [COMMITTED] ada: Fix bogus Constraint_Error on allocator for access to array of access type | | | 186389 [COMMITTED] ada: Document new SPARK aspect and pragma Always_Terminates | | | 186463 hwasan: Check if Intel LAM_U57 is enabled | | | 186469 [2/7,v2] lto: Remove random_seed from section name. | | | 186471 [committed] Fix minor bug on mn103 port | | | 186473 [committed] Fix minor bug in epiphany port | | | 186511 [committed] libstdc++: Simplify some chrono formatters | | | 186562 Fix debug info for enumeration types with reverse Scalar_Storage_Order | | | 186572 Fix spurious match in extract_symvers | | | 186595 libstdc++: Prefer posix_memalign for aligned-new [PR113258] | | | 186637 [committed] libstdc++: Fix Unicode property detection functions | | | 186625 [v2] rs6000: Fix ASAN linker errors for Power ELF V1 ABI [PR113284] | | | 186641 [Committed] RISC-V: Robostify dynamic lmul test | | | 186662 [V2,1/4,RFC] RISC-V: Add non-vector types to dfa pipelines | | | 186660 [V2,2/4,RFC] RISC-V: Add vector related reservations | | | 186663 [V2,3/4,RFC] RISC-V: Use default cost model for insn scheduling for tests affected in PR113249 | | | 186661 [V2,4/4,RFC] RISC-V: Enable assert for insn_has_dfa_reservation | | | 186664 [rs6000] Refactor expand_compare_loop and split it to two functions | | | 186665 RISC-V: Minor tweak dynamic cost model | | | 186666 Update documents for fcf-protection= | | | 186667 config: delete unused CYG_AC_PATH_LIBERTY macro | | | 186669 [v5] RISC-V: Handle differences between XTheadvector and Vector | | | 186671 Add -mevex512 into invoke.texi | | | 186674 Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector | | | 186677 [V2] RISC-V: Minor tweak dynamic cost model | | | 186683 RISC-V: Refine unsigned avg_floor/avg_ceil | | | 186694 [wwwdoc] gcc-14: Add arm cortex-m52 cpu support | | | 186701 Re???Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector | | | 186704 [v1] LoongArch: testsuite:Fixed a bug that added a target check error. | | | 186703 [v2] LoongArch: testsuite:Added support for loongarch. | | | 186705 ?????????Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector | | | 186706 Re???Re???[PATCH v5] RISC-V: Handle differences between XTheadvector and Vector | | | 186708 i386: Add AVX10.1 related macros | | | 186710 Document refactoring of the option -fcf-protection=x. | | | 187019 [01/14] c++: Implement __is_integral built-in trait | | | 187018 [02/14] libstdc++: Optimize std::is_integral compilation performance | | | 187020 [03/14] c++: Implement __is_floating_point built-in trait | | | 187010 [04/14] libstdc++: Optimize std::is_floating_point compilation performance | | | 187022 [05/14] c++: Implement __is_arithmetic built-in trait | | | 187011 [06/14] libstdc++: Optimize std::is_arithmetic compilation performance | | | 187017 [07/14] libstdc++: Optimize std::is_fundamental compilation performance | | | 187016 [08/14] libstdc++: Optimize std::is_compound compilation performance | | | 187013 [09/14] c++: Implement __is_unsigned built-in trait | | | 187009 [10/14] libstdc++: Optimize std::is_unsigned compilation performance | | | 187015 [11/14] c++: Implement __is_signed built-in trait | | | 187021 [12/14] libstdc++: Optimize std::is_signed compilation performance | | | 187012 [13/14] c++: Implement __is_scalar built-in trait | | | 187014 [14/14] libstdc++: Optimize std::is_scalar compilation performance | | | 186725 [v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 186726 [v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 186728 sra: Partial fix for BITINT_TYPEs [PR113120] | | | 186744 Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 186748 RISC-V: Switch RVV cost model to generic vector cost model | | | 186794 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 186798 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 186805 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 186804 libgomp, v2: Use absolute pathname to testsuite/flock [PR113192] | | | 186857 [v2] aarch64: Fix dwarf2cfi ICEs due to recent CFI note changes [PR113077] | | | 186862 OpenMP: Fix new lvalue-parsing map/to/from tests for 32-bit targets | | | 186864 OpenMP: Fix g++.dg/gomp/bad-array-section-10.C for C++23 and up | | | 186882 [pushed,1/3] pretty-print: add selftest coverage for numbered args | | | 186884 [pushed,2/3] pretty-print: support urlification in phase 3 | | | 186883 [pushed,3/3] gcc-urlifier: handle option prefixes such as '-fno-' | | | 186917 tree-optimization/113078 - conditional subtraction reduction vectorization | | | 186920 middle-end/112740 - vector boolean CTOR expansion issue | | | 186941 [V2] RISC-V: Switch RVV cost model. | | | 186948 [committed] testsuite: Add testcase for already fixed PR [PR112734] | | | 186954 [committed] RISC-V/testsuite: Fix comment termination in pr105314.c | | | 187086 [v3] aarch64: Fix dwarf2cfi ICEs due to recent CFI note changes [PR113077] | | | 187090 libstdc++: std/ranges - Remove a duplicate define directive | | | 187091 [v2] gcc/doc: spelling mistakes and example | | | 187092 [v2] : gcc/doc/extend.texi: Update builtin example for __builtin_FILE, __builtin_LINE __builtin_FUNCTION | | | 187102 libstdc++/ranges: Use perfect forwarding in _Pipe and _Partial ctors | | | 187104 libstdc++: Use _GLIBCXX_USE_BUILTIN_TRAIT for _Nth_type | | | 187099 Fortran: annotations for DO CONCURRENT loops [PR113305] | | | 187115 PING: [PATCH] Do not count unused scalar use when marking STMT_VINFO_LIVE_P [PR113091] | | | 187123 libstdc++/ranges: Use C++23 deducing this for _Pipe and _Partial | | | 187120 [v2] LoongArch: Implement option save/restore | | | 187124 LoongArch: Split loongarch_option_override_internal into smaller procedures | | | 187130 [v2] LoongArch: Split loongarch_option_override_internal into smaller procedures | | | 187119 [v4] LOOP-UNROLL: Leverage HAS_SIGNED_ZERO for var expansion | | | 187148 RISC-V: VLA preempts VLS on unknown NITERS loop | | | 187154 i386: Add "z" constraint for symbolic address/label reference [PR105576] | | | 187163 [committed] libstdc++: Optimize std::is_compound compilation performance | | | 187166 match: Delay folding of 1/x into `(x+1u)<2u?x:0` until late [PR113301] | | | 187174 c++/modules: Support thread_local statics in header modules [PR113292] | | | 187179 libstdc++: Fix error handling for std::filesystem::equivalent [PR113250] | | | 187220 tree-optimization/111003 - new testcase | | | 187223 libgcc: Use may_alias attribute in bitint handlers | | | 187234 RISC-V: Increase scalar_to_vec_cost from 1 to 3 | | | 187236 [rs6000] Eliminate unnecessary byte swaps for block clear on P8 LE [PR113325] | | | 187241 [v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187242 [v5] LOOP-UNROLL: Leverage HAS_SIGNED_ZERO for var expansion | | | 187260 RISC-V: Documnet the list of supported extensions | | | 187261 Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187262 Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187263 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187265 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187266 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187269 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187270 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187271 [v2,1/2] libstdc++: Fix error handling in filesystem::equivalent [PR113250] | | | 187272 [v2,2/2] libstdc++: Use using instead of typedef in opts-common.h | | | 187275 [v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187276 Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187277 [commit] MIPS: Add ATTRIBUTE_UNUSED to mips_start_function_definition | | | 187280 [v3,2/2] libstdc++: Use using instead of typedef in opts-common.h | | | 187284 expr: Limit the store flag optimization for single bit to non-vectors [PR113322] | | | 187298 Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187305 [v5] RISC-V: Handle differences between XTheadvector and Vector | | | 187314 [v2,1/2] LoongArch: Redundant sign extension elimination optimization. | | | 187315 [v2,2/2] LoongArch: Redundant sign extension elimination optimization 2. | | | 187317 [wwwdocs] tweak for sourceware account request alias | | | 187347 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187359 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187364 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187365 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187399 [wwwdocs] Update notes on libstdc++ header dependency changes in GCC 14 | | | 187396 [wwwdocs] Document additional symbols in libstdc++exp.a for GCC 13.3 | | | 187382 [avr,applied] Small improvements to texi documentation. | | | 187384 tree-optimization/112636 - estimate niters before header copying | | | 187385 [V2] RISC-V: Adjust scalar_to_vec cost accurately | | | 187392 [s390] target/112280 - properly guard permute query | | | 187394 tree-optimization/112505 - bit-precision induction vectorization | | | 187395 tree-optimization/113126 - vector extension compare optimization | | | 187393 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187401 [1/2] gccrs: fixup: Fix bootstrap build | | | 187400 [2/2] gccrs: fixup: Fix missing build dependency | | | 187402 [pushed,PR112918,LRA] : Fixing IRA ICE on m68k | | | 187407 [v2,1/1] RISC-V: Add support for XCVmem extension in CV32E40P | | | 187425 [avr,applied] invoke.texi: Move avr internal options to their own @subsubsection. | | | 187429 testsuite: remove xfail | | | 187461 libstdc++: use updated type for __unexpected_handler | | | 187459 [V2] PR target/112886, Add %S to print_operand for vector pair support. | | | 187471 [committed] libstdc++: Add GDB printer for std::integral_constant | | | 187474 libstdc++: Make PSTL algorithms accept C++20 iterators [PR110512] | | | 187469 i386: Add "Ws" constraint for symbolic address/label reference [PR105576] | | | 187481 OpenMP 5.1: WIP delimited (begin/end) 'declare variant' support | | | 187492 [committed] libstdc++: Document addition of libstdc++exp.a | | | 187496 libstdc++: Fix std::runtime_format deviations from the spec [PR113320] | | | 187487 [v2] c++: side effect in nullptr_t conversion fix | | | 187503 [committed] libstdc++: Fix spelling mistake in new doc addition | | | 187497 [RFC] codingconventions: add lambda guidelines | | | 187502 [pushed] c++: corresponding object parms [PR113191] | | | 187508 libstdc++: Implement P2255R2 dangling checks for std::tuple [PR108822] | | | 187505 libstdc++: Fix non-portable results from 64-bit std::subtract_with_carry_engine [PR107466] | | | 187510 [1/2] RISC-V/testsuite: Widen coverage for pr105314.c | | | 187511 [2/2] RISC-V/testsuite: Also verify if-conversion runs for pr105314.c | | | 187515 libgccjit: Fix float playback for cross-compilation | | | 187528 ?????????Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187533 RISC-V: Modify ABI-name length of vfloat16m8_t | | | 187542 [v1] LoongArch: testsuite:Added additional vectorization "-mlsx" option. | | | 187543 [v1] LoongArch: testsuite:Fix fail in gen-vect-{2,25}.c file. | | | 187548 i386: Remove redundant move in vnni pattern | | | 187554 [v1] RISC-V: Update the comments of riscv_v_ext_mode_p [NFC] | | | 187557 [v4] RISC-V: Introduce XTheadVector as a subset of V1.0.0 | | | 187558 [v6] RISC-V: Handle differences between XTheadvector and Vector | | | 187559 Re???Re???[PATCH v5] RISC-V: Add support for xtheadvector-specific intrinsics. | | | 187567 [Committed] libgcc, nios2: Fix exception handling on nios2 with -fpic | | | 187584 [rs6000] Enable block compare expand on P9 with m32 and mpowerpc64 | | | 187600 [Committed] RISC-V: Enhance a testcase | | | 187602 middle-end/113344 - is_truth_type_for vs GENERIC tcc_comparison | | | 187625 [V3] RISC-V: Adjust scalar_to_vec cost | | | 187627 c: Avoid _BitInt indexes > sizetype in ARRAY_REFs [PR113315] | | | 187628 lower-bitint: Fix up handling of uninitialized large/huge _BitInt call arguments [PR113316] | | | 187630 lower-bitint: Fix a typo in a condition [PR113323] | | | 187631 sra: Punt for too large _BitInt accesses [PR113330] | +------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+ + git config pull.rebase false + git fetch origin master From github.com:plctlab/patchwork-gcc * branch master -> FETCH_HEAD + git checkout master Switched to a new branch 'master' branch 'master' set up to track 'origin/master'. + git pull origin master From github.com:plctlab/patchwork-gcc * branch master -> FETCH_HEAD Already up to date. + git fetch origin upstream-master From github.com:plctlab/patchwork-gcc * branch upstream-master -> FETCH_HEAD + git checkout upstream-master Switched to a new branch 'upstream-master' branch 'upstream-master' set up to track 'origin/upstream-master'. + git remote add upstream https://github.com/gcc-mirror/gcc.git + git pull upstream master From https://github.com/gcc-mirror/gcc * branch master -> FETCH_HEAD * [new branch] master -> upstream/master fatal: refusing to merge unrelated histories + git push -u origin upstream-master Everything up-to-date branch 'upstream-master' set up to track 'origin/upstream-master'. + git checkout master Switched to branch 'master' Your branch is up to date with 'origin/master'. + git merge upstream-master fatal: refusing to merge unrelated histories + git push -u origin master Everything up-to-date branch 'master' set up to track 'origin/master'. + branchname=series77449-patch187631 ++ git branch -a ++ grep 'series77449-patch187631$' + checkbranch= + checkbranchresult=null + '[' null = series77449-patch187631 ']' + git checkout -b series77449-patch187631 Switched to a new branch 'series77449-patch187631' ++ curl https://patchwork.plctlab.org/api/1.2/series/77449/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 1315 100 1315 0 0 54791 0 --:--:-- --:--:-- --:--:-- 54791 + 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Jelinek","email":"jakub@redhat.com"},"version":1,"total":1,"received_total":1,"received_all":true,"mbox":"https://patchwork.plctlab.org/series/77449/mbox/","cover_letter":null,"patches":[{"id":187631,"url":"https://patchwork.plctlab.org/api/1.2/patches/187631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:43:27","name":"sra: Punt for too large _BitInt accesses [PR113330]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/"}]}' ++ jq '.patches[] | (.id|tostring) + "," + .mbox' ++ echo '{"id":77449,"url":"https://patchwork.plctlab.org/api/1.2/series/77449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/list/?series=77449","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"sra: Punt for too large _BitInt accesses [PR113330]","date":"2024-01-12T09:43:27","submitter":{"id":40,"url":"https://patchwork.plctlab.org/api/1.2/people/40/","name":"Jakub Jelinek","email":"jakub@redhat.com"},"version":1,"total":1,"received_total":1,"received_all":true,"mbox":"https://patchwork.plctlab.org/series/77449/mbox/","cover_letter":null,"patches":[{"id":187631,"url":"https://patchwork.plctlab.org/api/1.2/patches/187631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/","msgid":"","list_archive_url":null,"date":"2024-01-12T09:43:27","name":"sra: Punt for too large _BitInt accesses [PR113330]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/"}]}' + patchid_patchurl='"187631,https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/"' + echo '"187631,https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/"' + IFS=, + read -r series_patch_id series_patch_url ++ echo '"187631' ++ sed 's/"//g' + series_patch_id=187631 ++ echo 'https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/"' ++ sed 's/"//g' + series_patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/ ++ git rev-parse HEAD + commitid_before=c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a + eval '+++ declare -p bout bret declare -- bout="Applying: sra: Punt for too large _BitInt accesses [PR113330] error: sha1 information is lacking or useless (tree-sra.cc). error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 sra: Punt for too large _BitInt accesses [PR113330] When you have resolved this problem, run \"git am --continue\". If you prefer to skip this patch, run \"git am --skip\" instead. To restore the original branch and stop patching, run \"git am --abort\"." declare -- bret="128" ++ berr='\''++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 10152 100 10152 0 0 260k 0 --:--:-- --:--:-- --:--:-- 260k +++ bout='\''\'\'''\''Applying: sra: Punt for too large _BitInt accesses [PR113330] error: sha1 information is lacking or useless (tree-sra.cc). error: could not build fake ancestor hint: Use '\''\'\'''\''\'\''\'\'''\'''\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\''\'\''\'\'''\'''\''\'\'''\'' to see the failed patch Patch failed at 0001 sra: Punt for too large _BitInt accesses [PR113330] When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\''\'\'''\'' +++ bret=128'\'' ++ declare -p berr declare -- berr="++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 10152 100 10152 0 0 260k 0 --:--:-- --:--:-- --:--:-- 260k +++ bout='\''Applying: sra: Punt for too large _BitInt accesses [PR113330] error: sha1 information is lacking or useless (tree-sra.cc). error: could not build fake ancestor hint: Use '\''\\'\'''\''git am --show-current-patch=diff'\''\\'\'''\'' to see the failed patch Patch failed at 0001 sra: Punt for too large _BitInt accesses [PR113330] When you have resolved this problem, run \"git am --continue\". If you prefer to skip this patch, run \"git am --skip\" instead. To restore the original branch and stop patching, run \"git am --abort\".'\'' +++ bret=128"' ++ +++ declare -p bout bret /tmp/jenkins7142678648004386636.sh: line 129: +++: command not found ++ declare -- 'bout=Applying: sra: Punt for too large _BitInt accesses [PR113330] error: sha1 information is lacking or useless (tree-sra.cc). error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 sra: Punt for too large _BitInt accesses [PR113330] When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' ++ declare -- bret=128 ++ ++ 'berr=++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 10152 100 10152 0 0 260k 0 --:--:-- --:--:-- --:--:-- 260k +++ bout='\''Applying: sra: Punt for too large _BitInt accesses [PR113330] error: sha1 information is lacking or useless (tree-sra.cc). error: could not build fake ancestor hint: Use '\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\'' to see the failed patch Patch failed at 0001 sra: Punt for too large _BitInt accesses [PR113330] When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\'' +++ bret=128' /tmp/jenkins7142678648004386636.sh: line 154: ++: command not found ++ ++ declare -p berr /tmp/jenkins7142678648004386636.sh: line 155: ++: command not found ++ declare -- 'berr=++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 10152 100 10152 0 0 260k 0 --:--:-- --:--:-- --:--:-- 260k +++ bout='\''Applying: sra: Punt for too large _BitInt accesses [PR113330] error: sha1 information is lacking or useless (tree-sra.cc). error: could not build fake ancestor hint: Use '\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\'' to see the failed patch Patch failed at 0001 sra: Punt for too large _BitInt accesses [PR113330] When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\'' +++ bret=128' ++ git rev-parse HEAD + commitid_after=c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a + '[' 128 = 0 ']' + [[ ++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 10152 100 10152 0 0 260k 0 --:--:-- --:--:-- --:--:-- 260k +++ bout='Applying: sra: Punt for too large _BitInt accesses [PR113330] error: sha1 information is lacking or useless (tree-sra.cc). error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 sra: Punt for too large _BitInt accesses [PR113330] When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' +++ bret=128 =~ sha1 information is lacking or useless ]] + submit_check warning Unresolved https://patchwork.plctlab.org/jenkins/job/gcc-patch/15796/consoleText 'Git am fail log' + check_state=warning + patch_state=Unresolved + repo_url=https://patchwork.plctlab.org/jenkins/job/gcc-patch/15796/consoleText + DESCRIPTION='Git am fail log' + curl -X POST -H 'Authorization: Token [*******]' -F state=warning -F target_url=https://patchwork.plctlab.org/jenkins/job/gcc-patch/15796/consoleText -F context=gcc-patch-check -F 'description=Git am fail log' https://patchwork.plctlab.org/api/patches/187631/checks/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 970 100 429 100 541 13406 16906 --:--:-- --:--:-- --:--:-- 30312 {"id":18327,"url":"https://patchwork.plctlab.org/api/patches/187631/checks/18327/","user":{"id":1,"url":"https://patchwork.plctlab.org/api/users/1/","username":"snail","first_name":"","last_name":"","email":"wangliu@iscas.ac.cn"},"date":"2024-01-12T10:30:05.191138","state":"warning","target_url":"https://patchwork.plctlab.org/jenkins/job/gcc-patch/15796/consoleText","context":"gcc-patch-check","description":"Git am fail log"}+ curl -X PATCH -H 'Authorization: Token [*******]' -F state=Unresolved https://patchwork.plctlab.org/api/1.2/patches/187631/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0{"id":187631,"url":"https://patchwork.plctlab.org/api/1.2/patches/187631/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"","list_archive_url":null,"date":"2024-01-12T09:43:27","name":"sra: Punt for too large _BitInt accesses [PR113330]","commit_ref":null,"pull_url":null,"state":"unresolved","archived":false,"hash":"d29b3fb8eb0a21fb262e19c3aedad4128fcd3716","submitter":{"id":40,"url":"https://patchwork.plctlab.org/api/1.2/people/40/","name":"Jakub Jelinek","email":"jakub@redhat.com"},"delegate":null,"mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZaEJv14zRdJurMmA@tucnak/mbox/","series":[{"id":77449,"url":"https://patchwork.plctlab.org/api/1.2/series/77449/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/list/?series=77449","date":"2024-01-12T09:43:27","name":"sra: Punt for too large _BitInt accesses [PR113330]","version":1,"mbox":"https://patchwork.plctlab.org/series/77449/mbox/"}],"comments":"https://patchwork.plctlab.org/api/patches/187631/comments/","check":"warning","checks":"https://patchwork.plctlab.org/api/patches/187631/checks/","tags":{},"headers":{"Return-Path":"","Delivered-To":["ouuuleilei@gmail.com","gcc-patches@gcc.gnu.org"],"Received":["by 2002:a05:693c:2614:b0:101:6a76:bbe3 with SMTP id mm20csp63345dyc;\n Fri, 12 Jan 2024 01:44:37 -0800 (PST)","from server2.sourceware.org (server2.sourceware.org. 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spf=pass smtp.mailfrom=redhat.com","server2.sourceware.org;\n arc=none smtp.remote-ip=170.10.133.124"],"X-Original-To":"gcc-patches@gcc.gnu.org","DMARC-Filter":"OpenDMARC Filter v1.4.2 sourceware.org B6DE538582AD","ARC-Filter":"OpenARC Filter v1.0.0 sourceware.org B6DE538582AD","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;\n s=mimecast20190719; t=1705052615;\n h=from:from:reply-to:reply-to:subject:subject:date:date:\n message-id:message-id:to:to:cc:cc:mime-version:mime-version:\n content-type:content-type; bh=uG/wZoP97Y2Pt3jSxqeiQ7gbzUphUR72Bx9J04DRmmU=;\n b=JUjqc3cegTjYylvXpuJYeQzQNpwiKvOmp+3/OTTTyi4iKHMU7Tdx2wEmDGGPmk1ACX5G8v\n v0Ah+WFeeW/+Z6WRKR71OiPm9B+7qJq8wswIqxTUASNb8FaW9ONdygycJ+oJiDi8xOCrxR\n 6R1krNq54CFomRFQnEBtPy7ZTgJKb98=","X-MC-Unique":"vSFOl9KKPsGisu5Ilk2Q9w-1","Date":"Fri, 12 Jan 2024 10:43:27 +0100","From":"Jakub Jelinek ","To":"Richard Biener , Martin Jambor ","Cc":"gcc-patches@gcc.gnu.org","Subject":"[PATCH] sra: P 100 11850 100 11700 100 150 248k 3260 --:--:-- --:--:-- --:--:-- 251k unt for too large _BitInt accesses [PR113330]","Message-ID":"","MIME-Version":"1.0","X-Scanned-By":"MIMEDefang 3.4.1 on 10.11.54.8","X-Mimecast-Spam-Score":"0","X-Mimecast-Originator":"redhat.com","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","X-Spam-Status":"No, score=-4.4 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH,\n DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, KAM_SHORT,\n RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE,\n SPF_NONE, TXREP,\n T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6","X-Spam-Checker-Version":"SpamAssassin 3.4.6 (2021-04-09) on\n server2.sourceware.org","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Reply-To":"Jakub Jelinek ","Errors-To":"gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org","X-getmail-retrieved-from-mailbox":"INBOX","X-GMAIL-THRID":"1787877315439146076","X-GMAIL-MSGID":"1787877315439146076"},"content":"Hi!\n\nThis is the case I was talking about in\nhttps://gcc.gnu.org/pipermail/gcc-patches/2024-January/642423.html\nand Zdenek kindly found a testcase for it.\nWe can only create BITINT_TYPE with precision at most 65535, not 65536,\nso need to punt if we'd want to create it.\n\nBootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?\n\n2024-01-12 Jakub Jelinek \n\n\tPR tree-optimization/113330\n\t* tree-sra.cc (create_access): Punt for BITINT_TYPE accesses with\n\ttoo large size.\n\n\t* gcc.dg/bitint-69.c: New test.\n\n\n\tJakub","diff":"--- gcc/tree-sra.cc.jj\t2024-01-10 12:45:54.293851670 +0100\n+++ gcc/tree-sra.cc\t2024-01-11 15:13:29.697073438 +0100\n@@ -967,6 +967,12 @@ create_access (tree expr, gimple *stmt,\n disqualify_candidate (base, \"Encountered an access beyond the base.\");\n return NULL;\n }\n+ if (TREE_CODE (TREE_TYPE (expr)) == BITINT_TYPE\n+ && size > WIDE_INT_MAX_PRECISION - 1)\n+ {\n+ disqualify_candidate (base, \"Encountered too large _BitInt access.\");\n+ return NULL;\n+ }\n \n access = create_access_1 (base, offset, size);\n access->expr = expr;\n--- gcc/testsuite/gcc.dg/bitint-69.c.jj\t2024-01-11 15:16:57.573140907 +0100\n+++ gcc/testsuite/gcc.dg/bitint-69.c\t2024-01-12 09:55:30.026374627 +0100\n@@ -0,0 +1,25 @@\n+/* PR tree-optimization/113330 */\n+/* { dg-do compile { target bitint } } */\n+/* { dg-require-stack-check \"generic\" } */\n+/* { dg-options \"-std=c23 -O --param=large-stack-frame=131072 -fstack-check=generic --param=sccvn-max-alias-queries-per-access=0\" } */\n+\n+_BitInt(8) a;\n+\n+static inline __attribute__((__always_inline__)) void\n+bar (int, int, int, int, int, int, int, int)\n+{\n+#if __BITINT_MAXWIDTH__ >= 65535\n+ _BitInt(65535) b = 0;\n+ _BitInt(383) c = 0;\n+#else\n+ _BitInt(63) b = 0;\n+ _BitInt(39) c = 0;\n+#endif\n+ a = b;\n+}\n+\n+void\n+foo (void)\n+{\n+ bar (0, 0, 0, 0, 0, 0, 0, 0);\n+}\n","prefixes":[]}+ exit 1 Build step 'Execute shell' marked build as failure Finished: FAILURE