Started by user snail Running as SYSTEM [EnvInject] - Loading node environment variables. Building remotely on docker-jenkins-agent in workspace /home/jenkins/agent/workspace/gcc-patch [WS-CLEANUP] Deleting project workspace... [WS-CLEANUP] Deferred wipeout is used... [WS-CLEANUP] Done The recommended git tool is: NONE using credential 0adb5fc7-caa2-429d-97d2-c7fa2fa1d884 Cloning the remote Git repository Using shallow clone with depth 1 Avoid fetching tags Cloning repository git@github.com:plctlab/patchwork-gcc.git > git init /home/jenkins/agent/workspace/gcc-patch # timeout=10 Fetching upstream changes from git@github.com:plctlab/patchwork-gcc.git > git --version # timeout=10 > git --version # 'git version 2.37.2' using GIT_SSH to set credentials patchwork github wangliu-iscas git ssh key Verifying host key using known hosts file, will automatically accept unseen keys > git fetch --no-tags --force --progress --depth=1 -- git@github.com:plctlab/patchwork-gcc.git +refs/heads/*:refs/remotes/origin/* # timeout=10 > git config remote.origin.url git@github.com:plctlab/patchwork-gcc.git # timeout=10 > git config --add remote.origin.fetch +refs/heads/*:refs/remotes/origin/* # timeout=10 Avoid second fetch > git rev-parse refs/remotes/origin/master^{commit} # timeout=10 Checking out Revision c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a (refs/remotes/origin/master) > git config core.sparsecheckout # timeout=10 > git checkout -f c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a # timeout=10 Commit message: "RISC-V: Reorganize binary autovec testcases" > git rev-list --no-walk c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a # timeout=10 [EnvInject] - Mask passwords that will be passed as build parameters. [EnvInject] - Executing scripts and injecting environment variables after the SCM step. [EnvInject] - Injecting as environment variables the properties content GITHUB_REPO=https://github.com/plctlab/patchwork-gcc PATCHWORK_URL=https://patchwork.plctlab.org [EnvInject] - Variables injected successfully. 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option.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/20231212120809.13996-1-jiawei@iscas.ac.cn/mbox/"}],"public":true,"mbox":"https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-12/mbox/"}]' + bundle_id=46 + git-pw bundle add 46 177289 +------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | Property | Value | |------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| | ID | 46 | | Name | gcc-patch_2023-12 | | URL | https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-12/ | | Owner | patchwork-bot | | Project | gcc-patch | | Public | True | | Patches | 172177 [RFC] RISC-V: Remove f{r,s}flags builtins | | | 171653 [Committed] RISC-V: Rename vconstraint into group_overlap | | | 171654 : gcc/doc/extend.texi: Update builtin example for __builtin_FILE, __builtin_LINE __builtin_FUNCTION | | | 171655 ping: [PATCH] diagnostics: Fix behavior of permerror options after diagnostic pop [PR111918] | | | 171704 [Committed] RISC-V: Support highpart overlap for floating-point widen instructions | | | 171718 [committed,(pre-approved)] RISC-V: Fix 'E' extension version to test | | | 171722 [v2] LoongArch: Add intrinsic function descriptions for LSX and LASX instructions to doc. | | | 171734 [pushed] c++: remove LAMBDA_EXPR_MUTABLE_P | | | 171742 RISC-V: Update crypto vector ISA info with latest spec | | | 171748 RISC-V: Support widening register overlap for vf4/vf8 | | | 171750 [v1] RISC-V: Bugfix for legitimize move when get vec mode in zve32f | | | 171762 hardcfr: libgcc sym versioning | | | 171771 aarch64: modify Ampere CPU tunings on reassociation/FMA | | | 171792 doc: Update the status of build directory not fully separated | | | 171798 testsuite/arm: Fix bfloat16_vector_typecheck_[12].c tests | | | 171799 [COMMITTED] ada: Constant_Indexing used when context requires a variable | | | 171800 [COMMITTED] ada: Fix wrong finalization for qualified aggregate of limited type in allocator | | | 171801 [COMMITTED] ada: Fix predicate check failure in Expand_Allocator_Expression | | | 171805 [COMMITTED] ada: Too-strict conformance checking for formal discriminated type | | | 171802 [COMMITTED] ada: Add comment describing Partition_Elaboration_Policy dependency. | | | 171806 [COMMITTED] ada: Crash initializing component of private record type | | | 171814 [COMMITTED] ada: Fix spelling of functions with(out) "side effects" | | | 171815 [COMMITTED] ada: Ignore defered compile time errors without backend | | | 171811 [COMMITTED] ada: Remove GNATcheck violations | | | 171819 [COMMITTED] ada: Remove SPARK legality checks | | | 171816 [COMMITTED] ada: Support Put_Image for types in user-defined instances of predefined generics. | | | 171817 [COMMITTED] ada: Rework fix for wrong finalization of qualified aggregate in allocator | | | 171820 RISC-V: Remove earlyclobber for wx/wf instructions. | | | 171884 [v2] doc: Update the status of build directory not fully separated | | | 171927 Ping: [PATCH] Add a late-combine pass [PR106594] | | | 171928 Ping: [PATCH] Allow target attributes in non-gnu namespaces | | | 171943 [wwwdocs] gcc-14/changes.html: Update C++ news for GCC 14 | | | 171944 In 'libgomp.c/declare-variant-{3,4}-*.c', restrict 'scan-offload-tree-dump's to 'only_for_offload_target [...]' (was: [PATCH][libgomp, testsuite, nvptx] Add libgomp.c/declare-variant-3-sm*.c) | | | 171949 Spin 'dg-do run' part of 'libgomp.c/declare-variant-3-sm30.c' off into new 'libgomp.c/declare-variant-3.c' (was: [PATCH][libgomp, testsuite, nvptx] Add libgomp.c/declare-variant-3-sm*.c) | | | 171952 Fix 'libgomp.c/declare-variant-4-*.c', add 'libgomp.c/declare-variant-4.c' (was: [PATCH] amdgcn: Support AMD-specific 'isa' traits in OpenMP context selectors) | | | 171965 s390x: Fix PR112753 | | | 172016 [committed] libstdc++: Fix std::ranges::to errors | | | 171966 libstdc++: Implement LGW 4016 for std::ranges::to | | | 172003 libstdc++: Add workaround to std::ranges::subrange [PR111948] | | | 171990 gcov: Fix __LIBGCC_HAVE_LIBATOMIC definition | | | 172081 htdocs/git.html: correct spelling and use git in example | | | 172118 libstdc++: Simplify ranges::to closure objects | | | 172160 [v3] aarch64: New RTL optimization pass avoid-store-forwarding. | | | 172145 btf: fix PR debug/112768 | | | 172147 btf: fix PR debug/112656 | | | 172146 RISC-V: Vectorized str(n)cmp and strlen. | | | 172194 RISC-V: Fix VSETVL PASS regression | | | 172217 i386: Mark Xeon Phi ISAs as deprecated | | | 172220 Take register pressure into account for vec_construct/scalar_to_vec when the components are not loaded from memory. | | | 172222 [patch-1,rs6000] enable fctiw on old archs [PR112707] | | | 172221 [patch-2,rs6000] guard fctid on PPC64 and powerpc 476 [PR112707] | | | 172235 c++: lambda capture and explicit object parm | | | 172286 RISC-V: Support highpart register overlap for widen vx/vf instructions | | | 172301 lower-bitint: Fix _BitInt .{ADD,SUB}_OVERFLOW lowering [PR112750] | | | 172302 lower-bitint: Fix ICE on bitint-39.c | | | 172304 [v2,1/3] LoongArch: Adjust D version strings. | | | 172306 [v2,2/3] libphobos: Update build scripts for LoongArch64. | | | 172305 [v2,3/3] libphobos: LoongArch hardware support. | | | 172307 [v2] RISC-V: Bugfix for legitimize move when get vec mode in zve32f | | | 172308 lower-bitint: Fix up maximum addition/subtraction/multiplication result computations | | | 172310 lower-bitint: Fix up handle_operand_addr for 0 constants [PR112771] | | | 172311 lower-bitint: Fix lowering of middle sized _BitInt operations which can throw [PR112770] | | | 172312 RISC-V: Support highpart overlap for indexed load with SRC EEW < DEST EEW | | | 172313 gcov: Fix use of __LIBGCC_HAVE_LIBATOMIC | | | 172337 [RISC-V] Improve style to work around PR 60994 in host compiler. | | | 172380 [COMMITTED] bpf: quote section names whenever necessary in assembly output | | | 172386 LoongArch: Add support for TLS descriptors | | | 172399 [v3,1/3] LoongArch: Adjust D version strings. | | | 172401 [v3,2/3] libphobos: Update build scripts for LoongArch64. | | | 172400 [v3,3/3] libruntime: Add fiber context switch code for LoongArch. | | | 172402 [v3] RISC-V: Bugfix for legitimize move when get vec mode in zve32f | | | 172404 extend.texi: Fix up defbuiltin* with spaces in return type | | | 172448 [v7] Introduce attribute sym_alias | | | 172449 testsuite: Tweak some further tests for modern C changes | | | 172450 Fix ambiguity between vect_get_vec_defs with/without vectype | | | 172474 RISC-V: Fix incorrect combine of extended scalar pattern | | | 172478 hardcfr: make builtin_return tests more portable [PR112334] | | | 172497 [pushed] docs: remove stray reference to -fanalyzer-checker=taint [PR103533] | | | 172499 [pushed] diagnostics, analyzer: add optional per-diagnostic property bags to SARIF | | | 172523 untyped calls: enable target switching [PR112334] | | | 172524 ada: Fix Ada bootstrap on macOS | | | 172539 RISC-V: Fix rawmemchr implementation. | | | 172540 RISC-V: Rename and unify stringop strategy handling [NFC]. | | | 172541 RISC-V: Add vectorized strlen. | | | 172542 RISC-V: Add vectorized strcmp. | | | 172547 c: Turn -Wimplicit-function-declaration into a permerror: Fix 'gcc.dg/gnu23-builtins-no-dfp-1.c' (was: [PATCH v3 06/11] c: Turn -Wimplicit-function-declaration into a permerror) | | | 172603 [pushed] wwwdocs: conduct: Change further creativecommons.org links to https | | | 172612 [pushed] wwwdocs: benchmarks: Remove http://annwm.lbl.gov/bench/ | | | 172615 [pushed,PR112445,LRA] : Fix "unable to find a register to spill" error | | | 172630 [COMMITTED] Use range_compatible_p in check_operands_p. | | | 172631 gcc: Disallow trampolines when -fhardened | | | 172686 [v6] c++: implement P2564, consteval needs to propagate up [PR107687] | | | 172731 [v4] RISC-V: Bugfix for legitimize move when get vec mode in zve32f | | | 172739 [1/3] MATCH: Fix zero_one_valued_p's convert pattern | | | 172740 [2/3] Remove check of unsigned_char in maybe_undo_optimize_bit_field_compare. | | | 172741 [3/3] MATCH: (convert)(zero_one !=/== 0/1) for outer type and zero_one type are the same | | | 172751 [v1,1/2] LoongArch: Switch loongarch-def from C to C++ to make it possible. | | | 172750 [v1,2/2] LoongArch: Remove the definition of ISA_BASE_LA64V110 from the code. | | | 172802 pro_and_epilogue: Call df_note_add_problem () if SHRINK_WRAPPING_ENABLED [PR112760] | | | 172805 c++: #pragma GCC unroll C++ fixes [PR112795] | | | 172806 lower-bitint: Fix up lower_addsub_overflow [PR112807] | | | 172816 htdocs/contribute.html: correct disctinct->distinct spelling | | | 172829 libgcov: Call __builtin_fork instead of fork | | | 172859 download_prerequisites: add --only-gettext | | | 172867 [v5] Introduce strub: machine-independent stack scrubbing | | | 172875 RISC-V: Document optimization parameter riscv-strcmp-inline-limit | | | 172894 gcc/doc: spelling mistakes and example | | | 172897 [v3,1/3] libgomp, nvptx: low-latency memory allocator | | | 172896 [v3,2/3] openmp, nvptx: low-lat memory access traits | | | 172898 [v3,3/3] amdgcn, libgomp: low-latency allocator | | | 172895 wwwdocs: spelling mistakes | | | 172904 [committed] Fix frv build after C99 changes | | | 172905 [committed] Fix minor testsuite problems on H8 after C99 changes | | | 172906 [committed] Fix rx build failure in libgcc | | | 172907 [committed] Fix nios2 tests | | | 172909 [committed] Fix a few arc tests | | | 172911 [committed] Fix comp-goto-1.c on 16 bit targets | | | 172912 [committed] Fix pr65369.c | | | 172913 [committed] Fix build of libgcc on ports using FDPIC | | | 172914 [committed] Fix gnu23-builtins-no-dfp | | | 172926 lra: Updates of biggest mode for hard regs [PR112278] | | | 172944 c++/modules: Prevent treating suppressed debug info as extern template [PR112820] | | | 172970 testsuite: Fix up gcc.target/aarch64/pr112406.c for modern C [PR112406] | | | 172971 testsuite: Fix up gcc.target/s390/pr96127.c test for modern C [PR96127] | | | 173020 [Committed] RISC-V: Robostify the W43, W86, W87 constraint enabled attribute | | | 173027 Workaround array_slice constructor portability issues (with older g++). | | | 173049 [2/7] RISC-V: Add intrinsic functions for crypto vector Zvbc extension | | | 173050 [3/7] RISC-V: Add intrinsic functions for crypto vector Zvkg extension | | | 173051 [4/7] RISC-V: Add intrinsic functions for crypto vector Zvkned extension | | | 173053 [5/7] RISC-V: Add intrinsic functions for crypto vector Zvknh[ab] extension | | | 173052 [6/7] RISC-V: Add intrinsic functions for crypto vector Zvksed extension. | | | 173054 [7/7] RISC-V: Add intrinsic functions for crypto vector Zvksh extension | | | 173067 RISC-V: Fix overlap group incorrect overlap on v0 | | | 173068 Don't vectorize when vector stmts are only vec_contruct and stores | | | 173074 [committed] RISC-V: Refine riscv_subset_list::parse [NFC] | | | 173075 [committed] RISC-V: Refactor riscv_implied_info_t to make it able to handle conditional implication [NFC] | | | 173076 [committed] RISC-V: Add sifive-x280 to -mcpu | | | 173078 [v2] RISC-V: Update crypto vector ISA info with latest spec | | | 173080 Support udot_prodv*qi with emulation sdot_prodv*hi | | | 173090 i386: Fix up signbit2 expander [PR112816] | | | 173091 extend.texi: Mark builtin arguments with @var{...} | | | 173093 i386: Fix rtl checking ICE in ix86_elim_entry_set_got [PR112837] | | | 173096 RISC-V: Check if zcd conflicts with zcmt and zcmp | | | 173123 [v1] RISC-V: Add test case for bug PR112813 | | | 173140 RISC-V: Remove earlyclobber from widen reduction | | | 173150 [1/2,RFC] middle-end/112830 - memcpy expansion drops address-spaces | | | 173153 [2/2] middle-end/112830 - avoid gimplifying non-default addr-space assign to memcpy | | | 173180 range: Workaround different type precision issue between _Float128 and long double [PR112788] | | | 173183 [v2] RISC-V: Document optimization parameter riscv-strcmp-inline-limit | | | 173189 tree-optimization/PR112774 - SCEV: extend the chrec tree with a nonwrapping flag | | | 173195 RISC-V: Support highest-number regno overlap for widen ternary vx instructions | | | 173200 s390: Fix expansion of vec_step | | | 173209 libiberty: Fix pex_unix_wait return type | | | 173216 gm2: Fix mc/mc.flex compilation on Solaris | | | 173217 ada: Fix Ada bootstrap on Solaris | | | 173218 libssp: Fix gets-chk.c compilation on Solaris | | | 173221 expmed: Perform mask extraction via QImode [PR112773]. | | | 173235 tree-optimization/112827 - corrupt SCEV cache during SCCP | | | 173257 [v1] LoongArch: Modify the check type of the vector builtin function. | | | 173271 c/86869 - preserve address-space info when building qualified ARRAY_TYPE | | | 173302 RISC-V: Fix two testscases related to -std changes. | | | 173303 Restore build with GCC 4.8 to GCC 5 (was Re: [PATCH] Workaround array_slice constructor portability issues (with older g++).) | | | 173320 c/89270 - honor registered_builtin_types in type_for_size | | | 173330 tree-optimization/112818 - re-instantiate vector type size check for bswap | | | 173337 [V2] RISC-V: Support highest-number regno overlap for widen ternary | | | 173344 [Committed,V2] RISC-V: Fix overlap group incorrect overlap on v0 | | | 173402 middle-end/112785 - guard against last_clique overflow | | | 173486 libstdc++: Add test for LWG Issue 3897 | | | 173464 [committed] Fix HImode load mnemonic on microblaze port | | | 173490 [v4] aarch64: New RTL optimization pass avoid-store-forwarding. | | | 173565 [v7] c++: implement P2564, consteval needs to propagate up [PR107687] | | | 173604 [pushed] c++: fix constexpr noreturn diagnostic | | | 173605 btf: avoid wrong DATASEC entries for extern vars [PR112849] | | | 173626 [v8] c++: implement P2564, consteval needs to propagate up [PR107687] | | | 173627 [RFC,1/1] nix: add a simple flake nix shell | | | 173688 [01/17,APX,NDD] Support Intel APX NDD for legacy add insn | | | 173685 [02/17,APX,NDD] Restrict TImode register usage when NDD enabled | | | 173681 [03/17,APX,NDD] Support APX NDD for optimization patterns of add | | | 173677 [04/17,APX,NDD] Disable seg_prefixed memory usage for NDD add | | | 173690 [05/17,APX,NDD] Support APX NDD for adc insns | | | 173679 [06/17,APX,NDD] Support APX NDD for sub insns | | | 173682 [08/17,APX,NDD] Support APX NDD for neg insn | | | 173686 [09/17,APX,NDD] Support APX NDD for not insn | | | 173689 [10/17,APX,NDD] Support APX NDD for and insn | | | 173687 [11/17,APX,NDD] Support APX NDD for or/xor insn | | | 173695 [12/17,APX,NDD] Support APX NDD for left shift insns | | | 173706 [13/17,APX,NDD] Support APX NDD for right shift insns | | | 173694 [14/17,APX,NDD] Support APX NDD for rotate insns | | | 173703 [15/17,APX,NDD] Support APX NDD for shld/shrd insns | | | 173680 [16/17,APX,NDD] Support APX NDD for cmove insns | | | 173691 [17/17,APX,NDD] Support TImode shift for NDD | | | 173676 [v2,1/2] LoongArch: Switch loongarch-def from C to C++ to make it possible. | | | 173678 [v2,2/2] LoongArch: Remove the definition of ISA_BASE_LA64V110 from the code. | | | 173712 RISC-V: Add blocker for gather/scatter auto-vectorization | | | 173740 [v2] LoongArch: Add asm modifiers to the LSX and LASX directives in the doc. | | | 173742 c++: Further #pragma GCC unroll C++ fix [PR112795] | | | 173748 i386: Improve code generation for vector __builtin_signbit (x.x[i]) ? -1 : 0 [PR112816] | | | 173751 [v2,1/5] LoongArch: Add support for LoongArch V1.1 approximate instructions. | | | 173750 [v2,2/5] LoongArch: Use standard pattern name for xvfrsqrt/vfrsqrt instructions. | | | 173752 [v2,3/5] LoongArch: Redefine pattern for xvfrecip/vfrecip instructions. | | | 173753 [v2,4/5] LoongArch: New options -mrecip and -mrecip= with ffast-math. | | | 173754 [v2,5/5] LoongArch: Vectorized loop unrolling is disable for divf/sqrtf/rsqrtf when -mrecip is enabled. | | | 173749 [v4] RISC-V: Implement TLS Descriptors. | | | 173756 lower-bitint: Make temporarily wrong IL less wrong [PR112843] | | | 173758 tree-optimization/112827 - more SCEV cprop fixes | | | 173757 i386: Fix -fcf-protection -Os ICE due to movabsq peephole2 [PR112845] | | | 173767 c++: Implement C++ DR 2262 - Attributes for asm-definition [PR110734] | | | 173775 c++: Fix parsing [[]][[]]; | | | 173779 lower-bitint, v2: Make temporarily wrong IL less wrong [PR112843] | | | 173788 [1/5,V3,ifcvt] optimize x=c ? (y op z) : y by RISC-V Zicond like insns | | | 173789 [3/5,ifcvt] optimize x=c ? (y AND z) : y by RISC-V Zicond like insns | | | 173790 [4/5,ifcvt] optimize x=c ? (y op const_int) : y by RISC-V Zicond like insns | | | 173791 [5/5,ifcvt] optimize extension for x=c ? (y op z) : y by RISC-V Zicond like insns | | | 173792 RISC-V: FAIL:g++.dg/torture/vshuf-v[2|4]di.C -Os (execution test) on RV32 | | | 173797 tree-optimization/112843 - update_stmt doing wrong things | | | 173805 [v2] RISC-V: FAIL:g++.dg/torture/vshuf-v[2|4]di.C -Os (execution test) on RV32 | | | 173831 [pushed] Allow prologues and epilogues to be inserted later | | | 173832 [v2] c: Turn -Wimplicit-function-declaration into a permerror: Fix 'gcc.dg/gnu23-builtins-no-dfp-1.c' (was: [committed] Fix gnu23-builtins-no-dfp) | | | 173841 Modula-2: Support '-isysroot [...]' | | | 173842 Add a target hook for sibcall epilogues | | | 173851 Add a new target hook: TARGET_START_CALL_ARGS | | | 173862 [pushed] Allow targets to add USEs to asms | | | 173894 [pushed,v2,01/25] aarch64: Generalise require_immediate_lane_index | | | 173896 [pushed,v2,02/25] aarch64: Use SVE's RDVL instruction | | | 173895 [pushed,v2,03/25] aarch64: Make AARCH64_FL_SVE requirements explicit | | | 173897 [pushed,v2,04/25] aarch64: Add group suffixes to SVE intrinsics | | | 173903 [pushed,v2,06/25] aarch64: Generalise some SVE ACLE error messages | | | 173902 [pushed,v2,07/25] aarch64: Replace vague "previous arguments" message | | | 173899 [pushed,v2,09/25] aarch64: Tweak error message for (tuple, vector) pairs | | | 173900 [pushed,v2,10/25] aarch64: Add tuple forms of svreinterpret | | | 173904 [pushed,v2,11/25] aarch64: Add arm_streaming(_compatible) attributes | | | 173907 [pushed,v2,13/25] aarch64: Distinguish streaming-compatible AdvSIMD insns | | | 173912 [pushed,v2,14/25] aarch64: Mark relevant SVE instructions as non-streaming | | | 173908 [pushed,v2,15/25] aarch64: Switch PSTATE.SM around calls | | | 173910 [pushed,v2,16/25] aarch64: Add support for SME ZA attributes | | | 173905 [pushed,v2,17/25] aarch64: Add a register class for w12-w15 | | | 173906 [pushed,v2,18/25] aarch64: Add a VNx1TI mode | | | 173911 [pushed,v2,19/25] aarch64: Generalise unspec_based_function_base | | | 173915 [pushed,v2,20/25] aarch64: Generalise _m rules for SVE intrinsics | | | 173917 [pushed,v2,21/25] aarch64: Add support for | | | 173901 [pushed,v2,22/25] aarch64: Add support for __arm_locally_streaming | | | 173913 [pushed,v2,23/25] aarch64: Handle PSTATE.SM across abnormal edges | | | 173914 [pushed,v2,24/25] aarch64: Enforce inlining restrictions for SME | | | 173916 [pushed,v2,25/25] aarch64: Update sibcall handling for SME | | | 173918 [pushed,v2,1/5] aarch64: Add +sme2 | | | 173920 [pushed,v2,2/5] aarch64: Add svcount_t | | | 173919 [pushed,v2,3/5] aarch64: Add svboolx2_t | | | 173921 [pushed,v2,4/5] aarch64: Add ZT0 | | | 173922 libgfortran: Fix -Wincompatible-pointer-types errors | | | 173960 [v2,06/11] aarch64: Fix up aarch64_print_operand xzr/wzr case | | | 173964 [v2,09/11] aarch64: Rewrite non-writeback ldp/stp patterns | | | 173963 driver: Fix bootstrap with --enable-default-pie | | | 173980 [v2,08/11] aarch64: Generalize writeback ldp/stp patterns | | | 174017 [1/2] RISC-V: Add C intrinsics of Scalar Crypto Extension | | | 174018 [2/2] RISC-V: Add C intrinsics of Bitmanip Extension | | | 174042 RISC-V: Block VLSmodes according to TARGET_MAX_LMUL and BITS_PER_RISCV_VECTOR | | | 174047 tree-optimization/112856 - fix LC SSA after loop header copying | | | 174048 middle-end/112830 - avoid gimplifying non-default addr-space assign to memcpy | | | 174057 ipa/92606 - IPA ICF merging variables in different address-space | | | 174058 sanitizer/111736 - skip ASAN for globals in alternate address-space | | | 174059 [ARC] Add *extvsi_n_0 define_insn_and_split for PR 110717. | | | 174063 middle-end/112860 - -fgimple can skip ISEL | | | 174065 [v5] aarch64: New RTL optimization pass avoid-store-forwarding. | | | 174073 [v3] aarch64: Implement the ACLE instruction/data prefetch functions. | | | 174075 RISC-V: Add vec_init expander for masks [PR112854]. | | | 174077 RISC-V: xtheadfmemidx: Disable if xtheadmemidx is not available | | | 174078 RISC-V: xtheadmemidx: Document inline asm issue with memory constraint | | | 174106 c++, v2: Further #pragma GCC unroll C++ fix [PR112795] | | | 174112 remove qmtest-related Makefile targets | | | 174151 [committed] libstdc++: Disable std::formatter::set_debug_format [PR112832] | | | 174138 c++, v2: Fix parsing [[]][[]]; | | | 174147 tsystem.h: Declare calloc/realloc #ifdef inhibit_libc | | | 174169 build: unbreak bootstrap on uclinux targets [PR112762] | | | 174175 aarch64: Add missing driver-aarch64 dependencies | | | 174176 aarch64 testsuite: Check entire .arch string | | | 174178 aarch64: Fix +nocrypto handling | | | 174180 aarch64: Fix +nopredres, +nols64 and +nomops | | | 174184 [v7] Add condition coverage (MC/DC) | | | 174188 c++: fix ICE with sizeof in a template [PR112869] | | | 174208 [[PATCH,GCC13] 1/2] bfd: linker: merge .sframe sections | | | 174209 [[PATCH,GCC13] 2/2] toplevel: Makefile.def: add install-strip dependency on libsframe | | | 174217 libiberty: Fix build with GCC < 7 | | | 174220 lower-bitint: Fix arithmetics followed by extension by many bits [PR112809] | | | 174222 i386: Move vzeroupper pass from after reload pass to after postreload_cse [PR112760] | | | 174238 [committed] libstdc++: Redefine __glibcxx_assert to work in C++23 constexpr | | | 174243 RISC-V: Remove xfail from ssa-fre-3.c testcase | | | 174270 c-family: Fix ICE with large column number after restoring a PCH [PR105608] | | | 174273 [v8] Introduce attribute sym_alias | | | 174289 [RFA,(libstdc++)] c++: partial ordering of object parameter [PR53499] | | | 174275 testsuite: Adjust for the new permerror -Wincompatible-pointer-types | | | 174276 [1/4] RISC-V: Add crypto vector implied ISA info. | | | 174277 [2/4] RISC-V: Add crypto vector builtin function. | | | 174278 [3/4] RISC-V: Add crypto vector machine descriptions | | | 174279 [4/4] RISC-V: Add crypto vector api-testing cases. | | | 174290 middle-end: correct loop bounds for early breaks and peeled vector loops | | | 174291 middle-end: Fix peeled vect loop IV values. | | | 174293 RISC-V: Remove useless modes | | | 174295 [V3,1/3] rs6000: update num_insns_constant for 2 insns | | | 174296 [V3,2/3] Using pli for constant splitting | | | 174297 [V3,3/3] split complicate constant to memory | | | 174332 [v2] LoongArch: Fix eh_return epilogue for normal returns | | | 174335 [v3,1/5] LoongArch: Add support for LoongArch V1.1 approximate instructions. | | | 174338 [v3,2/5] LoongArch: Use standard pattern name for xvfrsqrt/vfrsqrt instructions. | | | 174336 [v3,3/5] LoongArch: Redefine pattern for xvfrecip/vfrecip instructions. | | | 174339 [v3,4/5] LoongArch: New options -mrecip and -mrecip= with ffast-math. | | | 174337 [v3,5/5] LoongArch: Vectorized loop unrolling is disable for divf/sqrtf/rsqrtf when -mrecip is enabled. | | | 174383 [01/16,APX,NDD] Support Intel APX NDD for legacy add insn | | | 174396 [02/16,APX,NDD] Support APX NDD for optimization patterns of add | | | 174385 [03/16,APX,NDD] Disable seg_prefixed memory usage for NDD add | | | 174390 [04/16,APX,NDD] Support APX NDD for adc insns | | | 174399 [05/16,APX,NDD] Support APX NDD for sub insns | | | 174391 [06/16,APX,NDD] Support APX NDD for sbb insn | | | 174393 [07/16,APX,NDD] Support APX NDD for neg insn | | | 174382 [08/16,APX,NDD] Support APX NDD for not insn | | | 174392 [09/16,APX,NDD] Support APX NDD for and insn | | | 174389 [10/16,APX,NDD] Support APX NDD for or/xor insn | | | 174397 [11/16,APX,NDD] Support APX NDD for left shift insns | | | 174398 [12/16,APX,NDD] Support APX NDD for right shift insns | | | 174401 [13/16,APX,NDD] Support APX NDD for rotate insns | | | 174395 [14/16,APX,NDD] Support APX NDD for shld/shrd insns | | | 174394 [15/16,APX,NDD] Support APX NDD for cmove insns | | | 174400 [16/16,APX,NDD] Support TImode shift for NDD | | | 174406 [patch-1v2,rs6000] enable fctiw on old archs [PR112707] | | | 174407 [patch-2v2,rs6000] guard fctid on PPC64 and powerpc 476 [PR112707] | | | 174440 treat argp-based mem as frame related in dse | | | 174441 libgcc: Avoid -Wbuiltin-declaration-mismatch warnings in emutls.c | | | 174562 [1/5] aarch64: Add cpu feature detection to libgcc | | | 174563 [v3,2/5] c-family: Simplify attribute exclusion handling | | | 174564 [v3,3/5] ada: Improve attribute exclusion handling | | | 174565 [v3,5/5] aarch64: Add function multiversioning support | | | 174570 RISC-V: Fix VSETVL PASS bug | | | 174577 [v6] aarch64: New RTL optimization pass avoid-store-forwarding. | | | 174593 c++: Don't diagnose ignoring of attributes if all ignored attributes are attribute_ignored_p | | | 174666 libstdc++: Make __gnu_debug::vector usable in constant expressions [PR109536] | | | 174601 [Committed,V2] RISC-V: Fix VSETVL PASS bug | | | 174602 libstdc++: Fix testsuite with -Wformat | | | 174644 [committed] Fix c-c++-common/fhardened-[12].c test fails on hppa | | | 174646 c++: Handle '#pragma GCC target optimize' early [PR48026] | | | 174667 {Patch, fortran] PR112834 - Class array function selector causes chain of syntax and other spurious errors | | | 174673 libiberty/buildargv: POSIX behaviour for backslash handling | | | 174677 [committed,v4,1/3] libgomp, nvptx: low-latency memory allocator | | | 174675 [committed,v4,2/3] openmp, nvptx: low-lat memory access traits | | | 174676 [committed,v4,3/3] amdgcn, libgomp: low-latency allocator | | | 174683 [pushed] diagnostics: use const and references for diagnostic_info | | | 174687 [pushed] v2: diagnostics: prettify JSON output formats | | | 174707 veclower: improve selection of vector mode when lowering [PR 112787] | | | 174742 Fortran: function returning contiguous class array [PR105543] | | | 174749 htdocs: correct spelling and use https in examples | | | 174750 [Committed] RISC-V: Fix PR112888 ICE | | | 174780 aarch64: add -fno-stack-protector to tests | | | 174815 [pushed] analyzer: fix taint false positives with UNKNOWN [PR112850] | | | 174872 [v3] LoongArch: Fix eh_return epilogue for normal returns | | | 174877 [1/4,v2] RISC-V:Add crypto vector implied ISA info. | | | 174879 [2/4,v2] RISC-V: Add crypto vector builtin function. | | | 174880 [3/4,v2] RISC-V: Add crypto machine descriptions | | | 174881 [4/4,v2] RISC-V: Add crypto vector api-testing cases. | | | 174895 strub: enable conditional support | | | 174924 [v26,01/23] c++: Sort built-in traits alphabetically | | | 174925 [v26,02/23] c-family, c++: Look up built-in traits via identifier node | | | 174926 [v26,03/23] c++: Accept the use of built-in trait identifiers | | | 174927 [v26,04/23] c++: Implement __is_array built-in trait | | | 174928 [v26,05/23] libstdc++: Optimize std::is_array compilation performance | | | 174929 [v26,06/23] c++: Implement __is_bounded_array built-in trait | | | 174930 [v26,07/23] libstdc++: Optimize std::is_bounded_array compilation performance | | | 174931 [v26,08/23] c++: Implement __is_scoped_enum built-in trait | | | 174932 [v26,09/23] libstdc++: Optimize std::is_scoped_enum compilation performance | | | 174933 [v26,10/23] c++: Implement __is_member_pointer built-in trait | | | 174934 [v26,11/23] libstdc++: Optimize std::is_member_pointer compilation performance | | | 174935 [v26,12/23] c++: Implement __is_member_function_pointer built-in trait | | | 174936 [v26,13/23] libstdc++: Optimize std::is_member_function_pointer compilation performance | | | 174937 [v26,14/23] c++: Implement __is_member_object_pointer built-in trait | | | 174938 [v26,15/23] libstdc++: Optimize std::is_member_object_pointer compilation performance | | | 174939 [v26,16/23] c++: Implement __is_reference built-in trait | | | 174940 [v26,17/23] libstdc++: Optimize std::is_reference compilation performance | | | 174941 [v26,18/23] c++: Implement __is_function built-in trait | | | 174943 [v26,19/23] libstdc++: Optimize std::is_function compilation performance | | | 174942 [v26,20/23] c++: Implement __is_object built-in trait | | | 174945 [v26,21/23] libstdc++: Optimize std::is_object compilation performance | | | 174944 [v26,22/23] c++: Implement __remove_pointer built-in trait | | | 174946 [v26,23/23] libstdc++: Optimize std::remove_pointer compilation performance | | | 174981 tree-ssa-dce: Fix up maybe_optimize_arith_overflow for BITINT_TYPE [PR112880] | | | 174982 expr: Handle BITINT_TYPE in count_type_elements [PR112881] | | | 174983 c-family: Fix up -fno-debug-cpp [PR111965] | | | 175017 Add IntegerRange for -param=min-nondebug-insn-uid= and fix vector growing in LRA and vec [PR112411] | | | 175021 v2: Add IntegerRange for -param=min-nondebug-insn-uid= and fix vector growing in LRA and vec [PR112411] | | | 175023 [committed] testsuite: Add testcase for already fixed PR [PR111068] | | | 175061 c++: Unshare folded SAVE_EXPR arguments during cp_fold [PR112727] | | | 175071 RISC-V: Support interleave vector with different step sequence for VLA SLP | | | 175072 [V2,1/2] RISC-V: Add C intrinsics of Scalar Crypto Extension | | | 175073 [V2,2/2] RISC-V: Add C intrinsics of Bitmanip Extension | | | 175074 RISC-V: Support interleave vector with different step sequence for VLA SLP | | | 175100 [1/2] Implement ASM_DECLARE_FUNCTION_NAME using ASM_OUTPUT_FUNCTION_LABEL | | | 175101 [2/2] asan: Align .LASANPC on function boundary | | | 175102 RISC-V: Fix AVL propagation ICE for vleff/vlsegff | | | 175103 RISC-V: Add avail interface into function_group_info | | | 175112 LoongArch: Allow -mcmodel=extreme and model attribute with -mexplicit-relocs=auto | | | 175187 [v3,08/11] aarch64: Generalize writeback ldp/stp patterns | | | 175188 [v3,09/11] aarch64: Rewrite non-writeback ldp/stp patterns | | | 175189 [v3,10/11] aarch64: Add new load/store pair fusion pass | | | 175205 [v2,1/3,GCC] arm: vld1q_types_x2 ACLE intrinsics | | | 175204 [v2,2/3,GCC] arm: vld1q_types_x3 ACLE intrinsics | | | 175203 [v2,3/3,GCC] arm: vld1q_types_x4 ACLE intrinsics | | | 175209 [v2,1/3,GCC] arm: vst1_types_x2 ACLE intrinsics | | | 175208 [v2,2/3,GCC] arm: vst1_types_x3 ACLE intrinsics | | | 175210 [v2,3/3,GCC] arm: vst1_types_x4 ACLE intrinsics | | | 175213 [v2,1/3,GCC] arm: vst1q_types_x2 ACLE intrinsics | | | 175211 [v2,2/3,GCC] arm: vst1q_types_x3 ACLE intrinsics | | | 175212 [v2,3/3,GCC] arm: vst1q_types_x4 ACLE intrinsics | | | 175216 [v2,1/3,GCC] arm: vld1_types_x2 ACLE intrinsics | | | 175215 [v2,2/3,GCC] arm: vld1_types_x3 ACLE intrinsics | | | 175214 [v2,3/3,GCC] arm: vld1_types_x4 ACLE intrinsics | | | 175256 [V3,1/4] OpenMP: Introduce accessor macros and constructors for context selectors. | | | 175249 [V3,2/4] OpenMP: Unify representation of name-list properties. | | | 175264 [V3,3/4] OpenMP: Use enumerators for names of trait-sets and traits | | | 175257 [V3,4/4] OpenMP: Permit additional selector properties | | | 175276 testsuite: add missing dg-require ifunc in pr105554.c | | | 175278 testsuite: require avx_runtime for vect-simd-clone-17f | | | 175288 [2/4] libgcc: aarch64: Configure check for __getauxval | | | 175289 [3/4] libgcc: aarch64: Add SME runtime support | | | 175291 [4/4] libgcc: aarch64: Add SME unwinder support | | | 175313 | | | 175363 [pushed,v2] aarch64: Add an early RA for strided registers | | | 175367 RISC-V: XFAIL scan dump fails for autovec PR111311 | | | 175450 [committed] libstdc++: Fix recent changes to __glibcxx_assert [PR112882] | | | 175464 [committed] libstdc++: Use instead of in | | | 175455 [committed] libstdc++: Fix misleading typedef name in | | | 175451 [Committed,V2] RISC-V: Support interleave vector with different step sequence | | | 175457 libgccjit: Fix get_size of size_t | | | 175467 libgccjit: Make new_array_type take unsigned long | | | 175465 libgccjit: Make is_int return false on vector types | | | 175466 libgccjit: Add type checks in gcc_jit_block_add_assignment_op | | | 175528 Don't assume it's AVX_U128_CLEAN after call_insn whose abi.mode_clobber(V4DImode) deosn't contains all SSE_REGS. | | | 175533 [v2] RISC-V: Add avail interface into function_group_info | | | 175611 [Committed] RISC-V: Remove redundant check of better_main_loop_than_p in COST model | | | 175635 [gcc-wwwdocs] gcc-13/14: Mention recent update for x86_64 backend | | | 175642 [ICE] Support vpcmov for V4HF/V4BF/V2HF/V2BF under TARGET_XOP. | | | 175661 vr-values: Avoid ICEs on large _BitInt cast to floating point [PR112901] | | | 175671 lower-bitint: Avoid merging non-mergeable stmt with cast and mergeable stmt [PR112902] | | | 175673 [v1] RISC-V: Fix ICE for incorrect mode attr in V_F2DI_CONVERT_BRIDGE | | | 175675 Shrink out-of-SSA dump | | | 175714 [v4] LoongArch: Fix eh_return epilogue for normal returns | | | 175716 [v5] LoongArch: Fix eh_return epilogue for normal returns. | | | 175722 [v3,1/2] libruntime: Add fiber context switch code for LoongArch. | | | 175723 [v3,2/2] libphobos: Update build scripts for LoongArch64. | | | 175789 Fortran: allow NULL() for POINTER, OPTIONAL, CONTIGUOUS dummy [PR111503] | | | 175756 tree-optimization/112909 - uninit diagnostic with abnormal copy | | | 175776 [v2] libgcc: aarch64: Add SME runtime support | | | 175801 [committed] libgcc: Fix config.in | | | 175814 [1/1] object lifetime instrumentation for Valgrind [PR66487] | | | 175820 OpenMP: Handle same-directive mapped vars with pointer predefined firstprivate [PR110639] | | | 175873 [v3] A new copy propagation and PHI elimination pass | | | 175933 [C] Fix regression causing ICE for structs with VLAs [PR 112488] | | | 175982 c++, v2: Don't diagnose ignoring of attributes if all ignored attributes are attribute_ignored_p | | | 176005 [pushed] c++: Add fixed test [PR88848] | | | 176030 [pushed,PR112875,LRA] : Fix an assert in lra elimination code | | | 176031 [pushed] analyzer: fix ICE on infoleak with poisoned size | | | 176033 [pushed] analyzer: avoid taint for (TAINTED % NON_TAINTED) | | | 176043 [v2] c++: fix ICE with sizeof in a template [PR112869] | | | 176078 [V2] RISC-V: XFAIL scan dump fails for autovec PR111311 | | | 176088 [gcc-wwwdocs,COMMITTED] Disallow /cgit for web robots | | | 176110 strub: add note on attribute access | | | 176111 -finline-stringops: avoid too-wide smallest_int_mode_for_size [PR112784] | | | 176112 -finline-stringops: don't assume ptr_mode ptr in memset [PR112804] | | | 176113 -finline-stringops: check base blksize for memset [PR112778] | | | 176114 multiflags: fix doc warning | | | 176117 RISC-V: Support highest overlap for wv instructions | | | 176132 [v2] -finline-stringops: check base blksize for memset [PR112778] | | | 176148 [Committed] RISC-V: Fix VLS mode movmiaslign bug | | | 176151 phiopt: Fix ICE with large --param l1-cache-line-size= [PR112887] | | | 176178 RISC-V: Recognize stepped series in expand_vec_perm_const. | | | 176191 [committed] libstdc++: Fix resolution of LWG 4016 for std::ranges::to [PR112876] | | | 176193 [committed] libstdc++: Fix value of __cpp_lib_format macro [PR111826] | | | 176189 [committed] testsuite: Add testcase for already fixed PR [PR112924] | | | 176192 [v7] libgfortran: Replace mutex with rwlock | | | 176196 LoongArch: Fix warnings building libgcc | | | 176200 [1/3] LoongArch: Include rtl.h for COSTS_N_INSNS instead of hard coding our own | | | 176199 [2/3] LoongArch: Fix instruction costs [PR112936] | | | 176201 [3/3] LoongArch: Add alslsi3_extend | | | 176224 v2 [C PATCH] Fix regression causing ICE for structs with VLAs [PR 112488] | | | 176241 Add some new DW_IDX_* constants | | | 176309 aarch64: Fix wrong code for bfloat when f16 is enabled [PR 111867] | | | 176315 expr: catch more `a*bool` while expanding [PR 112935] | | | 176349 tree-cfg: Fix misleading error message in verify_gimple_assign_single | | | 176361 tree-cfg: Fix misleading error message in verify_gimple_assign_single. | | | 176368 [committed] Fix length computation for logical shifts on H8 | | | 176370 [committed] Fix length computation of single bit bitfield extraction on H8 | | | 176376 [committed] Provide patterns for signed bitfield extractions on H8 | | | 176379 [committed] Support uaddv and usubv on the H8 | | | 176394 [pushed] aarch64: Add -funwind-tables to some tests | | | 176395 [pushed] aarch64: Skip some SME register save tests on BE | | | 176396 [pushed] aarch64: XFAIL some SME tests for BE | | | 176397 [pushed] aarch64: Fix SMSTART/SMSTOP save/restore for BE | | | 176399 [1/2] analyzer: Remove check of unsigned_char in maybe_undo_optimize_bit_field_compare. | | | 176398 [PATCHv2,2/2] MATCH: (convert)(zero_one !=/== 0/1) for outer type and zero_one type are the same | | | 176417 [v3] RISC-V: Add avail interface into function_group_info | | | 176421 [rs6000] Correct definition of macro of fixed point efficient unaligned | | | 176436 [rs6000] Clean up pre-checking of expand_block_compare | | | 176447 [V4,1/3] rs6000: accurate num_insns_constant_gpr | | | 176448 [V4,2/3] Using pli for constant splitting | | | 176475 RISC-V: Remove poly selftest when --preference=fixed-vlmax | | | 176503 [v3] Simplify vector ((VCE (a cmp b ? -1 : 0)) < 0) ? c : d to just (VCE ((a cmp b) ? (VCE c) : (VCE d))). | | | 176511 [Committed] RISC-V: Fix ICE in extract_single_source | | | 176533 RTL-SSA: Fix ICE on record_use of RTL_SSA for RISC-V VSETVL PASS | | | 176534 testsuite: Disable -fstack-protector* for some strub tests | | | 176553 ipa/92606 - properly handle no_icf attribute for variables | | | 176557 [avr] PR112944: Support .rodata in RAM for AVR64* and AVR128* devices | | | 176564 [1/3] RISC-V: movmem for RISCV with V extension | | | 176565 [2/3] RISC-V: setmem for RISCV with V extension | | | 176566 [3/3] RISC-V: cmpmem for RISCV with V extension | | | 176576 [committed] d: Merge upstream dmd, druntime 2bbf64907c, phobos b64bfbf91 | | | 176586 ada: Fix Ada bootstrap on FreeBSD | | | 176613 OpenMP: Minor '!$omp allocators' cleanup - and still: Re: [patch] OpenMP/Fortran: Implement omp allocators/allocate for ptr/allocatables | | | 176634 RISC-V: Robostify shuffle index used by vrgather and fix regression | | | 176654 [COMMITTED,V2] RTL-SSA: Fix ICE on record_use of RTL_SSA for RISC-V VSETVL PASS | | | 176671 i386: Fix missed APX_NDD check for shift/rotate expanders [PR 112943] | | | 176696 wrong code on m68k with -mlong-jump-table-offsets and -malign-int (PR target/112413) | | | 176722 [v2] testsuite: adjust call to abort in excess-precision-12 | | | 176721 RISC-V: testsuite: Fix strcmp-run.c test. | | | 176728 Add myself to write after approval | | | 176741 [v4] aarch64: SVE/NEON Bridging intrinsics | | | 176742 Ping: [PATCH] Treat "p" in asms as addressing VOIDmode | | | 176743 Ping: [PATCH] Add a late-combine pass [PR106594] | | | 176809 [pushed] c++: add fixed testcase [PR63378] | | | 176810 [v3,1/6] libgomp: basic pinned memory on Linux | | | 176811 [v3,2/6] libgomp, openmp: Add ompx_pinned_mem_alloc | | | 176812 [v3,3/6] openmp: Add -foffload-memory | | | 176814 [v3,4/6] openmp: -foffload-memory=pinned | | | 176813 [v3,5/6] libgomp, nvptx: Cuda pinned memory | | | 176815 [v3,6/6] libgomp: fine-grained pinned memory allocator | | | 176856 [v2,FYI] -finline-stringops: avoid too-wide smallest_int_mode_for_size [PR112784] | | | 176892 [pushed] testsuite: update mangling | | | 176917 analyzer: fix uninitialized bitmap [PR112955] | | | 177005 multiflags: fix doc warning properly | | | 177006 [#1/2] strub: handle volatile promoted args in internal strub [PR112938] | | | 177009 [committed] MAINTAINERS: Add myself to write after approval and DCO | | | 177011 [Committed] RISC-V: Move RVV POLY VALUE estimation from riscv.cc to riscv-v.cc[NFC] | | | 177012 [committed] RISC-V: Add avail interface into function_group_info | | | 177013 [committed] MAINTAINERS: Update my email address | | | 177050 [pushed] analyzer: add more test coverage for tainted modulus | | | 177060 [#2/2] strub: drop volatile from wrapper args [PR112938] | | | 177062 contrib: add git gcc-style alias | | | 177104 Adjust vectorized cost for reduction. | | | 177106 LoongArch: Replace -mexplicit-relocs=auto simple-used address peephole2 with combine | | | 177110 [draft,v2] sched: Don't skip empty block in scheduling [PR108273] | | | 177114 tree-optimization/112939 - VN PHI visiting and -ftrivial-auto-var-init | | | 177132 [committed] libquadmath: Restore linking against -lm on most targets [PR112963] | | | 177137 aarch64/expr: Use ccmp when the outer expression is used twice [PR100942] | | | 177175 [v1] RISC-V: Disable RVV VCOMPRESS avl propagation | | | 177208 LoongArch: Define LOGICAL_OP_NON_SHORT_CIRCUIT. | | | 177215 RISC-V: Fix dynamic lmul tests depended on abi | | | 177234 tree-optimization/112736 - avoid overread with non-grouped SLP load | | | 177235 RISC-V: Refactor Dynamic LMUL codes | | | 177261 [v2] LoongArch: Define LOGICAL_OP_NON_SHORT_CIRCUIT. | | | 177275 [v8,1/2] Add condition coverage (MC/DC) | | | 177274 [v8,2/2] Add gcov MC/DC tests for GDC | | | 177288 [v2] RISC-V: Supports RISC-V Profiles in '-march' option. | | | 177289 [committed] testsuite: Fix up test directive syntax errors | +------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ + git config pull.rebase false + git fetch origin master From github.com:plctlab/patchwork-gcc * branch master -> FETCH_HEAD + git checkout master Switched to a new branch 'master' branch 'master' set up to track 'origin/master'. + git pull origin master From github.com:plctlab/patchwork-gcc * branch master -> FETCH_HEAD Already up to date. + git fetch origin upstream-master From github.com:plctlab/patchwork-gcc * branch upstream-master -> FETCH_HEAD + git checkout upstream-master Switched to a new branch 'upstream-master' branch 'upstream-master' set up to track 'origin/upstream-master'. + git remote add upstream https://github.com/gcc-mirror/gcc.git + git pull upstream master From https://github.com/gcc-mirror/gcc * branch master -> FETCH_HEAD * [new branch] master -> upstream/master fatal: refusing to merge unrelated histories + git push -u origin upstream-master Everything up-to-date branch 'upstream-master' set up to track 'origin/upstream-master'. + git checkout master Switched to branch 'master' Your branch is up to date with 'origin/master'. + git merge upstream-master fatal: refusing to merge unrelated histories + git push -u origin master Everything up-to-date branch 'master' set up to track 'origin/master'. + branchname=series73085-patch177289 ++ grep 'series73085-patch177289$' ++ git branch -a + checkbranch= + checkbranchresult=null + '[' null = series73085-patch177289 ']' + git checkout -b series73085-patch177289 Switched to a new branch 'series73085-patch177289' ++ curl https://patchwork.plctlab.org/api/1.2/series/73085/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 1329 100 1329 0 0 51115 0 --:--:-- --:--:-- --:--:-- 51115 + series_response='{"id":73085,"url":"https://patchwork.plctlab.org/api/1.2/series/73085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/list/?series=73085","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"[committed] testsuite: Fix up test directive syntax errors","date":"2023-12-12T12:09:22","submitter":{"id":40,"url":"https://patchwork.plctlab.org/api/1.2/people/40/","name":"Jakub Jelinek","email":"jakub@redhat.com"},"version":1,"total":1,"received_total":1,"received_all":true,"mbox":"https://patchwork.plctlab.org/series/73085/mbox/","cover_letter":null,"patches":[{"id":177289,"url":"https://patchwork.plctlab.org/api/1.2/patches/177289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-12T12:09:22","name":"[committed] testsuite: Fix up test directive syntax errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/"}]}' ++ echo '{"id":73085,"url":"https://patchwork.plctlab.org/api/1.2/series/73085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/list/?series=73085","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"[committed] testsuite: Fix up test directive syntax errors","date":"2023-12-12T12:09:22","submitter":{"id":40,"url":"https://patchwork.plctlab.org/api/1.2/people/40/","name":"Jakub Jelinek","email":"jakub@redhat.com"},"version":1,"total":1,"received_total":1,"received_all":true,"mbox":"https://patchwork.plctlab.org/series/73085/mbox/","cover_letter":null,"patches":[{"id":177289,"url":"https://patchwork.plctlab.org/api/1.2/patches/177289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/","msgid":"","list_archive_url":null,"date":"2023-12-12T12:09:22","name":"[committed] testsuite: Fix up test directive syntax errors","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/"}]}' ++ jq '.patches[] | (.id|tostring) + "," + .mbox' + patchid_patchurl='"177289,https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/"' + echo '"177289,https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/"' + IFS=, + read -r series_patch_id series_patch_url ++ echo '"177289' ++ sed 's/"//g' + series_patch_id=177289 ++ echo 'https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/"' ++ sed 's/"//g' + series_patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/ ++ git rev-parse HEAD + commitid_before=c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a + eval '+++ declare -p bout bret declare -- bout="Applying: testsuite: Fix up test directive syntax errors error: sha1 information is lacking or useless (testsuite/gcc.dg/gomp/pr87887-1.c). error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 testsuite: Fix up test directive syntax errors When you have resolved this problem, run \"git am --continue\". If you prefer to skip this patch, run \"git am --skip\" instead. To restore the original branch and stop patching, run \"git am --abort\"." declare -- bret="128" ++ berr='\''++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 12910 100 12910 0 0 450k 0 --:--:-- --:--:-- --:--:-- 450k +++ bout='\''\'\'''\''Applying: testsuite: Fix up test directive syntax errors error: sha1 information is lacking or useless (testsuite/gcc.dg/gomp/pr87887-1.c). error: could not build fake ancestor hint: Use '\''\'\'''\''\'\''\'\'''\'''\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\''\'\''\'\'''\'''\''\'\'''\'' to see the failed patch Patch failed at 0001 testsuite: Fix up test directive syntax errors When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\''\'\'''\'' +++ bret=128'\'' ++ declare -p berr declare -- berr="++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 12910 100 12910 0 0 450k 0 --:--:-- --:--:-- --:--:-- 450k +++ bout='\''Applying: testsuite: Fix up test directive syntax errors error: sha1 information is lacking or useless (testsuite/gcc.dg/gomp/pr87887-1.c). error: could not build fake ancestor hint: Use '\''\\'\'''\''git am --show-current-patch=diff'\''\\'\'''\'' to see the failed patch Patch failed at 0001 testsuite: Fix up test directive syntax errors When you have resolved this problem, run \"git am --continue\". If you prefer to skip this patch, run \"git am --skip\" instead. To restore the original branch and stop patching, run \"git am --abort\".'\'' +++ bret=128"' ++ +++ declare -p bout bret /tmp/jenkins5082826580881258364.sh: line 129: +++: command not found ++ declare -- 'bout=Applying: testsuite: Fix up test directive syntax errors error: sha1 information is lacking or useless (testsuite/gcc.dg/gomp/pr87887-1.c). error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 testsuite: Fix up test directive syntax errors When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' ++ declare -- bret=128 ++ ++ 'berr=++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 12910 100 12910 0 0 450k 0 --:--:-- --:--:-- --:--:-- 450k +++ bout='\''Applying: testsuite: Fix up test directive syntax errors error: sha1 information is lacking or useless (testsuite/gcc.dg/gomp/pr87887-1.c). error: could not build fake ancestor hint: Use '\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\'' to see the failed patch Patch failed at 0001 testsuite: Fix up test directive syntax errors When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\'' +++ bret=128' /tmp/jenkins5082826580881258364.sh: line 154: ++: command not found ++ ++ declare -p berr /tmp/jenkins5082826580881258364.sh: line 155: ++: command not found ++ declare -- 'berr=++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 12910 100 12910 0 0 450k 0 --:--:-- --:--:-- --:--:-- 450k +++ bout='\''Applying: testsuite: Fix up test directive syntax errors error: sha1 information is lacking or useless (testsuite/gcc.dg/gomp/pr87887-1.c). error: could not build fake ancestor hint: Use '\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\'' to see the failed patch Patch failed at 0001 testsuite: Fix up test directive syntax errors When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\'' +++ bret=128' ++ git rev-parse HEAD + commitid_after=c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a + '[' 128 = 0 ']' + [[ ++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 12910 100 12910 0 0 450k 0 --:--:-- --:--:-- --:--:-- 450k +++ bout='Applying: testsuite: Fix up test directive syntax errors error: sha1 information is lacking or useless (testsuite/gcc.dg/gomp/pr87887-1.c). error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 testsuite: Fix up test directive syntax errors When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' +++ bret=128 =~ sha1 information is lacking or useless ]] + submit_check warning Unresolved https://patchwork.plctlab.org/jenkins/job/gcc-patch/14892/consoleText 'Git am fail log' + check_state=warning + patch_state=Unresolved + repo_url=https://patchwork.plctlab.org/jenkins/job/gcc-patch/14892/consoleText + DESCRIPTION='Git am fail log' + curl -X POST -H 'Authorization: Token [*******]' -F state=warning -F target_url=https://patchwork.plctlab.org/jenkins/job/gcc-patch/14892/consoleText -F context=gcc-patch-check -F 'description=Git am fail log' https://patchwork.plctlab.org/api/patches/177289/checks/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 970 100 429 100 541 11289 14236 --:--:-- --:--:-- --:--:-- 25526 {"id":17200,"url":"https://patchwork.plctlab.org/api/patches/177289/checks/17200/","user":{"id":1,"url":"https://patchwork.plctlab.org/api/users/1/","username":"snail","first_name":"","last_name":"","email":"wangliu@iscas.ac.cn"},"date":"2023-12-13T08:00:02.211290","state":"warning","target_url":"https://patchwork.plctlab.org/jenkins/job/gcc-patch/14892/consoleText","context":"gcc-patch-check","description":"Git am fail log"}+ curl -X PATCH -H 'Authorization: Token [*******]' -F state=Unresolved https://patchwork.plctlab.org/api/1.2/patches/177289/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0{"id":177289,"url":"https://patchwork.plctlab.org/api/1.2/patches/177289/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"","list_archive_url":null,"date":"2023-12-12T12:09:22","name":"[committed] testsuite: Fix up test directive syntax errors","commit_ref":null,"pull_url":null,"state":"unresolved","archived":false,"hash":"4aa4c13752263866ea17da0ce9b5729082841d8c","submitter":{"id":40,"url":"https://patchwork.plctlab.org/api/1.2/people/40/","name":"Jakub Jelinek","email":"jakub@redhat.com"},"delegate":null,"mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZXhNciKplu6x+J01@tucnak/mbox/","series":[{"id":73085,"url":"https://patchwork.plctlab.org/api/1.2/series/73085/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/list/?series=73085","date":"2023-12-12T12:09:22","name":"[committed] testsuite: Fix up test directive syntax errors","version":1,"mbox":"https://patchwork.plctlab.org/series/73085/mbox/"}],"comments":"https://patchwork.plctlab.org/api/patches/177289/comments/","check":"warning","checks":"https://patchwork.plctlab.org/api/patches/177289/checks/","tags":{},"headers":{"Return-Path":"","Delivered-To":["ouuuleilei@gmail.com","gcc-patches@gcc.gnu.org"],"Received":["by 2002:a59:bcd1:0:b0:403:3b70:6f57 with SMTP id r17csp7675985vqy;\n Tue, 12 Dec 2023 04:10:00 -0800 (PST)","from server2.sourceware.org (server2.sourceware.org. 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spf=pass smtp.mailfrom=redhat.com","server2.sourceware.org;\n arc=none smtp.remote-ip=170.10.133.124"],"X-Original-To":"gcc-patches@gcc.gnu.org","DMARC-Filter":"OpenDMARC Filter v1.4.2 sourceware.org 12B133858C78","ARC-Filter":"OpenARC Filter v1.0.0 sourceware.org 12B133858C78","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;\n s=mimecast20190719; t=1702382967;\n h=from:from:reply-to:reply-to:subject:subject:date:date:\n message-id:message-id:to:to:cc:mime-version:mime-version:\n content-type:content-type:\n content-transfer-encoding:content-transfer-encoding;\n bh=kdAaUSWIeIb7YTWHTrlv2POpE/LIqDPzaKQ2faEniqA=;\n b=Yxlrpkl5rtW4z81B13na9Ygqy/U/3kOZuQ7tSVKQF2D5O3UrleUDmZQBDvmqjM0rKdtd+Y\n vTd0C9jq9UDpZPdh2YYfRjDslZxR3OT+xCm+QYazv9/DMUbJSdUkwygH7DAeTv2DWAEEMp\n cvwVE4Eb0ilZzhoYqyR/qA1UbQui4t4=","X-MC-Unique":"y4IZLIw5MKe5DZm112sIrQ-1","Date":"Tue, 12 Dec 2023 13:09:22 +0100","From":"Jakub Jelinek ","To":"gcc-patches@gcc.gnu.org","Subject":"[committed] testsuite: Fix up test directive syntax errors","Message-ID":"","MIME-Version":"1.0","X-Scanned-By":"MIMEDefang 3.4.1 on 10.11.54.1","X-Mimecast-Spam-Score":"0","X-Mimecast-Originator":"redhat.com","Content-Type":"text/plain; charset=utf-8","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","X-Spam-Status":"No, score=-3.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH,\n DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, RCVD_IN_DNSWL_NONE,\n RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP,\n T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6","X-Spam-Checker-Version":"SpamAssassin 3.4.6 (2021-04-09) on\n server2.sourceware.org","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Reply-To":"Jakub Jelinek ","Errors-To":"gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org","X-getmail-retrieved-from-mailbox":"INBOX","X-GMAIL-THRID":"1785077956721515011","X-GMAIL-MSGID":"1785077956721515011"},"content":"Hi!\n\nI've noticed\n+ERROR: gcc.dg/gomp/pr87887-1.c: syntax error in target selector \".-4\" for \" dg-warning 13 \"unsupported return type ???struct S??? for ???simd??? functions\" { target aarch64*-*-* } .-4 \"\n+ERROR: gcc.dg/gomp/pr87887-1.c: syntax error in target selector \".-4\" for \" dg-warning 13 \"unsupported return type ???struct S??? for ???simd??? functions\" { target aarch64*-*-* } .-4 \"\n+ERROR: gcc.dg/gomp/pr89246-1.c: syntax error in target selector \".-4\" for \" dg-warning 11 \"unsupported argument type ???__int128??? for ???simd??? functions\" { target aarch64*-*-* } .-4 \"\n+ERROR: gcc.dg/gomp/pr89246-1.c: syntax error in target selector \".-4\" for \" dg-warning 11 \"unsupported argument type ???__int128??? for ???simd??? functions\" { target aarch64*-*-* } .-4 \"\n+ERROR: gcc.dg/gomp/simd-clones-2.c: unmatched open quote in list for \" dg-final 19 { scan-tree-dump \"_ZGVnN2ua32vl_setArray\" \"optimized { target aarch64*-*-* } } \"\n+ERROR: gcc.dg/gomp/simd-clones-2.c: unmatched open quote in list for \" dg-final 19 { scan-tree-dump \"_ZGVnN2ua32vl_setArray\" \"optimized { target aarch64*-*-* } } \"\nregressions. The following patch fixes those.\n\nTested on x86_64-linux, committed to trunk.\n\n2023-12-12 Jakub Jelinek \n\n\t* gcc.dg/gomp/pr87887-1.c: Add missing comment argument to dg-warning.\n\t* gcc.dg/gomp/pr89246-1.c: Likewise.\n\t* gcc.dg/gomp/simd-clones-2.c: Add missing \" after dump name.\n\n\n\n\tJakub","diff":"--- gcc/testsuite/gcc.dg/gomp/pr87887-1.c.jj\t2023-12-11 23:52:03.761510740 +0100\n+++ gcc/testsuite/gcc.dg/gomp/pr87887-1.c\t2023-12-12 13:02:14.831706007 +0100\n@@ -10,7 +10,7 @@ foo (int x)\n {\n return (struct S) { x };\n }\n-/* { dg-warning \"unsupported return type ???struct S??? for ???simd??? functions\" { target aarch64*-*-* } .-4 } */\n+/* { dg-warning \"unsupported return type ???struct S??? for ???simd??? functions\" \"\" { target aarch64*-*-* } .-4 } */\n \n #pragma omp declare simd\n int\n@@ -18,7 +18,7 @@ bar (struct S x)\n {\n return x.n;\n }\n-/* { dg-warning \"unsupported argument type ???struct S??? for ???simd??? functions\" { target aarch64*-*-* } .-4 } */\n+/* { dg-warning \"unsupported argument type ???struct S??? for ???simd??? functions\" \"\" { target aarch64*-*-* } .-4 } */\n \n #pragma omp declare simd uniform (x)\n int\n--- gcc/testsuite/gcc.dg/gomp/pr89246-1.c.jj\t2023-12-11 23:52 100 14784 100 14634 100 150 219k 2307 --:--:-- --:--:-- --:--:-- 222k :03.768510643 +0100\n+++ gcc/testsuite/gcc.dg/gomp/pr89246-1.c\t2023-12-12 13:02:37.375394079 +0100\n@@ -8,7 +8,7 @@ int foo (__int128 x)\n {\n return x;\n }\n-/* { dg-warning \"unsupported argument type ???__int128??? for ???simd??? functions\" { target aarch64*-*-* } .-4 } */\n+/* { dg-warning \"unsupported argument type ???__int128??? for ???simd??? functions\" \"\" { target aarch64*-*-* } .-4 } */\n \n #pragma omp declare simd\n extern int bar (int x);\n--- gcc/testsuite/gcc.dg/gomp/simd-clones-2.c.jj\t2023-12-11 23:52:03.768510643 +0100\n+++ gcc/testsuite/gcc.dg/gomp/simd-clones-2.c\t2023-12-12 13:03:37.654560017 +0100\n@@ -16,12 +16,12 @@ float setArray(float *a, float x, int k)\n }\n /* { dg-final { scan-tree-dump {(?n)^__attribute__\\(\\(omp declare simd \\(notinbranch uniform\\(0\\) aligned\\(0:32\\) linear\\(2:1\\)\\)\\)\\)$} \"optimized\" } } */\n \n-/* { dg-final { scan-tree-dump \"_ZGVnN2ua32vl_setArray\" \"optimized { target aarch64*-*-* } } } */\n-/* { dg-final { scan-tree-dump \"_ZGVnN4ua32vl_setArray\" \"optimized { target aarch64*-*-* } } } */\n-/* { dg-final { scan-tree-dump \"_ZGVnN2vvva32_addit\" \"optimized { target aarch64*-*-* } } } */\n-/* { dg-final { scan-tree-dump \"_ZGVnN4vvva32_addit\" \"optimized { target aarch64*-*-* } } } */\n-/* { dg-final { scan-tree-dump \"_ZGVnM2vl66u_addit\" \"optimized { target aarch64*-*-* } } } */\n-/* { dg-final { scan-tree-dump \"_ZGVnM4vl66u_addit\" \"optimized { target aarch64*-*-* } } } */\n+/* { dg-final { scan-tree-dump \"_ZGVnN2ua32vl_setArray\" \"optimized\" { target aarch64*-*-* } } } */\n+/* { dg-final { scan-tree-dump \"_ZGVnN4ua32vl_setArray\" \"optimized\" { target aarch64*-*-* } } } */\n+/* { dg-final { scan-tree-dump \"_ZGVnN2vvva32_addit\" \"optimized\" { target aarch64*-*-* } } } */\n+/* { dg-final { scan-tree-dump \"_ZGVnN4vvva32_addit\" \"optimized\" { target aarch64*-*-* } } } */\n+/* { dg-final { scan-tree-dump \"_ZGVnM2vl66u_addit\" \"optimized\" { target aarch64*-*-* } } } */\n+/* { dg-final { scan-tree-dump \"_ZGVnM4vl66u_addit\" \"optimized\" { target aarch64*-*-* } } } */\n \n /* { dg-final { scan-tree-dump \"_ZGVbN4ua32vl_setArray\" \"optimized\" { target i?86-*-* x86_64-*-* } } } */\n /* { dg-final { scan-tree-dump \"_ZGVbN4vvva32_addit\" \"optimized\" { target i?86-*-* x86_64-*-* } } } */\n","prefixes":["committed"]}+ exit 1 Build step 'Execute shell' marked build as failure Finished: FAILURE