Started by user snail Running as SYSTEM [EnvInject] - Loading node environment variables. Building remotely on docker-jenkins-agent in workspace /home/jenkins/agent/workspace/gcc-patch [WS-CLEANUP] Deleting project workspace... [WS-CLEANUP] Deferred wipeout is used... [WS-CLEANUP] Done The recommended git tool is: NONE using credential 0adb5fc7-caa2-429d-97d2-c7fa2fa1d884 Cloning the remote Git repository Using shallow clone with depth 1 Avoid fetching tags Cloning repository git@github.com:plctlab/patchwork-gcc.git > git init /home/jenkins/agent/workspace/gcc-patch # timeout=10 Fetching upstream changes from git@github.com:plctlab/patchwork-gcc.git > git --version # timeout=10 > git --version # 'git version 2.37.2' using GIT_SSH to set credentials patchwork github wangliu-iscas git ssh key Verifying host key using known hosts file, will automatically accept unseen keys > git fetch --no-tags --force --progress --depth=1 -- git@github.com:plctlab/patchwork-gcc.git +refs/heads/*:refs/remotes/origin/* # timeout=10 > git config remote.origin.url git@github.com:plctlab/patchwork-gcc.git # timeout=10 > git config --add remote.origin.fetch +refs/heads/*:refs/remotes/origin/* # timeout=10 Avoid second fetch > git rev-parse refs/remotes/origin/master^{commit} # timeout=10 Checking out Revision c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a (refs/remotes/origin/master) > git config core.sparsecheckout # timeout=10 > git checkout -f c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a # timeout=10 Commit message: "RISC-V: Reorganize binary autovec testcases" > git rev-list --no-walk c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a # timeout=10 [EnvInject] - Mask passwords that will be passed as build parameters. [EnvInject] - Executing scripts and injecting environment variables after the SCM step. [EnvInject] - Injecting as environment variables the properties content GITHUB_REPO=https://github.com/plctlab/patchwork-gcc PATCHWORK_URL=https://patchwork.plctlab.org [EnvInject] - Variables injected successfully. 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|------------+----------------------------------------------------------------------------------------------------------------------------------------------------------| | ID | 27 | | Name | gcc-patch_2023-08 | | URL | https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-08/ | | Owner | patchwork-bot | | Project | gcc-patch | | Public | True | | Patches | 128781 [COMMITTED] PR tree-optimization/110582 - fur_list should not use the range vector for non-ssa, operands. | | | 128790 ipa-sra: Don't consider CLOBBERS as writes preventing splitting | | | 128800 [COMMITTEDv3] tree-optimization: [PR100864] `(a&!b) | b` is not opimized to `a | b` for comparisons | | | 128809 [1/2] Move `~X & X` and `~X | X` over to use bitwise_inverted_equal_p | | | 128810 [2/2] Slightly improve bitwise_inverted_equal_p comparisons | | | 128860 PHIOPT: Mark the conditional lhs and rhs as to look at to see if DCEable | | | 128879 c++: parser cleanup, remove dummy arguments | | | 128924 libbacktrace patch committed | | | 128925 [COMMITTEDv2] Fix PR 93044: extra cast is not removed | | | 128929 c++: improve debug_tree for templated types/decls | | | 128930 tree-pretty-print: handle COMPONENT_REF with non-decl RHS | | | 128958 preprocessor: c++: Support `#pragma GCC target' macros [PR87299] | | | 128992 Adjust testcase for more optimal codegen. | | | 128993 x86: fold two of vec_dupv2df's alternatives | | | 128994 [RESEND] libatomic: drop redundant all-multi command | | | 129013 [V3] VECT: Support CALL vectorization for COND_LEN_* | | | 129032 [v1] RISC-V: Support RVV VFSUB and VFRSUB rounding mode intrinsic API | | | 129062 [COMMITTED] ada: Emit SCOs for nested decisions in quantified expressions | | | 129059 [COMMITTED] ada: check Atree.Get/Set_Field_Value | | | 129060 [COMMITTED] ada: Fix generation of JSON output for data representation | | | 129061 [COMMITTED] ada: Default Put_Image for composite derived types is missing information | | | 129063 [COMMITTED] ada: Incorrect optimization for unconstrained limited record component type | | | 129065 [COMMITTED] ada: Bugbox compiling Constrained_Protected_Object'Image | | | 129066 [COMMITTED] ada: Disable inlining of subprograms with Skip(_Flow_And)_Proof in GNATprove | | | 129064 [COMMITTED] ada: Fix printing of numbers in JSON output for data representation | | | 129069 [PING^1,v8] tree-ssa-sink: Improve code sinking pass. | | | 129071 [PING^3] PATCH v5 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces. | | | 129072 PING^3] [PATCH 3/4] ree: Improve functionality of ree pass for rs6000 target. | | | 129085 [COMMITTED] doc: Fix spelling in arm_v8_1m_main_cde_mve_fp | | | 129108 MAINTAINERS: correct my email address | | | 129129 Fix profile upate after vectorizer peeling | | | 129294 [avr,committed] Fix PR target/110220: Set JUMP_LABEL as required. | | | 129315 analyzer: stash values for CPython plugin [PR107646] | | | 129317 [committed] MAINTAINERS: Add myself to write after approval | | | 129323 RISC-V: Implement vector "average" autovec pattern. | | | 129355 [OpenACC,2.7,v2] Implement default clause support for data constructs | | | 129381 arm: Remove unsigned variant of vcaddq_m | | | 129416 [v2] rs6000: Fix __builtin_altivec_vcmpne{b,h,w} implementation | | | 129425 [1/2] bpf: Implementation of BPF CO-RE builtins | | | 129424 [2/2] bpf: CO-RE builtins support tests. | | | 129439 [Committed] IBM Z: Handle unaligned symbols | | | 129445 match.pd: Canonicalize (signed x << c) >> c [PR101955] | | | 129447 match.pd: Canonicalize (signed x << c) >> c [PR101955] | | | 129456 [v4] i386: Allow -mlarge-data-threshold with -mcmodel=large | | | 129538 Support vec_fmaddsub/vec_fmsubadd for vector HFmode. | | | 129545 Optimize vlddqu + inserti128 to vbroadcasti128 | | | 129546 [v3,RISC-V] Generate Zicond instruction for select pattern with condition eq or neq to 0 | | | 129561 [v1] RISC-V: Support RVV VFWADD rounding mode intrinsic API | | | 129613 [committed,RISC-V] Avoid sub-word mode comparisons with Zicond | | | 129630 [v2] RISC-V: Support RVV VFWADD rounding mode intrinsic API | | | 129669 Fix profile update after cancelled loop distribution | | | 129689 [v1] RISC-V: Enhance the test case for RVV vfsub/vfrsub rounding | | | 129708 Enable tpause Exponential backoff and thread delay | | | 129717 [v3] mklog: handle Signed-off-by, minor cleanup | | | 129735 [1/3,v2] Support get_or_insert in ordered_hash_map | | | 129736 [2/3,v2] genmatch: Reduce variability of generated code | | | 129737 [3/3,v2] genmatch: Log line numbers indirectly | | | 129743 [v1] RISC-V: Support RVV VFWSUB rounding mode intrinsic API | | | 129746 AArch64 update costing for MLA by invariant | | | 129747 AArch64 update costing for combining vector conditionals | | | 129751 AArch64 Undo vec_widen_shiftl optabs [PR106346] | | | 129752 [gensupport] : Don't segfault on empty attrs list | | | 129788 Make add_phi_node_to_bb static | | | 129796 aarch64: SVE/NEON Bridging intrinsics | | | 129816 [1/2] Add virtual operand global liveness computation class | | | 129817 [2/2] Improve sinking with unrelated defs | | | 129850 PR combine/110867 Fix narrow comparison of memory and constant | | | 129925 arm/aarch64: Add bti for all functions [PR106671] | | | 129930 _BitInt bit-field support [PR102989] | | | 129933 [v2] analyzer: stash values for CPython plugin [PR107646] | | | 129934 match.pd: Canonicalize (signed x << c) >> c [PR101955] | | | 129991 [v2,1/3] libgomp, nvptx: low-latency memory allocator | | | 129989 [v2,2/3] openmp, nvptx: low-lat memory access traits | | | 129993 [v2,3/3] amdgcn, libgomp: low-latency allocator | | | 129998 [committed,RISC-V] Fix 20010221-1.c with zicond | | | 130057 [v3] analyzer: stash values for CPython plugin [PR107646] | | | 130167 [x86] PR target/110792: Early clobber issues with rot32di2_doubleword. | | | 130218 MATCH: first of the value replacement moving from phiopt | | | 130238 [v1] RISC-V: Support RVV VFMUL rounding mode intrinsic API | | | 130243 [V2] RISC-V: Support CALL conditional autovec patterns | | | 130245 [v1] RISC-V: Remove redudant extern declaration in function base | | | 130258 Fix `~X & X` and `~X | X` patterns | | | 130259 [v2] RISC-V: Support RVV VFMUL rounding mode intrinsic API | | | 130261 Fix PR 110874: infinite loop in gimple_bitwise_inverted_equal_p with fre | | | 130268 [V4] VECT: Support CALL vectorization for COND_LEN_* | | | 130290 [RFC] Combine zero_extract and sign_extend for TARGET_TRULY_NOOP_TRUNCATION | | | 130294 [v1] RISC-V: Support RVV VFDIV and VFRDIV rounding mode intrinsic API | | | 130317 [v1] RISC-V: Support RVV VFWMUL rounding mode intrinsic API | | | 130325 s390: Enable vect_bswap test cases | | | 130326 s390: Try to emit vlbr/vstbr instead of vperm et al. | | | 130341 [x86] Split SUBREGs of SSE vector registers into vec_select insns. | | | 130343 Introduce -msmp to select /lib_smp/ on ppc-vx6 | | | 130376 [01/10] x86: "prefix_extra" tidying | | | 130377 [02/10] x86: "sse4arg" adjustments | | | 130380 [03/10] x86: "ssemuladd" adjustments | | | 130379 [04/10] x86: "prefix_extra" can't really be "2" | | | 130386 [05/10] x86: replace/correct bogus "prefix_extra" | | | 130389 [06/10] x86: drop stray "prefix_extra" | | | 130381 [07/10] x86: add (adjust) XOP insn attributes | | | 130393 [08/10] x86: add missing "prefix" attribute to VF{,C}MULC | | | 130385 [09/10] x86: correct "length_immediate" in a few cases | | | 130398 [10/10] x86: drop redundant "prefix_data16" attributes | | | 130440 Swap loop splitting and final value replacement | | | 130444 [v3,RFC] c-family: Implement __has_feature and __has_extension [PR60512] | | | 130459 c-family: Add _BitInt support for __atomic_*fetch* [PR102989] | | | 130478 [RFC] c++: extend cold, hot attributes to classes | | | 130482 [v3,1/8] LoongArch: Add Loongson SX vector directive compilation framework. | | | 130488 [v3,2/8] LoongArch: Add Loongson SX base instruction support. | | | 130485 [v3,3/8] LoongArch: Add Loongson SX directive builtin function support. | | | 130483 [v3,4/8] LoongArch: Add Loongson ASX vector directive compilation framework. | | | 130486 [v3,5/8] LoongArch: Add Loongson ASX base instruction support. | | | 130484 [v3,6/8] LoongArch: Add Loongson ASX directive builtin function support. | | | 130534 [COMMITTED] ada: Adjust again address arithmetics in System.Dwarf_Lines | | | 130533 [COMMITTED] ada: Fix spurious error on 'Input of private type with Type_Invariant aspect | | | 130536 [COMMITTED] ada: Rewrite Set_Image_*_Unsigned routines to remove recursion. | | | 130535 [COMMITTED] ada: Add pragma Annotate for GNATcheck exemptions | | | 130542 tree-optimization/110702 - avoid zero-based memory references in IVOPTs | | | 130559 poly_int: Handle more can_div_trunc_p cases | | | 130584 [libbacktrace] fix up broken test | | | 130609 mid-end: Use integral time intervals in timevar.cc | | | 130625 [committed] analyzer: fix ICE on zero-sized arrays [PR110882] | | | 130661 [1/3,v3] Support get_or_insert in ordered_hash_map | | | 130659 [2/3,v3] genmatch: Reduce variability of generated code | | | 130660 [3/3,v3] genmatch: Log line numbers indirectly | | | 130663 [v1] RISC-V: Fix one comment for binop_frm insn | | | 130669 [v1] RISC-V: Support RVV VFMACC rounding mode intrinsic API | | | 130673 [committed] testsuite, analyzer: add test case [PR108171] | | | 130676 [committed,RISC-V] Remove errant hunk of code | | | 130729 Add documentation for -Wflex-array-member-not-at-end. | | | 130733 [PATCHv2] Fix PR 110874: infinite loop in gimple_bitwise_inverted_equal_p with fre | | | 130784 [COMMITTED] Automatically set type is certain Value_Range routines. | | | 130785 [COMMITTED] Provide a routine for NAME == NAME relation. | | | 130787 [COMMITTED] Add operand ranges to op1_op2_relation API. | | | 130814 Specify signed/unsigned/dontcare in calls to extract_bit_field_1. | | | 130846 Fix profiledbootstrap | | | 130849 Update estimated iteraitons counts after splitting | | | 130919 [v1] RISC-V: Support RVV VFNMACC rounding mode intrinsic API | | | 130933 [v1] RISC-V: Support RVV VFMSAC rounding mode intrinsic API | | | 130942 [v1] RISC-V: Support RVV VFNMSAC rounding mode intrinsic API | | | 130970 [C] _Generic should not warn in non-active branches [PR68193,PR97100] | | | 130973 [v1] RISC-V: Support RVV VFMADD rounding mode intrinsic API | | | 130984 Disable loop distribution for loops with estimated iterations 0 | | | 131023 [avr,committed] Fix some typos in avr-mcus.def | | | 131024 [avr,committed] Add some more devices to avr-mcus.def. | | | 131054 mid-end: Use integral time intervals in timevar.cc | | | 131068 tree-optimization/110838 - less aggressively fold out-of-bound shifts | | | 131072 tree-optimization/110838 - vectorization of widened right shifts | | | 131170 [pushed,LRA] Check input insn pattern hard regs against early clobber hard regs for live info | | | 131215 libatomic: Improve ifunc selection on AArch64 | | | 131284 Add -Wdisabled-optimization warning for not optimizing sibling calls | | | 131295 _Decimal* to _BitInt conversion support [PR102989] | | | 131320 [V2,1/3] Provide counted_by attribute to flexible array member field (PR108896) | | | 131321 [V2,2/3] Use the counted_by atribute info in builtin object size [PR108896] | | | 131322 [V2,3/3] Use the counted_by attribute information in bound sanitizer[PR108896] | | | 131340 [pushed] analyzer: fix some svalue::dump_to_pp implementations | | | 131341 [pushed] analyzer: handle function attribute "alloc_size" [PR110426] | | | 131372 match.pd: Implement missed optimization ((x ^ y) & z) | x -> (z & y) | x [PR109938] | | | 131497 | | | 131500 [committed] c: Less warnings for parameters declared as arrays [PR98536] | | | 131504 [C] Support typename as selector in _Generic | | | 131546 MATCH: Extend min_value/max_value to pointer types | | | 131559 [v1] RISC-V: Refactor RVV frm_mode attr for rounding mode intrinsic | | | 131580 [committed,_GLIBCXX_INLINE_VERSION] Add __cxa_call_terminate symbol export | | | 131586 [1/9] LoongArch: Introduce loongarch32 target | | | 131581 [2/9] LoongArch: Fix default ISA setting | | | 131582 [3/9] LoongArch: Fix SI division for loongarch32 target | | | 131583 [4/9] LoongArch: Fix movgr2frh.w operand order | | | 131587 [5/9] LoongArch: Fix 64-bit move for loongarch32 target | | | 131589 [6/9] LoongArch: Fix 64-bit immediate move for loongarch32 target | | | 131584 [7/9] LoongArch: Fix signed 32-bit overflow for loongarch32 target | | | 131585 [8/9] LoongArch: Do not emit SF/DF <-> DI conversion in loongarch32 | | | 131588 [9/9] LoongArch: Add: Add -march=loongarch64 to tests with -mabi=lp64d | | | 131624 c++: follow DR 2386 and update implementation of get_tuple_size [PR110216] | | | 131626 Fix profile update after peeled epilogues | | | 131629 [Committed] Avoid FAIL of gcc.target/i386/pr110792.c | | | 131630 Fix profile update after versioning ifconverted loop | | | 131657 [v1] LoongArch:Implement 128-bit floating point functions in gcc. | | | 131666 MATCH: [PR109959] `(uns <= 1) & uns` could be optimized to `uns == 1` | | | 131721 PR target/107671: Make more use of btl/btq on x86_64. | | | 131754 Fix ICE in rtl check when bootstrap. | | | 131755 i386: Clear upper bits of XMM register for V4HFmode/V2HFmode operations [PR110762] | | | 131759 libsanitizer: Fix SPARC stacktraces | | | 131766 RISC-V: Support VLS basic operation auto-vectorization | | | 131768 [V4] VECT: Support CALL vectorization for COND_LEN_* | | | 131769 tree-optimization/110897 - Fix missed vectorization of shift on both RISC-V and aarch64 | | | 131778 [1/3,v4] Support get_or_insert in ordered_hash_map | | | 131780 [2/3,v4] genmatch: Reduce variability of generated code | | | 131779 [3/3,v4] genmatch: Log line numbers indirectly | | | 131784 fwprop: Allow UNARY_P and check register pressure. | | | 131804 [01/24] toplevel: Substitute GDCFLAGS instead of using CFLAGS | | | 131810 [02/24] PR29961, plugin-api.h: "Could not detect architecture endianess" | | | 131807 [03/24] gcc-4.5 build fixes | | | 131822 [04/24] Sync with binutils: GCC: Pass --plugin to AR and RANLIB | | | 131818 [05/24] GCC: Check if AR works with --plugin and rc | | | 131811 [06/24] toplevel: Recover tilegx/tilepro targets | | | 131815 [07/24] binutils, gdb: support zstd compressed debug sections | | | 131814 [08/24] configure: require libzstd >= 1.4.0 | | | 131806 [09/24] add --enable-default-compressed-debug-sections-algorithm configure option | | | 131835 [10/24] gprofng: a new GNU profiler | | | 131809 [11/24] Disable year 2038 support on 32-bit hosts by default | | | 131819 [12/24] Pass PKG_CONFIG_PATH down from top-level Makefile | | | 131854 [13/24] configure: reinstate 32b PA-RISC HP-UX target in toplevel | | | 131858 [14/24] libtool.m4: fix nm BSD flag detection | | | 131853 [15/24] libtool.m4: fix the NM="/nm/over/here -B/option/with/path" case | | | 131856 [16/24] Add support for the haiku operating system | | | 131827 [17/24] egrep in binutils | | | 131820 [18/24] PR27116, Spelling errors found by Debian style checker | | | 131865 [19/24] Deprecate a.out support for NetBSD targets. | | | 131825 [20/24] PKG_CHECK_MODULES: Check if $pkg_cv_[]$1[]_LIBS works | | | 131824 [21/24] PKG_CHECK_MODULES: Properly check if $pkg_cv_[]$1[]_LIBS works | | | 131868 [22/24] libtool.m4: augment symcode for Solaris 11 | | | 131837 [23/24] bfd: linker: merge .sframe sections | | | 131859 [24/24] toplevel: Makefile.def: add install-strip dependency on libsframe | | | 131798 [COMMITTED] ada: Spurious error on class-wide preconditions | | | 131799 [COMMITTED] ada: Crash in GNATprove due to wrong detection of inlining | | | 131800 [COMMITTED] ada: Extend precondition of Interfaces.C.String.Value with Length | | | 131801 [COMMITTED] ada: Refactor multiple returns | | | 131849 cprop_hardreg: Allow more propagation of the stack pointer. | | | 131909 [v1] Mode-Switching: Fix SET_SRC ICE when only one operand | | | 131960 Improve -fopt-info-vec for basic-block vectorization | | | 131967 Use RPO order for sinking | | | 131984 tree-optimization/49955 - BB reduction with odd number of lanes | | | 131992 rtl-optimization/110869 Fix tests cmp-mem-const-*.c for sparc | | | 132025 [OpenACC,2.7,v2] readonly modifier support in front-ends | | | 132068 [V2] gcc-14/changes.html: Deprecate a GCC C extension on flexible array members. | | | 132093 [v4] Implement new RTL optimizations pass: fold-mem-offsets. | | | 132115 VR-VALUES [PR28794]: optimize compare assignments also | | | 132133 [committed,RISC-V] Handle more cases in riscv_expand_conditional_move | | | 132290 [COMMITTED] MAINTAINERS: Add myself as a BPF port reviewer | | | 132299 [ver,3] rs6000: Fix __builtin_altivec_vcmpne{b,h,w} implementation | | | 132318 _BitInt to _Decimal* conversion support [PR102989] | | | 132364 vect: Add a popcount fallback. | | | 132368 [committed,RISC-V] Don't reject constants in cmov condition | | | 132387 [committed] libstdc++: Fix past-the-end increment in std::format [PR110862] | | | 132388 [committed] i386: Fix grammar typo in diagnostic | | | 132391 [committed] libstdc++: Constrain __format::_Iter_sink for contiguous iterators [PR110917] | | | 132390 [committed] libstdc++: Fix incorrect use of abs and log10 in std::format [PR110860] | | | 132468 MATCH: [PR110937/PR100798] (a ? ~b : b) should be optimized to b ^ -(a) | | | 132477 RISC-V: Support VLS shift vectorization | | | 132481 [v2] LoongArch:Implement 128-bit floating point functions in gcc. | | | 132482 [v2] LoongArch:Implement 128-bit floating point functions in gcc. | | | 132488 c++: Report invalid id-expression in decltype [PR100482] | | | 132489 c++: Report invalid id-expression in decltype [PR100482] | | | 132496 [v2] Mode-Switching: Fix SET_SRC ICE when USE or CLOBBER | | | 132497 RISC-V: Support neg VLS auto-vectorization | | | 132504 [V1] RISC-V: Fix a bug that causes an error insn. | | | 132507 [v2] RISC-V: Refactor RVV frm_mode attr for rounding mode intrinsic | | | 132510 [1/3] Initial support for AVX10.1 | | | 132509 [2/3] Emit a warning when disabling AVX512 with AVX10 enabled or disabling AVX10 with AVX512 enabled | | | 132508 [3/3] Emit a warning when AVX10 options conflict in vector width | | | 132511 [1/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins | | | 132512 [2/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins | | | 132513 [3/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins | | | 132515 [4/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins | | | 132514 [5/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins | | | 132516 [6/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins | | | 132517 [X86] Workaround possible CPUID bug in Sandy Bridge. | | | 132518 RISC-V: Allow CONST_VECTOR for VLS modes. | | | 132521 RISC-V: Fix error combine of pred_mov pattern | | | 132522 tree-optimization/110924 - fix vop liveness for noreturn const CFG parts | | | 132523 [GCC] aarch64: Add support for Cortex-A520 CPU | | | 132525 testsuite: Add runtime _BitInt stdatomic.h tests [PR102989] | | | 132527 testsuite: Fix gcc.dg/analyzer/allocation-size-multiline-[123].c [PR 110426] | | | 132569 [committed] i386: Do not sanitize upper part of V2SFmode reg with -fno-trapping-math [PR110832] | | | 132589 bpf: Fixed GC mistakes in BPF builtins code. | | | 132884 [committed,RISC-V] Fix bug in condition canonicalization for zicond | | | 132900 [v3] RISC-V: Add Ztso atomic mappings | | | 132927 libstdc++: fix memory clobbering in std::vector [PR110879] | | | 133018 [V2,X86] Workaround possible CPUID bug in Sandy Bridge. | | | 133035 [v3] Mode-Switching: Fix SET_SRC ICE when CLOBBER insn | | | 133067 RISC-V: Remove non-existing 'Zve32d' extension | | | 133068 [RFC,1/2] RISC-V: __builtin_riscv_pause for all environment | | | 133069 [RFC,2/2] RISC-V: Fix documentation of __builtin_riscv_pause | | | 133071 VECT: Support loop len control on EXTRACT_LAST vectorization | | | 133077 Rename local variable subleaf_level to max_subleaf_level. | | | 133158 RISC-V: Fix VLMAX AVL incorrect local anticipate [VSETVL PASS] | | | 133159 Remove insert location argument from vectorizable_live_operation | | | 133171 [v2,01/14] LoongArch: Introduce loongarch32 target | | | 133167 [v2,02/14] LoongArch: Fix default ISA setting | | | 133174 [v2,03/14] LoongArch: Fix SI division for loongarch32 target | | | 133170 [v2,04/14] LoongArch: Fix movgr2frh.w operand order | | | 133169 [v2,05/14] LoongArch: Fix 64-bit move for loongarch32 target | | | 133173 [v2,06/14] LoongArch: Fix 64-bit immediate move for loongarch32 target | | | 133176 [v2,07/14] LoongArch: Fix signed 32-bit overflow for loongarch32 target | | | 133177 [v2,08/14] LoongArch: Disable SF/DF -> unsigned DI expand in loongarch32 | | | 133180 [v2,09/14] LoongArch: Add -march=loongarch64 to tests with -mabi=lp64d | | | 133182 [v2,10/14] LoongArch: Forbid ADDRESS_REG_REG in loongarch32 | | | 133186 [v2,11/14] LoongArch: Mark am* instructions as LA64-only | | | 133172 [v2,12/14] LoongArch: Set long double width to 128 in la32 | | | 133181 [v2,13/14] LoongArch: Fix ilp32 detection | | | 133183 [v2,14/14] LoongArch: Allow ftintrz for DF->DI in loongarch32 | | | 133197 RISC-V: Support NPATTERNS = 1 stepped vector[PR110950] | | | 133237 Handle in-order reductions when SLP vectorizing non-loops | | | 133278 [committed] libstdc++: Minor fixes for some warnings in | | | 133280 [committed] libstdc++: Explicitly default some copy ctors and assignments | | | 133279 [committed] libstdc++: Fix some -Wunused-parameter warnings | | | 133281 [committed] libstdc++: Fix some -Wmismatched-tags warnings | | | 133284 [committed] libstdc++: Suppress clang -Wc99-extensions warnings in | | | 133282 [committed] libstdc++: Fix a -Wsign-compare warning in std::list | | | 133283 [committed] libstdc++: Fix constexpr functions to conform to older standards | | | 133314 rs6000, add overloaded DFP quantize support | | | 133329 VR-VALUES: Simplify comparison using range pairs | | | 133402 [1/12] expr: Small optimization [PR102989] | | | 133404 [2/12] lto-streamer-in: Adjust assert [PR102989] | | | 133406 [3/12] phiopt: Fix phiopt ICE on vops [PR102989] | | | 133407 [4/12] Middle-end _BitInt support [PR102989] | | | 133409 [5/12] _BitInt lowering support [PR102989] | | | 133408 [6/12] i386: Enable _BitInt on x86-64 [PR102989] | | | 133410 [7/12] ubsan: _BitInt -fsanitize=undefined support [PR102989] | | | 133411 [8/12] libgcc: Generated tables for _BitInt <-> _Decimal* conversions [PR102989] | | | 133412 [9/12] libgcc _BitInt support [PR102989] | | | 133413 [10/12] C _BitInt support [PR102989] | | | 133415 [11/12] testsuite part 1 for _BitInt support [PR102989] | | | 133416 [12/12] testsuite part 2 for _BitInt support [PR102989] | | | 133443 MATCH: [PR110937/PR100798] (a ? ~b : b) should be optimized to b ^ -(a) | | | 133444 [v2] analyzer: More features for CPython analyzer plugin [PR107646] | | | 133481 [pushed] analyzer: remove default return value from region_model::on_call_pre | | | 133483 [1/3] fortran: New predicate gfc_length_one_character_type_p | | | 133482 [2/3] fortran: Fix length one character dummy arg type [PR110419] | | | 133485 [3/3] testsuite: Use distinct explicit error codes in value_9.f90 | | | 133587 [v4,1/8] libcpp: Add LC_GEN linemaps to support in-memory buffers | | | 133586 [v4,2/8] libcpp: diagnostics: Support generated data in expanded locations | | | 133591 [v4,3/8] diagnostics: Refactor class file_cache_slot | | | 133590 [v4,4/8] diagnostics: Support obtaining source code lines from generated data buffers | | | 133592 [v4,5/8] diagnostics: Support testing generated data in input.cc selftests | | | 133593 [v4,6/8] diagnostics: Full support for generated data locations | | | 133596 [v4,7/8] diagnostics: libcpp: Assign real locations to the tokens inside _Pragma strings | | | 133588 [v4,8/8] diagnostics: Support generated data locations in SARIF output | | | 133625 Fix PR 110954: wrong code with cmp | !cmp | | | 133627 RISC-V: Enable Hoist to GCSE simple constants | | | 133634 i386: Do not sanitize upper part of V2HFmode and V4HFmode reg with -fno-trapping-math [PR110832] | | | 133642 Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions. | | | 133662 [RFC,v2,1/2] RISC-V: __builtin_riscv_pause for all environment | | | 133661 [RFC,v2,2/2] RISC-V: Fix documentation of __builtin_riscv_pause | | | 133663 [RFC,1/2] RISC-V: Make __builtin_riscv_pause 'Zihintpause' only | | | 133664 [RFC,2/2] RISC-V: Fix documentation of __builtin_riscv_pause | | | 133671 [1/1] RISC-V: Make "prefetch.i" built-in usable | | | 133672 [v3] RISC-V: Refactor RVV frm_mode attr for rounding mode intrinsic | | | 133691 [v1] RISC-V: Support RVV VFMACC rounding mode intrinsic API | | | 133692 sso-string@gnu-versioned-namespace [PR83077] | | | 133718 [V2,1/3] RISC-V: Part-1: Select suitable vector registers for vector type args and returns | | | 133719 [V2,2/3] RISC-V: Part-2: Save/Restore vector registers which need to be preversed | | | 133720 [V2,3/3] RISC-V: Part-3: Output .variant_cc directive for vector function | | | 133736 [V2] VECT: Support loop len control on EXTRACT_LAST vectorization | | | 133757 [v1] RISC-V: Support RVV VFNMACC rounding mode intrinsic API | | | 133764 RISC-V: Add missing modes to the iterators | | | 133788 RISC-V: Support TU for integer ternary OP[PR110964] | | | 133842 [13/12] C _BitInt incremental fixes [PR102989] | | | 133868 RISC-V: Add MASK vec_duplicate pattern[PR110962] | | | 133927 preserve base pointer for __deregister_frame [PR110956] | | | 133928 c: Support for -Wuseless-cast [RR84510] | | | 133959 [V2] RISC-V: Fix error combine of pred_mov pattern | | | 133961 Make ISEL used internal functions const/nothrow where appropriate | | | 133974 tree-optimization/110963 - more PRE when optimizing for size | | | 134025 rtl-optimization/110939 Really fix narrow comparison of memory and constant | | | 133999 [1/5] OpenMP: Move Fortran 'declare mapper' instantiation code | | | 134002 [2/5] OpenMP: Reprocess expanded clauses after 'declare mapper' instantiation | | | 133998 [3/5] OpenMP: Introduce C_ORT_{, OMP_}DECLARE_MAPPER c_omp_region_type types | | | 134001 [4/5] OpenMP: Look up 'declare mapper' definitions at resolution time not parse time | | | 134003 [5/5] OpenMP: Enable 'declare mapper' mappers for 'target update' directives | | | 134044 [13/12,v2] C _BitInt incremental fixes [PR102989] | | | 134045 c, v2: Add __typeof_unqual__ and __typeof_unqual support | | | 134046 c, c++, v2: Accept __builtin_classify_type (typename) | | | 134048 c, v2: Add stdckdint.h header for C23 | | | 134050 stdckdint.h _BitInt test | | | 134054 match.pd, v2: Implement missed optimization ((x ^ y) & z) | x -> (z & y) | x [PR109938] | | | 134073 c++: dependently scoped template-id in type-req [PR110927] | | | 134074 c++: recognize in-class var tmpl partial spec [PR71954] | | | 134075 c++: bogus warning w/ deduction guide in anon ns [PR106604] | | | 134110 Fix undefined behaviour in profile_count::differs_from_p | | | 134111 Fix profile updating bug in tree-ssa-threadupdate | | | 134113 Fix profile update in duplicat_loop_body_to_header_edge for loops with 0 count_in | | | 134134 [RFC,v2] c++: extend cold, hot attributes to classes | | | 134232 config: Fix host -rdynamic detection for build != host != target | | | 134240 Fix division by zero in tree-ssa-loop-split | | | 134243 [committed] libstdc++: Use alias template for iterator_category [PR110970] | | | 134242 [committed] libstdc++: Fix std::format for localized floats [PR110968] | | | 134246 [committed] libstdc++: Fix out-of-bounds read in format string "{:{}." [PR110974] | | | 134251 [PATCHv2] Fix PR 110954: wrong code with cmp | !cmp | | | 134260 Software mitigation: Disable gather generation in vectorization for GDS affected Intel Processors. | | | 134279 [v1] RISC-V: Support RVV VFMSAC rounding mode intrinsic API | | | 134326 [v1] RISC-V: Support RVV VFNMSAC rounding mode intrinsic API | | | 134332 [V2] Support -m[no-]gather -m[no-]scatter to enable/disable vectorization for all gather/scatter instructions | | | 134334 [V3] VECT: Support loop len control on EXTRACT_LAST vectorization | | | 134338 VECT: Add vec_mask_len_{load_lanes,store_lanes} patterns | | | 134345 [v1] RISC-V: Support RVV VFMADD rounding mode intrinsic API | | | 134355 c, v3: Add stdckdint.h header for C23 | | | 134357 dg-cmp-results: Escape slash from variant argument | | | 134359 [v1] RISC-V: Support RVV VFNMADD rounding mode intrinsic API | | | 134370 RISC-V: Fix vec_series expander[PR110985] | | | 134372 RISC-V: Revert the convert from vmv.s.x to vmv.v.i | | | 134375 RISC-V: Revive test case PR 102957 | | | 134377 [1/2] PHI-OPT [PR 110984]: Add support for NE_EXPR/EQ_EXPR with casts to spaceship_replacement | | | 134378 [2/2] VR-VALUES: Rewrite test_for_singularity using range_op_handler | | | 134386 [V2] RISC-V: Allow CONST_VECTOR for VLS modes | | | 134397 [v1] RISC-V: Support RVV VFMSUB rounding mode intrinsic API | | | 134417 tree-optimization/110979 - fold-left reduction and partial vectors | | | 134418 Improve BB vectorization opt-info | | | 134435 VECT: Fix ICE on MASK_LEN_{LOAD, STORE} when no LEN recorded[PR110989] | | | 134434 analyzer: New option fanalyzer-show-events-in-system-headers [PR110543] | | | 134474 [v2] tree-optimization/110979 - fold-left reduction and partial vectors | | | 134493 [v3] c++: extend cold, hot attributes to classes | | | 134510 [V2] VECT: Fix ICE on MASK_LEN_{LOAD, STORE} when no LEN recorded[PR110989] | | | 134522 [committed] libstdc++: Revert accidentally committed change to bits/stl_iterator.h | | | 134526 [committed] libstdc++: Handle invalid values in std::chrono pretty printers | | | 134535 [V4] VECT: Support loop len control on EXTRACT_LAST vectorization | | | 134561 [pushed,LRA] : Implement output stack pointer reloads | | | 134604 [committed] libstdc++: Do not call log10(0.0) in std::format [PR110860] | | | 134605 [COMMITTED] MAINTAINERS: Add myself to write after approval | | | 134606 c, v4: Add stdckdint.h header for C23 | | | 134610 tree-pretty-print: delimit TREE_VEC with braces | | | 134624 [COMMITTED] analyzer: More features for CPython analyzer plugin [PR107646] | | | 134640 [COMMITTED] bpf: allow exceeding max num of args in BPF when always_inline | | | 134641 [COMMITTED] bpf: liberate R9 for general register allocation | | | 134645 [committed] libstdc++: Implement C++20 std::chrono::parse [PR104167] | | | 134652 RISC-V: Specify -mabi for ztso testcases | | | 134728 [committed] Fix subdi3 synthesis on rx port | | | 134733 [pushed] analyzer: new warning: -Wanalyzer-unterminated-string [PR105899] | | | 134752 [committed] libstdc++: Fix std::format_to_n return value [PR110990] | | | 134799 RISC-V: Add TAREGT_VECTOR check into VLS modes | | | 134807 [1/3] RISC-V: Add stub support for existing extensions (privileged) | | | 134809 [2/3] RISC-V: Add stub support for existing extensions (vendor) | | | 134808 [3/3] RISC-V: Add stub support for existing extensions (unprivileged) | | | 134813 [v1] RISC-V: Support RVV VFNMSUB rounding mode intrinsic API | | | 134830 Add support for vector conitional not | | | 134831 [v1] c++: follow DR 2386 and update implementation of get_tuple_size [PR110216] | | | 134890 RISC-V: Fix autovec_length_operand predicate[PR110989] | | | 134891 RISC-V: Add the missed half floating-point mode patterns of local_pic_load/store when only use zfhmin | | | 134993 [v4] Mode-Switching: Fix SET_SRC ICE for create_pre_exit | | | 135018 [v1] RISC-V: Support RVV VFWMACC rounding mode intrinsic API | | | 135032 [pushed] modula-2, plugin: Fix Darwin bootstrap issues. | | | 135078 gcc/reload.h: Change type of x_spill_indirect_levels | | | 135080 [v2,1/2] libstdc++: Implement more maintainable header | | | 135081 [v2,2/2] libstdc++: Replace all manual FTM definitions and use | | | 135095 [pushed] LRA]: Fix asserts for output stack pointer reloads | | | 135097 [committed] Disable LRA for MMIX. | | | 135098 [committed] MMIX: Handle LRA FP-to-SP-elimination oddity | | | 135099 [PATCHv4,rs6000] Generate mfvsrwz for all subtargets and remove redundant zero extend [PR106769] | | | 135101 [committed] MMIX: Re-enable LRA | | | 135102 [committed] MMIX: Switch to lra_in_progress | | | 135104 [v1] RISC-V: Support RVV VFWNMACC rounding mode intrinsic API | | | 135105 Generate vmovapd instead of vmovsd for moving DFmode between SSE_REGS. | | | 135106 RISC-V: Deduplicate #error messages in testsuite | | | 135113 [v1] RISC-V: Support RVV VFWMSAC rounding mode intrinsic API | | | 135120 [v1,1/6] LoongArch: a symmetric multilib subdir layout | | | 135117 [v1,2/6] LoongArch: improved target configuration interface | | | 135116 [v1,3/6] LoongArch: define preprocessing macros "__loongarch_{arch, tune}" | | | 135118 [v1,4/6] LoongArch: use -mstrict-align by default when building libraries | | | 135115 [v1,5/6] LoongArch: export headers for building GCC plugins | | | 135119 [v1,6/6] LoongArch: support loongarch*-elf target | | | 135121 x86: Update model values for Raptorlake. | | | 135128 [1/2] RISC-V: Add support for the 'Zfa' extension | | | 135129 [2/2] RISC-V: Constant FP Optimization with 'Zfa' | | | 135132 [1/2] light expander sra v0 | | | 135133 [2/2] combine nonconstant_array walker and expander_sra walker | | | 135135 [v10] RISC-V: Add support for the Zfa extension | | | 135138 [v1] RISC-V: Support RVV VFWNMSAC rounding mode intrinsic API | | | 135143 [v2,1/3] RISC-V: Add stub support for existing extensions (privileged) | | | 135144 [v2,2/3] RISC-V: Add stub support for existing extensions (vendor) | | | 135142 [v2,3/3] RISC-V: Add stub support for existing extensions (unprivileged) | | | 135156 VECT: Apply MASK_LEN_{LOAD_LANES, STORE_LANES} into vectorizer | | | 135186 [v1] RISC-V: Support RVV VFSQRT rounding mode intrinsic API | | | 135221 Fix print_loop_info ICE | | | 135238 vect: Remove several useless VMAT_INVARIANT checks | | | 135239 vect: Move VMAT_LOAD_STORE_LANES handlings from final loop nest | | | 135240 vect: Move VMAT_GATHER_SCATTER handlings from final loop nest | | | 135283 genrecog: Add SUBREG_BYTE.to_constant check to the genrecog | | | 135297 Fix for bug libstdc++/110860 | | | 135349 [v2] In the pipeline, USE or CLOBBER should delay execution if it starts a new live range. | | | 135369 RISC-V: Support MASK_LEN_{LOAD_LANES,STORE_LANES} | | | 135401 [v1] RISC-V: Support RVV VFREC7 rounding mode intrinsic API | | | 135418 tree-optimization/110991 - unroll size estimate after vectorization | | | 135465 [GCC] aarch64: Add support for Cortex-A720 CPU | | | 135481 [v2] RISC-V: Support RVV VFREC7 rounding mode intrinsic API | | | 135523 [v2] analyzer: New option fanalyzer-show-events-in-system-headers [PR110543] | | | 135527 Avoid division by zero in fold_loop_internal_call | | | 135575 [pushed] c++: -fconcepts and __cpp_concepts | | | 135582 Fortran: Avoid accessing gfc_charlen when not looking at BT_CHARACTER (PR 110677) | | | 135584 arm: [MVE intrinsics] fix binary_acca_int32 and binary_acca_int64 shapes | | | 135585 arm: [MVE intrinsics] Remove dead check for float type in parse_element_type | | | 135588 [1/9] arm: [MVE intrinsics] factorize vmullbq vmulltq | | | 135589 [2/9] arm: [MVE intrinsics] add unspec_mve_function_exact_insn_vmull | | | 135592 [3/9] arm: [MVE intrinsics] add binary_widen shape | | | 135595 [4/9] arm: [MVE intrinsics] rework vmullbq_int vmulltq_int | | | 135590 [5/9] arm: [MVE intrinsics] add support for p8 and p16 polynomial types | | | 135591 [6/9] arm: [MVE intrinsics] add support for U and p formats in parse_element_type | | | 135593 [7/9] arm: [MVE intrinsics] add binary_widen_poly shape | | | 135594 [8/9] arm: [MVE intrinsics] add unspec_mve_function_exact_insn_vmull_poly | | | 135596 [9/9] arm: [MVE intrinsics] rework vmullbq_poly vmulltq_poly | | | 135600 [pushed,LRA] : Process output stack pointer reloads before emitting reload insns | | | 135606 [v4,1/6] LoongArch: Add Loongson SX vector directive compilation framework. | | | 135604 [v4,2/6] LoongArch: Add Loongson SX base instruction support. | | | 135605 [v4,3/6] LoongArch: Add Loongson SX directive builtin function support. | | | 135602 [v4,4/6] LoongArch: Add Loongson ASX vector directive compilation framework. | | | 135607 [v4,5/6] LoongArch: Add Loongson ASX base instruction support. | | | 135603 [v4,6/6] LoongArch: Add Loongson ASX directive builtin function support. | | | 135614 [v1] RISC-V: Support RVV VFCVT.X.F.V rounding mode intrinsic API | | | 135615 Makefile.in: Make recog.h depend on $(TREE_H) | | | 135619 CRIS: Don't include tree.h in cris-protos.h, PR bootstrap/111021 | | | 135620 [v1] RISC-V: Support RVV VFCVT.XU.F.V rounding mode intrinsic API | | | 135622 [v2] CRIS: Don't include tree.h in cris-protos.h, PR bootstrap/111021 | | | 135624 [v1] RISC-V: Support RVV VFCVT.F.X.V and VFCVT.F.XU.V rounding mode intrinsic API | | | 135629 [v1] RISC-V: Support RVV VFWCVT.X.F.V rounding mode intrinsic API | | | 135632 Use find_loop_location from unrolling | | | 135636 [v1] RISC-V: Support RVV VFWCVT.XU.F.V rounding mode intrinsic API | | | 135645 [v3] LoongArch:Implement 128-bit floating point functions in gcc. | | | 135652 Support constants and externals in BB reduction vectorization | | | 135654 [V2] VECT: Apply MASK_LEN_{LOAD_LANES, STORE_LANES} into vectorizer | | | 135659 Cleanup BB vectorization roots handling | | | 135660 Handle TYPE_OVERFLOW_UNDEFINED vectorized BB reductions | | | 135661 [v4] c++: extend cold, hot attributes to classes | | | 135665 IFN: Fix vector extraction into promoted subreg. | | | 135667 [v3] OpenACC 2.7: default clause support for data constructs (was: [PATCH, OpenACC 2.7, v2] Implement default clause support for data constructs) | | | 135669 [committed,GCC,12] d: Fix internal compiler error: in layout_aggregate_type, at d/types.cc:574 | | | 135674 RISC-V: Fix reduc_strict_run-1 test case. | | | 135675 [v2,GCC] aarch64: Add support for Cortex-A720 CPU | | | 135683 [gcc,11,backport] Support ld.mold linker. | | | 135685 [V3] riscv: generate builtin macro for compilation with strict alignment: | | | 135686 testsuite: Remove unused dg-line in ce8cdf5bcf96a2db6d7b9f656fc9ba58d7942a83 | | | 135688 bpf: fix pseudoc w regs for small modes [PR111029] | | | 135689 bpf: remove useless define_insn for extendsisi2 | | | 135694 config-list.mk i686-solaris2.11: Use --with-gnu-as | | | 135695 config-list.mk Darwin: Use --with-gnu-as | | | 135707 Remove XFAIL from gcc/testsuite/gcc.dg/unroll-7.c | | | 135708 [V2] RISC-V: Support MASK_LEN_{LOAD_LANES,STORE_LANES} | | | 135709 Loongarch: Fix plugin header missing install. | | | 135714 Makefile.in: Add variable TM_P_H2 for TM_P_H dependency [PR111021] | | | 135720 [v2] RISC-V: Support RVV VFCVT.X.F.V rounding mode intrinsic API | | | 135726 [v2] RISC-V: Support RVV VFCVT.XU.F.V rounding mode intrinsic API | | | 135729 [v2] RISC-V: Support RVV VFCVT.F.X.V and VFCVT.F.XU.V rounding mode intrinsic API | | | 135732 [v2] RISC-V: Support RVV VFWCVT.X.F.V rounding mode intrinsic API | | | 135735 [v2] RISC-V: Support RVV VFWCVT.XU.F.V rounding mode intrinsic API | | | 135736 RISC-V: Support simplify (-1-x) for vector. | | | 135739 [v1] RISC-V: Fix one build error for template default arg | | | 135765 [WIP,RFC,v2] analyzer: Add support of placement new and improved operator new [PR105948] | | | 135756 [v1] RISC-V: Support RVV VFNCVT.X.F.W rounding mode intrinsic API | | | 135758 gimple_fold: Support COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold | | | 135760 RISC-V: Add COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS testcases | | | 135791 [pushed,LRA] : Spill pseudos assigned to fp when fp->sp elimination became impossible | | | 135793 [committed] libstdc++: Fix comment naming upstream PSTL test file | | | 135794 libgccjit: Add support for `restrict` attribute on function parameters | | | 135807 [committed] libstdc++: Update __cplusplus value for C++23 in version.def | | | 135808 [committed] libstdc++: Fix std::basic_string::resize_and_overwrite | | | 135809 build: Allow for Xcode 15 ld -v output | | | 135810 fixincludes: Update darwin_flt_eval_method for macOS 14 | | | 135817 [committed] Fortran: fix memleak for character,value dummy of bind(c) procedure [PR110360] | | | 135819 Drop unused enum vrp_mode. | | | 135830 Add libstdc++-v3/include/bits/version.h to gcc_update touch part | | | 135835 RISC-V: Add rotate immediate regression test | | | 135836 [ver,2] rs6000, add overloaded DFP quantize support | | | 135837 [v2] RISCV: Add rotate immediate regression test | | | 135838 [v1] RISC-V: Support RVV VFNCVT.XU.F.W rounding mode intrinsic API | | | 135839 MATCH: Sink convert for vec_cond | | | 135840 [v1] RISC-V: Support RVV VFNCVT.F.{X|XU|F}.W rounding mode intrinsic API | | | 135842 [v1] RISC-V: Support RVV VFREDUSUM.VS rounding mode intrinsic API | | | 135847 RISC-V: Fix incorrect VTYPE fusion for floating point scalar move insn[PR111037] | | | 135848 Makefile.in: Make TM_P_H depend on $(TREE_H) [PR111021] | | | 135849 vect: Factor out the handling on scatter store having gs_info.decl | | | 135850 [v1] RISC-V: Support RVV VFREDOSUM.VS rounding mode intrinsic API | | | 135853 [1/2,1/2] Support AVX10.1 for AVX512DQ intrins | | | 135852 [2/2,2/2] Support AVX10.1 for AVX512DQ intrins | | | 135854 Fix code_helper unused argument warning for fr30 | | | 135855 [v1] RISC-V: Support RVV VFWREDOSUM.VS rounding mode intrinsic API | | | 135857 [committed] libstdc++: Fix testsuite no_pch directive | | | 135858 [committed] libstdc++: Disable PCH for tests that rely on include order | | | 135859 RISC-V: Forbidden fuse vlmax vsetvl to DEMAND_NONZERO_AVL vsetvl | | | 135861 [v1] RISC-V: Support RVV VFWREDUSUM.VS rounding mode intrinsic API | | | 135870 [1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns | | | 135871 [2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops | | | 135872 doc: Fixes to RTL-SSA sample code | | | 135873 c: Add support for [[__extension__ ...]] | | | 135875 RISC-V: Fix XPASS slp testcases | | | 135878 [committed] libstdc++: Regenerate Makefile.in | | | 135879 [committed] libstdc++: Fix std::format("{:F}", inf) to use uppercase | | | 135881 [V2] RISC-V: Forbidden fuse vlmax vsetvl to DEMAND_NONZERO_AVL vsetvl | | | 135882 [COMMITTED] bpf: support `naked' function attributes in BPF targets | | | 135883 [V2] RISC-V: Add the missed half floating-point mode patterns of local_pic_load/store when only use zfhmin or zhinxmin | | | 135885 tree-optimization/111039 - abnormals and bit test merging | | | 135889 [committed] libgomp: call numa_available first when using libnuma | | | 135892 [V4] Add warning options -W[no-]compare-distinct-pointer-types | | | 135912 [pushed,LRA] : When assigning stack slots to pseudos previously assigned to fp consider other spilled pseudos | | | 135924 [COMMITTED] PR tree-optimization/111009 - Fix range-ops operator_addr. | | | 135934 RISC-V: Implement TLS Descriptors. | | | 135940 Document cond_neg, cond_one_cmpl, cond_len_neg and cond_len_one_cmpl standard patterns | | | 135941 [committed] libstdc++: Define std::string::resize_and_overwrite for C++11 and COW string | | | 135942 [committed] libstdc++: Optimize std::to_string using std::string::resize_and_overwrite | | | 135944 [committed] libstdc++: Implement std::to_string in terms of std::format (P2587R3) | | | 135946 [committed] libstdc++: Rework std::format support for wchar_t | | | 135947 [committed] libstdc++: Simplify chrono::__units_suffix using std::format | | | 135949 [committed] libstdc++: Make __cmp_cat::__unseq constructor consteval | | | 135943 [committed] libstdc++: Fix -Wunused-parameter in | | | 135951 [committed] libstdc++: Define std::numeric_limits<_FloatNN> before C++23 | | | 135952 [committed] libstdc++: Add std::formatter specializations for extended float types | | | 135945 [committed] libstdc++: Optimize std::string::assign(Iter, Iter) [PR110945] | | | 135948 [committed] libstdc++: Micro-optimize construction of named std::locale | | | 135950 [committed] libstdc++: Reuse double overload of __convert_to_v if possible | | | 135962 [committed] libstdc++: Replace global std::string objects in tzdb.cc | | | 135969 testsuite: Improve test in dg-require-python-h | | | 135971 [v1] RISC-V: Refactor RVV class by frm_op_type template arg | | | 135972 RISC-V: Fix -march error of zhinxmin testcases | | | 135975 [v6] libgfortran: Replace mutex with rwlock | | | 135977 [1/2] RISC-V: Add quotes to #error messages | | | 135978 [2/2] RISC-V: Add quotes to #error messages (all) | | | 135984 i386: Add AVX2 pragma wrapper for AVX512DQVL intrins | | | 135985 Support -march=gracemont | | | 135988 tree-optimization/111048 - avoid flawed logic in fold_vec_perm | | | 135989 aarch64: Fine-grained ldp and stp policies with test-cases. | | | 135993 [committed] libstdc++: Fix incomplete rework of wchar_t support in std::format | | | 136013 [committed] libstdc++: Replace non-type-dependent uses of wchar_t in and | | | 136014 [COMMITTED] bpf: bump maximum frame size limit to 32767 bytes | | | 136015 tree-optimization/111019 - invariant motion and aliasing | | | 136019 Emit funcall external declarations only if actually used. | | | 136021 RISC-V: Enable pressure-aware scheduling by default. | | | 136029 [COMMITTED,irange] Return FALSE if updated bitmask is unchanged [PR110753] | | | 136044 [committed] : i386: Use PUNPCKL?? to implement vector extend and zero_extend for TARGET_SSE2 [PR111023] | | | 136045 omp-expand.cc: Fix wrong code with non-rectangular loop nest [PR111017] | | | 136046 [OG13,committed,1/3] OpenMP: C++ attribute syntax fixes/testcases for "metadirective" | | | 136048 [OG13,committed,2/3] OpenMP: C++ attribute syntax fixes/testcases for "declare mapper" | | | 136047 [OG13,committed,3/3] OpenMP: C++ attribute syntax fixes/testcases for loop transformations | | | 136054 RISC-V/testsuite: Add missing conversion tests. | | | 136055 RISC-V: Allow immediates 17-31 for vector shift. | +------------+----------------------------------------------------------------------------------------------------------------------------------------------------------+ + git config pull.rebase false + git fetch origin master From github.com:plctlab/patchwork-gcc * branch master -> FETCH_HEAD + git checkout master Switched to a new branch 'master' branch 'master' set up to track 'origin/master'. + git pull origin master From github.com:plctlab/patchwork-gcc * branch master -> FETCH_HEAD Already up to date. + git fetch origin upstream-master From github.com:plctlab/patchwork-gcc * branch upstream-master -> FETCH_HEAD + git checkout upstream-master Switched to a new branch 'upstream-master' branch 'upstream-master' set up to track 'origin/upstream-master'. + git remote add upstream https://github.com/gcc-mirror/gcc.git + git pull upstream master From https://github.com/gcc-mirror/gcc * branch master -> FETCH_HEAD * [new branch] master -> upstream/master fatal: refusing to merge unrelated histories + git push -u origin upstream-master Everything up-to-date branch 'upstream-master' set up to track 'origin/upstream-master'. + git checkout master Switched to branch 'master' Your branch is up to date with 'origin/master'. + git merge upstream-master fatal: refusing to merge unrelated histories + git push -u origin master Everything up-to-date branch 'master' set up to track 'origin/master'. + branchname=series56011-patch136054 ++ git branch -a ++ grep 'series56011-patch136054$' + checkbranch= + checkbranchresult=null + '[' null = series56011-patch136054 ']' + git checkout -b series56011-patch136054 Switched to a new branch 'series56011-patch136054' ++ curl https://patchwork.plctlab.org/api/1.2/series/56011/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 1380 100 1380 0 0 53076 0 --:--:-- --:--:-- --:--:-- 53076 + series_response='{"id":56011,"url":"https://patchwork.plctlab.org/api/1.2/series/56011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/list/?series=56011","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"RISC-V/testsuite: Add missing conversion tests.","date":"2023-08-18T19:32:03","submitter":{"id":4498,"url":"https://patchwork.plctlab.org/api/1.2/people/4498/","name":"Robin Dapp","email":"rdapp.gcc@gmail.com"},"version":1,"total":1,"received_total":1,"received_all":true,"mbox":"https://patchwork.plctlab.org/series/56011/mbox/","cover_letter":null,"patches":[{"id":136054,"url":"https://patchwork.plctlab.org/api/1.2/patches/136054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T19:32:03","name":"RISC-V/testsuite: Add missing conversion tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/"}]}' ++ jq '.patches[] | (.id|tostring) + "," + .mbox' ++ echo '{"id":56011,"url":"https://patchwork.plctlab.org/api/1.2/series/56011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/list/?series=56011","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"RISC-V/testsuite: Add missing conversion tests.","date":"2023-08-18T19:32:03","submitter":{"id":4498,"url":"https://patchwork.plctlab.org/api/1.2/people/4498/","name":"Robin Dapp","email":"rdapp.gcc@gmail.com"},"version":1,"total":1,"received_total":1,"received_all":true,"mbox":"https://patchwork.plctlab.org/series/56011/mbox/","cover_letter":null,"patches":[{"id":136054,"url":"https://patchwork.plctlab.org/api/1.2/patches/136054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/","msgid":"","list_archive_url":null,"date":"2023-08-18T19:32:03","name":"RISC-V/testsuite: Add missing conversion tests.","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/"}]}' + patchid_patchurl='"136054,https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/"' + echo '"136054,https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/"' + IFS=, + read -r series_patch_id series_patch_url ++ echo '"136054' ++ sed 's/"//g' + series_patch_id=136054 ++ echo 'https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/"' ++ sed 's/"//g' + series_patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/ ++ git rev-parse HEAD + commitid_before=c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a + eval '+++ declare -p bout bret declare -- bout="Applying: RISC-V/testsuite: Add missing conversion tests. Using index info to reconstruct a base tree... A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c Falling back to patching base and 3-way merge... CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c left in tree. error: Failed to merge in the changes. hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 RISC-V/testsuite: Add missing conversion tests. When you have resolved this problem, run \"git am --continue\". If you prefer to skip this patch, run \"git am --skip\" instead. To restore the original branch and stop patching, run \"git am --abort\"." declare -- bret="128" ++ berr='\''++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 31540 100 31540 0 0 1026k 0 --:--:-- --:--:-- --:--:-- 1026k +++ bout='\''\'\'''\''Applying: RISC-V/testsuite: Add missing conversion tests. Using index info to reconstruct a base tree... A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c Falling back to patching base and 3-way merge... CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c left in tree. error: Failed to merge in the changes. hint: Use '\''\'\'''\''\'\''\'\'''\'''\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\''\'\''\'\'''\'''\''\'\'''\'' to see the failed patch Patch failed at 0001 RISC-V/testsuite: Add missing conversion tests. When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\''\'\'''\'' +++ bret=128'\'' ++ declare -p berr declare -- berr="++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 31540 100 31540 0 0 1026k 0 --:--:-- --:--:-- --:--:-- 1026k +++ bout='\''Applying: RISC-V/testsuite: Add missing conversion tests. Using index info to reconstruct a base tree... A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c Falling back to patching base and 3-way merge... CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c left in tree. error: Failed to merge in the changes. hint: Use '\''\\'\'''\''git am --show-current-patch=diff'\''\\'\'''\'' to see the failed patch Patch failed at 0001 RISC-V/testsuite: Add missing conversion tests. When you have resolved this problem, run \"git am --continue\". If you prefer to skip this patch, run \"git am --skip\" instead. To restore the original branch and stop patching, run \"git am --abort\".'\'' +++ bret=128"' ++ +++ declare -p bout bret /tmp/jenkins12158530543693167000.sh: line 129: +++: command not found ++ declare -- 'bout=Applying: RISC-V/testsuite: Add missing conversion tests. Using index info to reconstruct a base tree... A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c Falling back to patching base and 3-way merge... CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c left in tree. error: Failed to merge in the changes. hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 RISC-V/testsuite: Add missing conversion tests. When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' ++ declare -- bret=128 ++ ++ 'berr=++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 31540 100 31540 0 0 1026k 0 --:--:-- --:--:-- --:--:-- 1026k +++ bout='\''Applying: RISC-V/testsuite: Add missing conversion tests. Using index info to reconstruct a base tree... A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c Falling back to patching base and 3-way merge... CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c left in tree. error: Failed to merge in the changes. hint: Use '\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\'' to see the failed patch Patch failed at 0001 RISC-V/testsuite: Add missing conversion tests. When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\'' +++ bret=128' /tmp/jenkins12158530543693167000.sh: line 224: ++: command not found ++ ++ declare -p berr /tmp/jenkins12158530543693167000.sh: line 225: ++: command not found ++ declare -- 'berr=++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 31540 100 31540 0 0 1026k 0 --:--:-- --:--:-- --:--:-- 1026k +++ bout='\''Applying: RISC-V/testsuite: Add missing conversion tests. Using index info to reconstruct a base tree... A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c Falling back to patching base and 3-way merge... CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c left in tree. error: Failed to merge in the changes. hint: Use '\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\'' to see the failed patch Patch failed at 0001 RISC-V/testsuite: Add missing conversion tests. When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\'' +++ bret=128' ++ git rev-parse HEAD + commitid_after=c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a + '[' 128 = 0 ']' + [[ ++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 31540 100 31540 0 0 1026k 0 --:--:-- --:--:-- --:--:-- 1026k +++ bout='Applying: RISC-V/testsuite: Add missing conversion tests. Using index info to reconstruct a base tree... A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c Falling back to patching base and 3-way merge... CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c left in tree. error: Failed to merge in the changes. hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 RISC-V/testsuite: Add missing conversion tests. When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' +++ bret=128 =~ sha1 information is lacking or useless ]] + [[ ++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 31540 100 31540 0 0 1026k 0 --:--:-- --:--:-- --:--:-- 1026k +++ bout='Applying: RISC-V/testsuite: Add missing conversion tests. Using index info to reconstruct a base tree... A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h A gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c Falling back to patching base and 3-way merge... CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c left in tree. CONFLICT (modify/delete): gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c deleted in HEAD and modified in RISC-V/testsuite: Add missing conversion tests.. Version RISC-V/testsuite: Add missing conversion tests. of gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c left in tree. error: Failed to merge in the changes. hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 RISC-V/testsuite: Add missing conversion tests. When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' +++ bret=128 =~ Failed to merge in the changes ]] + submit_check warning Unresolved https://patchwork.plctlab.org/jenkins/job/gcc-patch/10413/consoleText 'Git am fail log' + check_state=warning + patch_state=Unresolved + repo_url=https://patchwork.plctlab.org/jenkins/job/gcc-patch/10413/consoleText + DESCRIPTION='Git am fail log' + curl -X POST -H 'Authorization: Token [*******]' -F state=warning -F target_url=https://patchwork.plctlab.org/jenkins/job/gcc-patch/10413/consoleText -F context=gcc-patch-check -F 'description=Git am fail log' https://patchwork.plctlab.org/api/patches/136054/checks/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 970 100 429 100 541 11594 14621 --:--:-- --:--:-- --:--:-- 26216 {"id":12165,"url":"https://patchwork.plctlab.org/api/patches/136054/checks/12165/","user":{"id":1,"url":"https://patchwork.plctlab.org/api/users/1/","username":"snail","first_name":"","last_name":"","email":"wangliu@iscas.ac.cn"},"date":"2023-08-18T21:18:05.355846","state":"warning","target_url":"https://patchwork.plctlab.org/jenkins/job/gcc-patch/10413/consoleText","context":"gcc-patch-check","description":"Git am fail log"}+ curl -X PATCH -H 'Authorization: Token [*******]' -F state=Unresolved https://patchwork.plctlab.org/api/1.2/patches/136054/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0{"id":136054,"url":"https://patchwork.plctlab.org/api/1.2/patches/136054/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"","list_archive_url":null,"date":"2023-08-18T19:32:03","name":"RISC-V/testsuite: Add missing conversion tests.","commit_ref":null,"pull_url":null,"state":"unresolved","archived":false,"hash":"4771f0b6a3bacd5ec084eb7ba55c6469e1fd3be3","submitter":{"id":4498,"url":"https://patchwork.plctlab.org/api/1.2/people/4498/","name":"Robin Dapp","email":"rdapp.gcc@gmail.com"},"delegate":null,"mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/b10ba845-0699-10f3-6bf8-e6874413a25d@gmail.com/mbox/","series":[{"id":56011,"url":"https://patchwork.plctlab.org/api/1.2/series/56011/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/list/?series=56011","date":"2023-08-18T19:32:03","name":"RISC-V/testsuite: Add missing conversion tests.","version":1,"mbox":"https://patchwork.plctlab.org/series/56011/mbox/"}],"comments":"https://patchwork.plctlab.org/api/patches/136054/comments/","check":"warning","checks":"https://patchwork.plctlab.org/api/patches/136054/checks/","tags":{},"headers":{"Return-Path":"","Delivered-To":["ouuuleilei@gmail.com","gcc-patches@gcc.gnu.org"],"Received":["by 2002:a59:b82d:0:b0:3f2:4152:657d with SMTP id z13csp1628973vqi;\n Fri, 18 Aug 2023 12:33:31 -0700 (PDT)","from server2.sourceware.org (server2.sourceware.org.\n [2620:52:3:1:0:246e:9693:128c])\n by mx.google.com with ESMTPS id\n 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t=1692387174;\n\tbh=N6ONcU1lbQLjWI5eKUNBNf+H+/ab5bvQic7obhNgV8s=;\n\th=Date:Cc:To:Subject:List-Id:List-Unsubscribe:List-Archive:\n\t List-Post:List-Help:List-Subscribe:From:Reply-To:From;\n\tb=VnWuNp1uZ7/eBHFFOrX40O1+bqcYXgwr2LOnyBpyWMuhFC8+S0u+Z5Ar5le6GwJ3c\n\t JbqsJBA9Gtc72jwVdBst9jNdsuuZU0lH4RZFmXbI11ENit1H2GHz/5qTM8wGIY+HlL\n\t 4GWqm6SWV7rNwj8mR6WZygQ4p/ta6qKJvAU4iqkE=","X-Original-To":"gcc-patches@gcc.gnu.org","DMARC-Filter":"OpenDMARC Filter v1.4.2 sourceware.org 1CAD7383138B","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20221208; t=1692387125; x=1692991925;\n h=content-transfer-encoding:subject:from:to:content-language:cc\n :user-agent:mime-version:date:message-id:x-gm-message-state:from:to\n :cc:subject:date:message-id:reply-to;\n bh=N6ONcU1lbQLjWI5eKUNBNf+H+/ab5bvQic7obhNgV8s=;\n b=O2Oh8na7IXMJoRkDHQEXOGYfD5mOpNeKbdkWOzXb42s3RsTHKBXBBTU/h9pIV3i2Db\n 3g6Ucrsb6CqtsgROJjGfEWs0I8cv3KOGnT5/UamCSJQTl197wtg9U0nJ6cEnG85lxnTg\n d9M/LGv8c+wJOVIdTlc3OGAmemPjZdQIk1EIEgPXSYiqWLHlOOV0q8KMXHsi/tMg4Ojj\n SmA9ME5HjqsEEoIJQvvXJXcrsnPusvrJY1lNOb+FBBw+VAXFPyiKkypz81yOCfAzO79j\n c4h5X5Gx+6bXdqz832dbIdbyyu5FxGtgzWzoERP2pc+WtEPMYjlF36kNh9SKDaxzve0b\n EwGw==","X-Gm-Message-State":"AOJu0Yw06WVqgMHMhfMgqwBhEelQgyUtRGtjxIVR6RId1wSnJ9Zq+sOk\n bWQyWYFvqk7LSjxlM7s+BjW9L++zkKA=","Message-ID":"","Date":"Fri, 18 Aug 2023 21:32:03 +0200","MIME-Version":"1.0","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101\n Thunderbird/102.13.0","Cc":"rdapp.gcc@gmail.com","Content-Language":"en-US","To":"gcc-patches , palmer ,\n Kito Cheng , jeffreyalaw ,\n \"juzhe.zhong@rivai.ai\" ","Subject":"[PATCH] RISC-V/testsuite: Add missing conversion tests.","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"7bit","X-Spam-Status":"No, score=-9.2 required=5.0 tests=BAYES_00, DKIM_SIGNED,\n DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0,\n KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS,\n TXREP autolearn=ham autolearn_force=no version=3.4.6","X-Spam-Checker-Version":"SpamAssassin 3.4.6 (2021-04-09) on\n server2.sourceware.org","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","From":"Robin Dapp via Gcc-patches ","Reply-To":"Robin Dapp ","Errors-To":"gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org","Sender":"\"Gcc-patches\" ","X-getmail-retrieved-from-mailbox":"INBOX","X-GMAIL-THRID":"1774596612098184840","X-GMAIL-MSGID":"1774596612098184840"},"content":"Hi,\n\nthis patch adds some missing tests for vf[nw]cvt.\n\nRegards\n Robin\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c:\n\tAdd tests.\n\t* gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c:\n\tDitto.\n\t* gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c:\n\tDitto.\n\t* gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h:\n\tDitto.\n\t* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c:\n\tDitto.\n\t* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c:\n\tDitto.\n\t* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h:\n\tDitto.\n\t* gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c:\n\tDitto.\n\t* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c:\n\tDitto.\n\t* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c:\n\tDitto.\n\t* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h:\n\tDitto.\n\t* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c:\n\tDitto.\n\t* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c:\n\tDitto.\n\t* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c:\n\tDitto.\n\t* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c:\n\tDitto.\n\t* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h:\n\tDitto.\n\t* gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c:\n\tDitto.\n---\n .../rvv/autovec/conversions/vfncvt-ftoi-run.c | 96 +++++++++++++++++++\n .../autovec/conversions/vfncvt-ftoi-rv32gcv.c | 6 +-\n .../autovec/conversions/vfncvt-ftoi-rv64gcv.c | 6 +-\n .../conversions/vfncvt-ftoi-template.h | 6 ++\n .../autovec/conversions/vfncvt-itof-rv32gcv.c | 1 +\n .../autovec/conversions/vfncvt-itof-rv64gcv.c | 4 +-\n .../conversions/vfncvt-itof-template.h | 5 +-\n .../conversions/vfncvt-itof-zvfh-run.c | 32 +++++++\n .../autovec/conversions/vfwcvt-ftoi-rv32gcv.c | 4 +-\n .../autovec/conversions/vfwcvt-ftoi-rv64gcv.c | 4 +-\n .../conversions/vfwcvt-ftoi-template.h | 2 +\n .../conversions/vfwcvt-ftoi-zvfh-run.c | 32 +++++++\n .../rvv/autovec/conversions/vfwcvt-itof-run.c | 96 +++++++++++++++++++\n .../autovec/conversions/vfwcvt-itof-rv32gcv.c | 4 +-\n .../autovec/conversions/vfwcvt-itof-rv64gcv.c | 4 +-\n .../conversions/vfwcvt-itof-template.h | 10 +-\n .../conversions/vfwcvt-itof-zvfh-run.c | 10 +-\n 17 files changed, 302 insertions(+), 20 deletions(-)","diff":"diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c\nindex ce3fcfa9af8..73eda067ba3 100644\n--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c\n+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-run.c\n@@ -62,6 +62,38 @@ main ()\n RUN2 (float, uint16_t, 4096)\n RUN2 (float, uint16_t, 5975)\n \n+ RUN (float, int8_t, 3)\n+ RUN (float, int8_t, 4)\n+ RUN (float, int8_t, 7)\n+ RUN (float, int8_t, 99)\n+ RUN (float, int8_t, 119)\n+ RUN (float, int8_t, 128)\n+ RUN (float, int8_t, 256)\n+ RUN (float, int8_t, 279)\n+ RUN (float, int8_t, 555)\n+ RUN (float, int8_t, 1024)\n+ RUN (float, int8_t, 1389)\n+ RUN (float, int8_t, 2048)\n+ RUN (float, int8_t, 3989)\n+ RUN (float, int8_t, 4096)\n+ RUN (float, int8_t, 5975)\n+\n+ RUN2 (float, uint8_t, 3)\n+ RUN2 (float, uint8_t, 4)\n+ RUN2 (float, uint8_t, 7)\n+ RUN2 (float, uint8_t, 99)\n+ RUN2 (float, uint8_t, 119)\n+ RUN2 (float, uint8_t, 128)\n+ RUN2 (float, uint8_t, 256)\n+ RUN2 (float, uint8_t, 279)\n+ RUN2 (float, uint8_t, 555)\n+ RUN2 (float, uint8_t, 1024)\n+ RUN2 (float, uint8_t, 1389)\n+ RUN2 (float, uint8_t, 2048)\n+ RUN2 (float, uint8_t, 3989)\n+ RUN2 (float, uint8_t, 4096)\n+ RUN2 (float, uint8_t, 5975)\n+\n RUN (double, int32_t, 3)\n RUN (double, int32_t, 4)\n RUN (double, int32_t, 7)\n@@ -93,4 +125,68 @@ main ()\n RUN2 (double, uint32_t, 3989)\n RUN2 (double, uint32_t, 4096)\n RUN2 (double, uint32_t, 5975)\n+\n+ RUN (double, int16_t, 3)\n+ RUN (double, int16_t, 4)\n+ RUN (double, int16_t, 7)\n+ RUN (double, int16_t, 99)\n+ RUN (double, int16_t, 119)\n+ RUN (double, int16_t, 128)\n+ RUN (double, int16_t, 256)\n+ RUN (double, int16_t, 279)\n+ RUN (double, int16_t, 555)\n+ RUN (double, int16_t, 1024)\n+ RUN (double, int16_t, 1389)\n+ RUN (double, int16_t, 2048)\n+ RUN (double, int16_t, 3989)\n+ RUN (double, int16_t, 4096)\n+ RUN (double, int16_t, 5975)\n+\n+ RUN2 (double, uint16_t, 3)\n+ RUN2 (double, uint16_t, 4)\n+ RUN2 (double, uint16_t, 7)\n+ RUN2 (double, uint16_t, 99)\n+ RUN2 (double, uint16_t, 119)\n+ RUN2 (double, uint16_t, 128)\n+ RUN2 (double, uint16_t, 256)\n+ RUN2 (double, uint16_t, 279)\n+ RUN2 (double, uint16_t, 555)\n+ RUN2 (double, uint16_t, 1024)\n+ RUN2 (double, uint16_t, 1389)\n+ RUN2 (double, uint16_t, 2048)\n+ RUN2 (double, uint16_t, 3989)\n+ RUN2 (double, uint16_t, 4096)\n+ RUN2 (double, uint16_t, 5975)\n+\n+ RUN (double, int8_t, 3)\n+ RUN (double, int8_t, 4)\n+ RUN (double, int8_t, 7)\n+ RUN (double, int8_t, 99)\n+ RUN (double, int8_t, 119)\n+ RUN (double, int8_t, 128)\n+ RUN (double, int8_t, 256)\n+ RUN (double, int8_t, 279)\n+ RUN (double, int8_t, 555)\n+ RUN (double, int8_t, 1024)\n+ RUN (double, int8_t, 1389)\n+ RUN (double, int8_t, 2048)\n+ RUN (double, int8_t, 3989)\n+ RUN (double, int8_t, 4096)\n+ RUN (double, int8_t, 5975)\n+\n+ RUN2 (double, uint8_t, 3)\n+ RUN2 (double, uint8_t, 4)\n+ RUN2 (double, uint8_t, 7)\n+ RUN2 (double, uint8_t, 99)\n+ RUN2 (double, uint8_t, 119)\n+ RUN2 (double, uint8_t, 128)\n+ RUN2 (double, uint8_t, 256)\n+ RUN2 (double, uint8_t, 279)\n+ RUN2 (double, uint8_t, 555)\n+ RUN2 (double, uint8_t, 1024)\n+ RUN2 (double, uint8_t, 1389)\n+ RUN2 (double, uint8_t, 2048)\n+ RUN2 (double, uint8_t, 3989)\n+ RUN2 (double, uint8_t, 4096)\n+ RUN2 (double, uint8_t, 5975)\n }\ndiff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c\nindex 4bed5eb7fff..43967af1cd5 100644\n--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c\n+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv32gcv.c\n@@ -1,7 +1,9 @@\n /* { dg-do compile } */\n-/* { dg-additional-options \"-std=c99 -fno-vect-cost-model -march=rv32gcv_zvfh -mabi=ilp32d --param=riscv-autovec-preference=scalable\" } */\n+/* { dg-additional-options \"-std=c99 -fno-vect-cost-model -march=rv32gcv_zvfh -mabi=ilp32d -fno-trapping-math --param=riscv-autovec-preference=scalable\" } */\n \n #include \"vfncvt-ftoi-template.h\"\n \n-/* { dg-final { scan-assembler-times {\\tvfncvt\\.rtz\\.x\\.f\\.w} 3 } } */\n+/* The vectorizer only performs int -> float conversions with\n+ intermediate types with -fno-trapping-math. */\n+/* { dg-final { scan-assembler-times {\\tvfncvt\\.rtz\\.x\\.f\\.w} 9 } } */\n /* { dg-final { scan-assembler-times {\\tvfncvt\\.rtz\\.xu\\.f\\.w} 3 } } */\ndiff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c\nindex 7efc3f31c26..d49370bb925 100644\n--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c\n+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-rv64gcv.c\n@@ -1,7 +1,9 @@\n /* { dg-do compile } */\n-/* { dg-additional-options \"-std=c99 -fno-vect-cost-model -march=rv64gcv_zvfh -mabi=lp64d --param=riscv-autovec-preference=scalable\" } */\n+/* { dg-additional-options \"-std=c99 -fno-vect-cost-model -march=rv64gcv_zvfh -mabi=lp64d -fno-trapping-math --param=riscv-autovec-preference=scalable\" } */\n \n #include \"vfncvt-ftoi-template.h\"\n \n-/* { dg-final { scan-assembler-times {\\tvfncvt\\.rtz\\.x\\.f\\.w} 3 } } */\n+/* The vectorizer only performs int -> float conversions with\n+ intermediate types with -fno-trapping-math. */\n+/* { dg-final { scan-assembler-times {\\tvfncvt\\.rtz\\.x\\.f\\.w} 9 } } */\n /* { dg-final { scan-assembler-times {\\tvfncvt\\.rtz\\.xu\\.f\\.w} 3 } } */\ndiff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h\nindex c6efbf15eca..c334e26e60c 100644\n--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h\n+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-ftoi-template.h\n@@ -11,8 +11,14 @@\n #define TEST_ALL() \\\n TEST (double, int32_t) \\\n TEST (double, uint32_t) \\\n+ TEST (double, int16_t) \\\n+ TEST (double, uint16_t) \\\n+ TEST (double, int8_t) \\\n+ TEST (double, uint8_t) \\\n TEST (float, int16_t)\t\t\t\t\t\t\t \\\n TEST (float, uint16_t)\t\t\t\t\t\t \\\n+ TEST (float, int8_t)\t\t\t\t\t\t\t \\\n+ TEST (float, uint8_t)\t\t\t\t\t\t\t \\\n TEST (_Float16, int8_t)\t\t\t\t\t\t \\\n TEST (_Float16, uint8_t)\t\t\t\t\t\t \\\n \ndiff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c\nindex dd5b95c903d..73e4644658b 100644\n--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c\n+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv32gcv.c\n@@ -3,5 +3,6 @@\n \n #include \"vfncvt-itof-template.h\"\n \n+/* { dg-final { scan-assembler-times {\\tvfcvt\\.f\\.x\\.v} 2 } } */\n /* { dg-final { scan-assembler-times {\\tvfncvt\\.f\\.x\\.w} 2 } } */\n /* { dg-final { scan-assembler-times {\\tvfncvt\\.f\\.xu\\.w} 2 } } */\ndiff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c\nindex b3bdeced81d..e9d31a70e6a 100644\n--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c\n+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-rv64gcv.c\n@@ -3,5 +3,5 @@\n \n #include \"vfncvt-itof-template.h\"\n \n-/* { dg-final { scan-assembler-times {\\tvfncvt\\.f\\.x\\.w} 2 } } */\n-/* { dg-final { scan-assembler-times {\\tvfncvt\\.f\\.xu\\.w} 2 } } */\n+/* { dg-final { scan-assembler-times {\\tvfncvt\\.f\\.x\\.w} 5 } } */\n+/* { dg-final { scan-assembler-times {\\tvfncvt\\.f\\.xu\\.w} 1 } } */\ndiff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h\nindex b06deeb3d72..c427cd167f6 100644\n--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h\n+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-template.h\n@@ -6,12 +6,15 @@\n \t\t\t TYPE1 *restrict a, int n)\t\t \\\n {\t\t\t\t\t\t\t\t \\\n for (int i = 0; i < n; i++)\t\t\t\t\t \\\n- dst[i] = (TYPE2) a[i]; \\\n+ dst[i] = (TYPE2) (a[i] & 0x7ffffffful);\t\t\t \\\n }\n \n+\n #define TEST_ALL()\t\t\t\t\t\t \\\n TEST (int64_t, float)\t\t\t\t\t\t \\\n TEST (uint64_t, float)\t\t\t\t\t \\\n+ TEST (int64_t, _Float16)\t\t\t\t\t \\\n+ TEST (uint64_t, _Float16)\t\t\t\t\t \\\n TEST (int32_t, _Float16)\t\t\t\t\t \\\n TEST (uint32_t, _Float16)\t\t\t\t\t \\\n \ndiff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c\nindex b4e59c65ac7..2fb9b0c7b89 100644\n--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c\n+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfncvt-itof-zvfh-run.c\n@@ -61,4 +61,36 @@ main ()\n RUN2 (uint32_t, _Float16, 3989)\n RUN2 (uint32_t, _Float16, 4096)\n RUN2 (uint32_t, _Float16, 5975)\n+\n+ RUN (int64_t, _Float16, 3)\n+ RUN (int64_t, _Float16, 4)\n+ RUN (int64_t, _Float16, 7)\n+ RUN (int64_t, _Float16, 99)\n+ RUN (int64_t, _Float16, 119)\n+ RUN (int64_t, _Float16, 128)\n+ RUN (int64_t, _Float16, 256)\n+ RUN (int64_t, _Float16, 279)\n+ RUN (int64_t, _Float16, 555)\n+ RUN (int64_t, _Float16, 1024)\n+ RUN (int64_t, _Float16, 1389)\n+ RUN (int64_t, _Float16, 2048)\n+ RUN (int64_t, _Float16, 3989)\n+ RUN (int64_t, _Float16, 4096)\n+ RUN (int64_t, _Float16, 5975)\n+\n+ RUN2 (uint64_t, _Float16, 3)\n+ RUN2 (uint64_t, _Float16, 4)\n+ RUN2 (uint64_t, _Float16, 7)\n+ RUN2 (uint64_t, _Float16, 99)\n+ RUN2 (uint64_t, _Float16, 119)\n+ RUN2 (uint64_t, _Float16, 128)\n+ RUN2 (uint64_t, _Float16, 256)\n+ RUN2 (uint64_t, _Float16, 279)\n+ RUN2 (uint64_t, _Float16, 555)\n+ RUN2 (uint64_t, _Float16, 1024)\n+ RUN2 (uint64_t, _Float16, 1389)\n+ RUN2 (uint64_t, _Float16, 2048)\n+ RUN2 (uint64_t, _Float16, 3989)\n+ RUN2 (uint64_t, _Float16, 4096)\n+ RUN2 (uint64_t, _Float16, 5975)\n }\ndiff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c\nindex ce2bea48067..0ab42af6d70 100644\n--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c\n+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv32gcv.c\n@@ -1,7 +1,7 @@\n /* { dg-do compile } */\n-/* { dg-additional-options \"-std=c99 -fno-vect-cost-model -march=rv32gcv_zvfh -mabi=ilp32d --param=riscv-autovec-preference=scalable\" } */\n+/* { dg-additional-options \"-std=c99 -fno-vect-cost-model -march=rv32gcv_zvfh -mabi=ilp32d -fno-trapping-math --param=riscv-autovec-preference=scalable\" } */\n \n #include \"vfwcvt-ftoi-template.h\"\n \n-/* { dg-final { scan-assembler-times {\\tvfwcvt\\.rtz\\.x\\.f\\.v} 2 } } */\n+/* { dg-final { scan-assembler-times {\\tvfwcvt\\.rtz\\.x\\.f\\.v} 4 } } */\n /* { dg-final { scan-assembler-times {\\tvfwcvt\\.rtz\\.xu\\.f\\.v} 2 } } */\ndiff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c\nindex 99aa3de4281..e1a4b631423 100644\n--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c\n+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-rv64gcv.c\n@@ -1,7 +1,7 @@\n /* { dg-do compile } */\n-/* { dg-additional-options \"-std=c99 -fno-vect-cost-model -march=rv64gcv_zvfh -mabi=lp64d --param=riscv-autovec-preference=scalable\" } */\n+/* { dg-additional-options \"-std=c99 -fno-vect-cost-model -march=rv64gcv_zvfh -mabi=lp64d -fno-trapping-math --param=riscv-autovec-preference=scalable\" } */\n \n #include \"vfwcvt-ftoi-template.h\"\n \n-/* { dg-final { scan-assembler-times {\\tvfwcvt\\.rtz\\.x\\.f\\.v} 2 } } */\n+/* { dg-final { scan-assembler-times {\\tvfwcvt\\.rtz\\.x\\.f\\.v} 4 } } */\n /* { dg-final { scan-assembler-times {\\tvfwcvt\\.rtz\\.xu\\.f\\.v} 2 } } */\ndiff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h\nindex a276351bf69..aef03859d2b 100644\n--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h\n+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-template.h\n@@ -9,6 +9,8 @@\n }\n \n #define TEST_ALL() \\\n+ TEST (_Float16, int64_t) \\\n+ TEST (_Float16, uint64_t) \\\n TEST (_Float16, int32_t) \\\n TEST (_Float16, uint32_t) \\\n TEST (float, int64_t)\t\t\t\t\t\t\t \\\ndiff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c\nindex 15bcd05b592..5bf4bc99037 100644\n--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c\n+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-ftoi-zvfh-run.c\n@@ -61,4 +61,36 @@ main ()\n RUN2 (_Float16, uint32_t, 3989)\n RUN2 (_Float16, uint32_t, 4096)\n RUN2 (_Float16, uint32_t, 5975)\n+\n+ RUN (_Float16, int64_t, 3)\n+ RUN (_Float16, int64_t, 4)\n+ RUN (_Float16, int64_t, 7)\n+ RUN (_Float16, int64_t, 99)\n+ RUN (_Float16, int64_t, 119)\n+ RUN (_Float16, int64_t, 128)\n+ RUN (_Float16, int64_t, 256)\n+ RUN (_Float16, int64_t, 279)\n+ RUN (_Float16, int64_t, 555)\n+ RUN (_Float16, int64_t, 1024)\n+ RUN (_Float16, int64_t, 1389)\n+ RUN (_Float16, int64_t, 2048)\n+ RUN (_Float16, int64_t, 3989)\n+ RUN (_Float16, int64_t, 4096)\n+ RUN (_Float16, int64_t, 5975)\n+\n+ RUN2 (_Float16, uint64_t, 3)\n+ RUN2 (_Float16, uint64_t, 4)\n+ RUN2 (_Float16, uint64_t, 7)\n+ RUN2 (_Float16, uint64_t, 99)\n+ RUN2 (_Float16, uint64_t, 119)\n+ RUN2 (_Float16, uint64_t, 128)\n+ RUN2 (_Float16, uint64_t, 256)\n+ RUN2 (_Float16, uint64_t, 279)\n+ RUN2 (_Float16, uint64_t, 555)\n+ RUN2 (_Float16, uint64_t, 1024)\n+ RUN2 (_Float16, uint64_t, 1389)\n+ RUN2 (_Float16, uint64_t, 2048)\n+ RUN2 (_Float16, uint64_t, 3989)\n+ RUN2 (_Float16, uint64_t, 4096)\n+ RUN2 (_Float16, uint64_t, 5975)\n }\ndiff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c\nindex b9287f69558..a90faef462f 100644\n--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c\n+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-run.c\n@@ -30,6 +30,70 @@\n int\n main ()\n {\n+ RUN (int8_t, float, 3)\n+ RUN (int8_t, float, 4)\n+ RUN (int8_t, float, 7)\n+ RUN (int8_t, float, 99)\n+ RUN (int8_t, float, 119)\n+ RUN (int8_t, float, 128)\n+ RUN (int8_t, float, 256)\n+ RUN (int8_t, float, 279)\n+ RUN (int8_t, float, 555)\n+ RUN (int8_t, float, 1024)\n+ RUN (int8_t, float, 1389)\n+ RUN (int8_t, float, 2048)\n+ RUN (int8_t, float, 3989)\n+ RUN (int8_t, float, 4096)\n+ RUN (int8_t, float, 5975)\n+\n+ RUN2 (uint8_t, float, 3)\n+ RUN2 (uint8_t, float, 4)\n+ RUN2 (uint8_t, float, 7)\n+ RUN2 (uint8_t, float, 99)\n+ RUN2 (uint8_t, float, 119)\n+ RUN2 (uint8_t, float, 128)\n+ RUN2 (uint8_t, float, 256)\n+ RUN2 (uint8_t, float, 279)\n+ RUN2 (uint8_t, float, 555)\n+ RUN2 (uint8_t, float, 1024)\n+ RUN2 (uint8_t, float, 1389)\n+ RUN2 (uint8_t, float, 2048)\n+ RUN2 (uint8_t, float, 3989)\n+ RUN2 (uint8_t, float, 4096)\n+ RUN2 (uint8_t, float, 5975)\n+\n+ RUN (int8_t, double, 3)\n+ RUN (int8_t, double, 4)\n+ RUN (int8_t, double, 7)\n+ RUN (int8_t, double, 99)\n+ RUN (int8_t, double, 119)\n+ RUN (int8_t, double, 128)\n+ RUN (int8_t, double, 256)\n+ RUN (int8_t, double, 279)\n+ RUN (int8_t, double, 555)\n+ RUN (int8_t, double, 1024)\n+ RUN (int8_t, double, 1389)\n+ RUN (int8_t, double, 2048)\n+ RUN (int8_t, double, 3989)\n+ RUN (int8_t, double, 4096)\n+ RUN (int8_t, double, 5975)\n+\n+ RUN2 (uint8_t, double, 3)\n+ RUN2 (uint8_t, double, 4)\n+ RUN2 (uint8_t, double, 7)\n+ RUN2 (uint8_t, double, 99)\n+ RUN2 (uint8_t, double, 119)\n+ RUN2 (uint8_t, double, 128)\n+ RUN2 (uint8_t, double, 256)\n+ RUN2 (uint8_t, double, 279)\n+ RUN2 (uint8_t, double, 555)\n+ RUN2 (uint8_t, double, 1024)\n+ RUN2 (uint8_t, double, 1389)\n+ RUN2 (uint8_t, double, 2048)\n+ RUN2 (uint8_t, double, 3989)\n+ RUN2 (uint8_t, double, 4096)\n+ RUN2 (uint8_t, double, 5975)\n+\n RUN (int16_t, float, 3)\n RUN (int16_t, float, 4)\n RUN (int16_t, float, 7)\n@@ -62,6 +126,38 @@ main ()\n RUN2 (uint16_t, float, 4096)\n RUN2 (uint16_t, float, 5975)\n \n+ RUN (int16_t, double, 3)\n+ RUN (int16_t, double, 4)\n+ RUN (int16_t, double, 7)\n+ RUN (int16_t, double, 99)\n+ RUN (int16_t, double, 119)\n+ RUN (int16_t, double, 128)\n+ RUN (int16_t, double, 256)\n+ RUN (int16_t, double, 279)\n+ RUN (int16_t, double, 555)\n+ RUN (int16_t, double, 1024)\n+ RUN (int16_t, double, 1389)\n+ RUN (int16_t, double, 2048)\n+ RUN (int16_t, double, 3989)\n+ RUN (int16_t, double, 4096)\n+ RUN (int16_t, double, 5975)\n+\n+ RUN2 (uint16_t, double, 3)\n+ RUN2 (uint16_t, double, 4)\n+ RUN2 (uint16_t, double, 7)\n+ RUN2 (uint16_t, double, 99)\n+ RUN2 (uint16_t, double, 119)\n+ RUN2 (uint16_t, double, 128)\n+ RUN2 (uint16_t, double, 256)\n+ RUN2 (uint16_t, double, 279)\n+ RUN2 (uint16_t, double, 555)\n+ RUN2 (uint16_t, double, 1024)\n+ RUN2 (uint16_t, double, 1389)\n+ RUN2 (uint16_t, double, 2048)\n+ RUN2 (uint16_t, double, 3989)\n+ RUN2 (uint16_t, double, 4096)\n+ RUN2 (uint16_t, double, 5975)\n+\n RUN (int32_t, double, 3)\n RUN (int32_t, double, 4)\n RUN (int32_t, double, 7)\ndiff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c\nindex 898b9c17231..cf180992c5d 100644\n--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c\n+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv32gcv.c\n@@ -3,5 +3,7 @@\n \n #include \"vfwcvt-itof-template.h\"\n \n-/* { dg-final { scan-assembler-times {\\tvfwcvt\\.f\\.x\\.v} 3 } } */\n+/* Conversions that the vectorizer does via multiple intermediate\n+ types end up as signed conversions. */\n+/* { dg-final { scan-assembler-times {\\tvfwcvt\\.f\\.x\\.v} 9 } } */\n /* { dg-final { scan-assembler-times {\\tvfwcvt\\.f\\.xu\\.v} 3 } } */\ndiff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c\nindex e177b63738c..b1153887bd8 100644\n--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c\n+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-rv64gcv.c\n@@ -3,5 +3,7 @@\n \n #include \"vfwcvt-itof-template.h\"\n \n-/* { dg-final { scan-assembler-times {\\tvfwcvt\\.f\\.x\\.v} 3 } } */\n+/* Conversions that the vectorizer does via multiple intermediate\n+ types end up as signed conversions. */\n+/* { dg-final { scan-assembler-times {\\tvfwcvt\\.f\\.x\\.v} 9 } } */\n /* { dg-final { scan-assembler-times {\\tvfwcvt\\.f\\.xu\\.v} 3 } } */\ndiff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h\nindex bd6d2387063..e78647f63a0 100644\n--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h\n+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-template.h\n@@ -10,11 +10,17 @@\n }\n \n #define TEST_ALL()\t\t\t\t\t\t \\\n+ TEST (i 100 34314 100 34164 100 150 556k 2500 --:--:-- --:--:-- --:--:-- 558k nt8_t, _Float16)\t\t\t\t\t \\\n+ TEST (uint8_t, _Float16)\t\t\t\t\t \\\n+ TEST (int8_t, float)\t\t\t\t\t\t \\\n+ TEST (uint8_t, float)\t\t\t\t\t\t \\\n+ TEST (int8_t, double)\t\t\t\t\t\t \\\n+ TEST (uint8_t, double)\t\t\t\t\t \\\n TEST (int16_t, float)\t\t\t\t\t\t \\\n TEST (uint16_t, float)\t\t\t\t\t \\\n+ TEST (int16_t, double)\t\t\t\t\t \\\n+ TEST (uint16_t, double)\t\t\t\t\t \\\n TEST (int32_t, double)\t\t\t\t\t \\\n TEST (uint32_t, double)\t\t\t\t\t \\\n- TEST (int8_t, _Float16)\t\t\t\t\t \\\n- TEST (uint8_t, _Float16)\t\t\t\t\t \\\n \n TEST_ALL ()\ndiff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c\nindex f89dc46d65f..15e33200f10 100644\n--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c\n+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/conversions/vfwcvt-itof-zvfh-run.c\n@@ -37,9 +37,9 @@ main ()\n RUN (int8_t, _Float16, 20)\n RUN (int8_t, _Float16, 27)\n \n- RUN (int8_t, _Float16, 4)\n- RUN (int8_t, _Float16, 8)\n- RUN (int8_t, _Float16, 11)\n- RUN (int8_t, _Float16, 29)\n- RUN (int8_t, _Float16, 49)\n+ RUN (uint8_t, _Float16, 4)\n+ RUN (uint8_t, _Float16, 8)\n+ RUN (uint8_t, _Float16, 11)\n+ RUN (uint8_t, _Float16, 29)\n+ RUN (uint8_t, _Float16, 49)\n }\n","prefixes":[]}+ exit 1 Build step 'Execute shell' marked build as failure Finished: FAILURE