Started by user snail Running as SYSTEM [EnvInject] - Loading node environment variables. Building remotely on docker-jenkins-agent in workspace /home/jenkins/agent/workspace/gcc-patch [WS-CLEANUP] Deleting project workspace... [WS-CLEANUP] Deferred wipeout is used... [WS-CLEANUP] Done The recommended git tool is: NONE using credential 0adb5fc7-caa2-429d-97d2-c7fa2fa1d884 Cloning the remote Git repository Using shallow clone with depth 1 Avoid fetching tags Cloning repository git@github.com:plctlab/patchwork-gcc.git > git init /home/jenkins/agent/workspace/gcc-patch # timeout=10 Fetching upstream changes from git@github.com:plctlab/patchwork-gcc.git > git --version # timeout=10 > git --version # 'git version 2.37.2' using GIT_SSH to set credentials patchwork github wangliu-iscas git ssh key Verifying host key using known hosts file, will automatically accept unseen keys > git fetch --no-tags --force --progress --depth=1 -- git@github.com:plctlab/patchwork-gcc.git +refs/heads/*:refs/remotes/origin/* # timeout=10 > git config remote.origin.url git@github.com:plctlab/patchwork-gcc.git # timeout=10 > git config --add remote.origin.fetch +refs/heads/*:refs/remotes/origin/* # timeout=10 Avoid second fetch > git rev-parse refs/remotes/origin/master^{commit} # timeout=10 Checking out Revision c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a (refs/remotes/origin/master) > git config core.sparsecheckout # timeout=10 > git checkout -f c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a # timeout=10 Commit message: "RISC-V: Reorganize binary autovec testcases" > git rev-list --no-walk c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a # timeout=10 [EnvInject] - Mask passwords that will be passed as build parameters. [EnvInject] - Executing scripts and injecting environment variables after the SCM step. [EnvInject] - Injecting as environment variables the properties content GITHUB_REPO=https://github.com/plctlab/patchwork-gcc PATCHWORK_URL=https://patchwork.plctlab.org [EnvInject] - Variables injected successfully. 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https://patchwork.plctlab.org/bundle/patchwork-bot/gcc-patch_2023-08/ | | Owner | patchwork-bot | | Project | gcc-patch | | Public | True | | Patches | 128781 [COMMITTED] PR tree-optimization/110582 - fur_list should not use the range vector for non-ssa, operands. | | | 128790 ipa-sra: Don't consider CLOBBERS as writes preventing splitting | | | 128800 [COMMITTEDv3] tree-optimization: [PR100864] `(a&!b) | b` is not opimized to `a | b` for comparisons | | | 128809 [1/2] Move `~X & X` and `~X | X` over to use bitwise_inverted_equal_p | | | 128810 [2/2] Slightly improve bitwise_inverted_equal_p comparisons | | | 128860 PHIOPT: Mark the conditional lhs and rhs as to look at to see if DCEable | | | 128879 c++: parser cleanup, remove dummy arguments | | | 128924 libbacktrace patch committed | | | 128925 [COMMITTEDv2] Fix PR 93044: extra cast is not removed | | | 128929 c++: improve debug_tree for templated types/decls | | | 128930 tree-pretty-print: handle COMPONENT_REF with non-decl RHS | | | 128958 preprocessor: c++: Support `#pragma GCC target' macros [PR87299] | | | 128992 Adjust testcase for more optimal codegen. | | | 128993 x86: fold two of vec_dupv2df's alternatives | | | 128994 [RESEND] libatomic: drop redundant all-multi command | | | 129013 [V3] VECT: Support CALL vectorization for COND_LEN_* | | | 129032 [v1] RISC-V: Support RVV VFSUB and VFRSUB rounding mode intrinsic API | | | 129062 [COMMITTED] ada: Emit SCOs for nested decisions in quantified expressions | | | 129059 [COMMITTED] ada: check Atree.Get/Set_Field_Value | | | 129060 [COMMITTED] ada: Fix generation of JSON output for data representation | | | 129061 [COMMITTED] ada: Default Put_Image for composite derived types is missing information | | | 129063 [COMMITTED] ada: Incorrect optimization for unconstrained limited record component type | | | 129065 [COMMITTED] ada: Bugbox compiling Constrained_Protected_Object'Image | | | 129066 [COMMITTED] ada: Disable inlining of subprograms with Skip(_Flow_And)_Proof in GNATprove | | | 129064 [COMMITTED] ada: Fix printing of numbers in JSON output for data representation | | | 129069 [PING^1,v8] tree-ssa-sink: Improve code sinking pass. | | | 129071 [PING^3] PATCH v5 4/4] ree: Improve ree pass for rs6000 target using defined ABI interfaces. | | | 129072 PING^3] [PATCH 3/4] ree: Improve functionality of ree pass for rs6000 target. | | | 129085 [COMMITTED] doc: Fix spelling in arm_v8_1m_main_cde_mve_fp | | | 129108 MAINTAINERS: correct my email address | | | 129129 Fix profile upate after vectorizer peeling | | | 129294 [avr,committed] Fix PR target/110220: Set JUMP_LABEL as required. | | | 129315 analyzer: stash values for CPython plugin [PR107646] | | | 129317 [committed] MAINTAINERS: Add myself to write after approval | | | 129323 RISC-V: Implement vector "average" autovec pattern. | | | 129355 [OpenACC,2.7,v2] Implement default clause support for data constructs | | | 129381 arm: Remove unsigned variant of vcaddq_m | | | 129416 [v2] rs6000: Fix __builtin_altivec_vcmpne{b,h,w} implementation | | | 129425 [1/2] bpf: Implementation of BPF CO-RE builtins | | | 129424 [2/2] bpf: CO-RE builtins support tests. | | | 129439 [Committed] IBM Z: Handle unaligned symbols | | | 129445 match.pd: Canonicalize (signed x << c) >> c [PR101955] | | | 129447 match.pd: Canonicalize (signed x << c) >> c [PR101955] | | | 129456 [v4] i386: Allow -mlarge-data-threshold with -mcmodel=large | | | 129538 Support vec_fmaddsub/vec_fmsubadd for vector HFmode. | | | 129545 Optimize vlddqu + inserti128 to vbroadcasti128 | | | 129546 [v3,RISC-V] Generate Zicond instruction for select pattern with condition eq or neq to 0 | | | 129561 [v1] RISC-V: Support RVV VFWADD rounding mode intrinsic API | | | 129613 [committed,RISC-V] Avoid sub-word mode comparisons with Zicond | | | 129630 [v2] RISC-V: Support RVV VFWADD rounding mode intrinsic API | | | 129669 Fix profile update after cancelled loop distribution | | | 129689 [v1] RISC-V: Enhance the test case for RVV vfsub/vfrsub rounding | | | 129708 Enable tpause Exponential backoff and thread delay | | | 129717 [v3] mklog: handle Signed-off-by, minor cleanup | | | 129735 [1/3,v2] Support get_or_insert in ordered_hash_map | | | 129736 [2/3,v2] genmatch: Reduce variability of generated code | | | 129737 [3/3,v2] genmatch: Log line numbers indirectly | | | 129743 [v1] RISC-V: Support RVV VFWSUB rounding mode intrinsic API | | | 129746 AArch64 update costing for MLA by invariant | | | 129747 AArch64 update costing for combining vector conditionals | | | 129751 AArch64 Undo vec_widen_shiftl optabs [PR106346] | | | 129752 [gensupport] : Don't segfault on empty attrs list | | | 129788 Make add_phi_node_to_bb static | | | 129796 aarch64: SVE/NEON Bridging intrinsics | | | 129816 [1/2] Add virtual operand global liveness computation class | | | 129817 [2/2] Improve sinking with unrelated defs | | | 129850 PR combine/110867 Fix narrow comparison of memory and constant | | | 129925 arm/aarch64: Add bti for all functions [PR106671] | | | 129930 _BitInt bit-field support [PR102989] | | | 129933 [v2] analyzer: stash values for CPython plugin [PR107646] | | | 129934 match.pd: Canonicalize (signed x << c) >> c [PR101955] | | | 129991 [v2,1/3] libgomp, nvptx: low-latency memory allocator | | | 129989 [v2,2/3] openmp, nvptx: low-lat memory access traits | | | 129993 [v2,3/3] amdgcn, libgomp: low-latency allocator | | | 129998 [committed,RISC-V] Fix 20010221-1.c with zicond | | | 130057 [v3] analyzer: stash values for CPython plugin [PR107646] | | | 130167 [x86] PR target/110792: Early clobber issues with rot32di2_doubleword. | | | 130218 MATCH: first of the value replacement moving from phiopt | | | 130238 [v1] RISC-V: Support RVV VFMUL rounding mode intrinsic API | | | 130243 [V2] RISC-V: Support CALL conditional autovec patterns | | | 130245 [v1] RISC-V: Remove redudant extern declaration in function base | | | 130258 Fix `~X & X` and `~X | X` patterns | | | 130259 [v2] RISC-V: Support RVV VFMUL rounding mode intrinsic API | | | 130261 Fix PR 110874: infinite loop in gimple_bitwise_inverted_equal_p with fre | | | 130268 [V4] VECT: Support CALL vectorization for COND_LEN_* | | | 130290 [RFC] Combine zero_extract and sign_extend for TARGET_TRULY_NOOP_TRUNCATION | | | 130294 [v1] RISC-V: Support RVV VFDIV and VFRDIV rounding mode intrinsic API | | | 130317 [v1] RISC-V: Support RVV VFWMUL rounding mode intrinsic API | | | 130325 s390: Enable vect_bswap test cases | | | 130326 s390: Try to emit vlbr/vstbr instead of vperm et al. | | | 130341 [x86] Split SUBREGs of SSE vector registers into vec_select insns. | | | 130343 Introduce -msmp to select /lib_smp/ on ppc-vx6 | | | 130376 [01/10] x86: "prefix_extra" tidying | | | 130377 [02/10] x86: "sse4arg" adjustments | | | 130380 [03/10] x86: "ssemuladd" adjustments | | | 130379 [04/10] x86: "prefix_extra" can't really be "2" | | | 130386 [05/10] x86: replace/correct bogus "prefix_extra" | | | 130389 [06/10] x86: drop stray "prefix_extra" | | | 130381 [07/10] x86: add (adjust) XOP insn attributes | | | 130393 [08/10] x86: add missing "prefix" attribute to VF{,C}MULC | | | 130385 [09/10] x86: correct "length_immediate" in a few cases | | | 130398 [10/10] x86: drop redundant "prefix_data16" attributes | | | 130440 Swap loop splitting and final value replacement | | | 130444 [v3,RFC] c-family: Implement __has_feature and __has_extension [PR60512] | | | 130459 c-family: Add _BitInt support for __atomic_*fetch* [PR102989] | | | 130478 [RFC] c++: extend cold, hot attributes to classes | | | 130482 [v3,1/8] LoongArch: Add Loongson SX vector directive compilation framework. | | | 130488 [v3,2/8] LoongArch: Add Loongson SX base instruction support. | | | 130485 [v3,3/8] LoongArch: Add Loongson SX directive builtin function support. | | | 130483 [v3,4/8] LoongArch: Add Loongson ASX vector directive compilation framework. | | | 130486 [v3,5/8] LoongArch: Add Loongson ASX base instruction support. | | | 130484 [v3,6/8] LoongArch: Add Loongson ASX directive builtin function support. | | | 130534 [COMMITTED] ada: Adjust again address arithmetics in System.Dwarf_Lines | | | 130533 [COMMITTED] ada: Fix spurious error on 'Input of private type with Type_Invariant aspect | | | 130536 [COMMITTED] ada: Rewrite Set_Image_*_Unsigned routines to remove recursion. | | | 130535 [COMMITTED] ada: Add pragma Annotate for GNATcheck exemptions | | | 130542 tree-optimization/110702 - avoid zero-based memory references in IVOPTs | | | 130559 poly_int: Handle more can_div_trunc_p cases | | | 130584 [libbacktrace] fix up broken test | | | 130609 mid-end: Use integral time intervals in timevar.cc | | | 130625 [committed] analyzer: fix ICE on zero-sized arrays [PR110882] | | | 130661 [1/3,v3] Support get_or_insert in ordered_hash_map | | | 130659 [2/3,v3] genmatch: Reduce variability of generated code | | | 130660 [3/3,v3] genmatch: Log line numbers indirectly | | | 130663 [v1] RISC-V: Fix one comment for binop_frm insn | | | 130669 [v1] RISC-V: Support RVV VFMACC rounding mode intrinsic API | | | 130673 [committed] testsuite, analyzer: add test case [PR108171] | | | 130676 [committed,RISC-V] Remove errant hunk of code | | | 130729 Add documentation for -Wflex-array-member-not-at-end. | | | 130733 [PATCHv2] Fix PR 110874: infinite loop in gimple_bitwise_inverted_equal_p with fre | | | 130784 [COMMITTED] Automatically set type is certain Value_Range routines. | | | 130785 [COMMITTED] Provide a routine for NAME == NAME relation. | | | 130787 [COMMITTED] Add operand ranges to op1_op2_relation API. | | | 130814 Specify signed/unsigned/dontcare in calls to extract_bit_field_1. | | | 130846 Fix profiledbootstrap | | | 130849 Update estimated iteraitons counts after splitting | | | 130919 [v1] RISC-V: Support RVV VFNMACC rounding mode intrinsic API | | | 130933 [v1] RISC-V: Support RVV VFMSAC rounding mode intrinsic API | | | 130942 [v1] RISC-V: Support RVV VFNMSAC rounding mode intrinsic API | | | 130970 [C] _Generic should not warn in non-active branches [PR68193,PR97100] | | | 130973 [v1] RISC-V: Support RVV VFMADD rounding mode intrinsic API | | | 130984 Disable loop distribution for loops with estimated iterations 0 | | | 131023 [avr,committed] Fix some typos in avr-mcus.def | | | 131024 [avr,committed] Add some more devices to avr-mcus.def. | | | 131054 mid-end: Use integral time intervals in timevar.cc | | | 131068 tree-optimization/110838 - less aggressively fold out-of-bound shifts | | | 131072 tree-optimization/110838 - vectorization of widened right shifts | | | 131170 [pushed,LRA] Check input insn pattern hard regs against early clobber hard regs for live info | | | 131215 libatomic: Improve ifunc selection on AArch64 | | | 131284 Add -Wdisabled-optimization warning for not optimizing sibling calls | | | 131295 _Decimal* to _BitInt conversion support [PR102989] | | | 131320 [V2,1/3] Provide counted_by attribute to flexible array member field (PR108896) | | | 131321 [V2,2/3] Use the counted_by atribute info in builtin object size [PR108896] | | | 131322 [V2,3/3] Use the counted_by attribute information in bound sanitizer[PR108896] | | | 131340 [pushed] analyzer: fix some svalue::dump_to_pp implementations | | | 131341 [pushed] analyzer: handle function attribute "alloc_size" [PR110426] | | | 131372 match.pd: Implement missed optimization ((x ^ y) & z) | x -> (z & y) | x [PR109938] | | | 131497 | | | 131500 [committed] c: Less warnings for parameters declared as arrays [PR98536] | | | 131504 [C] Support typename as selector in _Generic | | | 131546 MATCH: Extend min_value/max_value to pointer types | | | 131559 [v1] RISC-V: Refactor RVV frm_mode attr for rounding mode intrinsic | | | 131580 [committed,_GLIBCXX_INLINE_VERSION] Add __cxa_call_terminate symbol export | | | 131586 [1/9] LoongArch: Introduce loongarch32 target | | | 131581 [2/9] LoongArch: Fix default ISA setting | | | 131582 [3/9] LoongArch: Fix SI division for loongarch32 target | | | 131583 [4/9] LoongArch: Fix movgr2frh.w operand order | | | 131587 [5/9] LoongArch: Fix 64-bit move for loongarch32 target | | | 131589 [6/9] LoongArch: Fix 64-bit immediate move for loongarch32 target | | | 131584 [7/9] LoongArch: Fix signed 32-bit overflow for loongarch32 target | | | 131585 [8/9] LoongArch: Do not emit SF/DF <-> DI conversion in loongarch32 | | | 131588 [9/9] LoongArch: Add: Add -march=loongarch64 to tests with -mabi=lp64d | | | 131624 c++: follow DR 2386 and update implementation of get_tuple_size [PR110216] | | | 131626 Fix profile update after peeled epilogues | | | 131629 [Committed] Avoid FAIL of gcc.target/i386/pr110792.c | | | 131630 Fix profile update after versioning ifconverted loop | | | 131657 [v1] LoongArch:Implement 128-bit floating point functions in gcc. | | | 131666 MATCH: [PR109959] `(uns <= 1) & uns` could be optimized to `uns == 1` | | | 131721 PR target/107671: Make more use of btl/btq on x86_64. | | | 131754 Fix ICE in rtl check when bootstrap. | | | 131755 i386: Clear upper bits of XMM register for V4HFmode/V2HFmode operations [PR110762] | | | 131759 libsanitizer: Fix SPARC stacktraces | | | 131766 RISC-V: Support VLS basic operation auto-vectorization | | | 131768 [V4] VECT: Support CALL vectorization for COND_LEN_* | | | 131769 tree-optimization/110897 - Fix missed vectorization of shift on both RISC-V and aarch64 | | | 131778 [1/3,v4] Support get_or_insert in ordered_hash_map | | | 131780 [2/3,v4] genmatch: Reduce variability of generated code | | | 131779 [3/3,v4] genmatch: Log line numbers indirectly | | | 131784 fwprop: Allow UNARY_P and check register pressure. | | | 131804 [01/24] toplevel: Substitute GDCFLAGS instead of using CFLAGS | | | 131810 [02/24] PR29961, plugin-api.h: "Could not detect architecture endianess" | | | 131807 [03/24] gcc-4.5 build fixes | | | 131822 [04/24] Sync with binutils: GCC: Pass --plugin to AR and RANLIB | | | 131818 [05/24] GCC: Check if AR works with --plugin and rc | | | 131811 [06/24] toplevel: Recover tilegx/tilepro targets | | | 131815 [07/24] binutils, gdb: support zstd compressed debug sections | | | 131814 [08/24] configure: require libzstd >= 1.4.0 | | | 131806 [09/24] add --enable-default-compressed-debug-sections-algorithm configure option | | | 131835 [10/24] gprofng: a new GNU profiler | | | 131809 [11/24] Disable year 2038 support on 32-bit hosts by default | | | 131819 [12/24] Pass PKG_CONFIG_PATH down from top-level Makefile | | | 131854 [13/24] configure: reinstate 32b PA-RISC HP-UX target in toplevel | | | 131858 [14/24] libtool.m4: fix nm BSD flag detection | | | 131853 [15/24] libtool.m4: fix the NM="/nm/over/here -B/option/with/path" case | | | 131856 [16/24] Add support for the haiku operating system | | | 131827 [17/24] egrep in binutils | | | 131820 [18/24] PR27116, Spelling errors found by Debian style checker | | | 131865 [19/24] Deprecate a.out support for NetBSD targets. | | | 131825 [20/24] PKG_CHECK_MODULES: Check if $pkg_cv_[]$1[]_LIBS works | | | 131824 [21/24] PKG_CHECK_MODULES: Properly check if $pkg_cv_[]$1[]_LIBS works | | | 131868 [22/24] libtool.m4: augment symcode for Solaris 11 | | | 131837 [23/24] bfd: linker: merge .sframe sections | | | 131859 [24/24] toplevel: Makefile.def: add install-strip dependency on libsframe | | | 131798 [COMMITTED] ada: Spurious error on class-wide preconditions | | | 131799 [COMMITTED] ada: Crash in GNATprove due to wrong detection of inlining | | | 131800 [COMMITTED] ada: Extend precondition of Interfaces.C.String.Value with Length | | | 131801 [COMMITTED] ada: Refactor multiple returns | | | 131849 cprop_hardreg: Allow more propagation of the stack pointer. | | | 131909 [v1] Mode-Switching: Fix SET_SRC ICE when only one operand | | | 131960 Improve -fopt-info-vec for basic-block vectorization | | | 131967 Use RPO order for sinking | | | 131984 tree-optimization/49955 - BB reduction with odd number of lanes | | | 131992 rtl-optimization/110869 Fix tests cmp-mem-const-*.c for sparc | | | 132025 [OpenACC,2.7,v2] readonly modifier support in front-ends | | | 132068 [V2] gcc-14/changes.html: Deprecate a GCC C extension on flexible array members. | | | 132093 [v4] Implement new RTL optimizations pass: fold-mem-offsets. | | | 132115 VR-VALUES [PR28794]: optimize compare assignments also | | | 132133 [committed,RISC-V] Handle more cases in riscv_expand_conditional_move | | | 132290 [COMMITTED] MAINTAINERS: Add myself as a BPF port reviewer | | | 132299 [ver,3] rs6000: Fix __builtin_altivec_vcmpne{b,h,w} implementation | | | 132318 _BitInt to _Decimal* conversion support [PR102989] | | | 132364 vect: Add a popcount fallback. | | | 132368 [committed,RISC-V] Don't reject constants in cmov condition | | | 132387 [committed] libstdc++: Fix past-the-end increment in std::format [PR110862] | | | 132388 [committed] i386: Fix grammar typo in diagnostic | | | 132391 [committed] libstdc++: Constrain __format::_Iter_sink for contiguous iterators [PR110917] | | | 132390 [committed] libstdc++: Fix incorrect use of abs and log10 in std::format [PR110860] | | | 132468 MATCH: [PR110937/PR100798] (a ? ~b : b) should be optimized to b ^ -(a) | | | 132477 RISC-V: Support VLS shift vectorization | | | 132481 [v2] LoongArch:Implement 128-bit floating point functions in gcc. | | | 132482 [v2] LoongArch:Implement 128-bit floating point functions in gcc. | | | 132488 c++: Report invalid id-expression in decltype [PR100482] | | | 132489 c++: Report invalid id-expression in decltype [PR100482] | | | 132496 [v2] Mode-Switching: Fix SET_SRC ICE when USE or CLOBBER | | | 132497 RISC-V: Support neg VLS auto-vectorization | | | 132504 [V1] RISC-V: Fix a bug that causes an error insn. | | | 132507 [v2] RISC-V: Refactor RVV frm_mode attr for rounding mode intrinsic | | | 132510 [1/3] Initial support for AVX10.1 | | | 132509 [2/3] Emit a warning when disabling AVX512 with AVX10 enabled or disabling AVX10 with AVX512 enabled | | | 132508 [3/3] Emit a warning when AVX10 options conflict in vector width | | | 132511 [1/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins | | | 132512 [2/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins | | | 132513 [3/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins | | | 132515 [4/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins | | | 132514 [5/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins | | | 132516 [6/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins | | | 132517 [X86] Workaround possible CPUID bug in Sandy Bridge. | | | 132518 RISC-V: Allow CONST_VECTOR for VLS modes. | | | 132521 RISC-V: Fix error combine of pred_mov pattern | | | 132522 tree-optimization/110924 - fix vop liveness for noreturn const CFG parts | | | 132523 [GCC] aarch64: Add support for Cortex-A520 CPU | | | 132525 testsuite: Add runtime _BitInt stdatomic.h tests [PR102989] | | | 132527 testsuite: Fix gcc.dg/analyzer/allocation-size-multiline-[123].c [PR 110426] | | | 132569 [committed] i386: Do not sanitize upper part of V2SFmode reg with -fno-trapping-math [PR110832] | | | 132589 bpf: Fixed GC mistakes in BPF builtins code. | | | 132884 [committed,RISC-V] Fix bug in condition canonicalization for zicond | | | 132900 [v3] RISC-V: Add Ztso atomic mappings | | | 132927 libstdc++: fix memory clobbering in std::vector [PR110879] | | | 133018 [V2,X86] Workaround possible CPUID bug in Sandy Bridge. | | | 133035 [v3] Mode-Switching: Fix SET_SRC ICE when CLOBBER insn | | | 133067 RISC-V: Remove non-existing 'Zve32d' extension | | | 133068 [RFC,1/2] RISC-V: __builtin_riscv_pause for all environment | | | 133069 [RFC,2/2] RISC-V: Fix documentation of __builtin_riscv_pause | | | 133071 VECT: Support loop len control on EXTRACT_LAST vectorization | | | 133077 Rename local variable subleaf_level to max_subleaf_level. | | | 133158 RISC-V: Fix VLMAX AVL incorrect local anticipate [VSETVL PASS] | | | 133159 Remove insert location argument from vectorizable_live_operation | | | 133171 [v2,01/14] LoongArch: Introduce loongarch32 target | | | 133167 [v2,02/14] LoongArch: Fix default ISA setting | | | 133174 [v2,03/14] LoongArch: Fix SI division for loongarch32 target | | | 133170 [v2,04/14] LoongArch: Fix movgr2frh.w operand order | | | 133169 [v2,05/14] LoongArch: Fix 64-bit move for loongarch32 target | | | 133173 [v2,06/14] LoongArch: Fix 64-bit immediate move for loongarch32 target | | | 133176 [v2,07/14] LoongArch: Fix signed 32-bit overflow for loongarch32 target | | | 133177 [v2,08/14] LoongArch: Disable SF/DF -> unsigned DI expand in loongarch32 | | | 133180 [v2,09/14] LoongArch: Add -march=loongarch64 to tests with -mabi=lp64d | | | 133182 [v2,10/14] LoongArch: Forbid ADDRESS_REG_REG in loongarch32 | | | 133186 [v2,11/14] LoongArch: Mark am* instructions as LA64-only | | | 133172 [v2,12/14] LoongArch: Set long double width to 128 in la32 | | | 133181 [v2,13/14] LoongArch: Fix ilp32 detection | | | 133183 [v2,14/14] LoongArch: Allow ftintrz for DF->DI in loongarch32 | | | 133197 RISC-V: Support NPATTERNS = 1 stepped vector[PR110950] | | | 133237 Handle in-order reductions when SLP vectorizing non-loops | | | 133278 [committed] libstdc++: Minor fixes for some warnings in | | | 133280 [committed] libstdc++: Explicitly default some copy ctors and assignments | | | 133279 [committed] libstdc++: Fix some -Wunused-parameter warnings | | | 133281 [committed] libstdc++: Fix some -Wmismatched-tags warnings | | | 133284 [committed] libstdc++: Suppress clang -Wc99-extensions warnings in | | | 133282 [committed] libstdc++: Fix a -Wsign-compare warning in std::list | | | 133283 [committed] libstdc++: Fix constexpr functions to conform to older standards | | | 133314 rs6000, add overloaded DFP quantize support | | | 133329 VR-VALUES: Simplify comparison using range pairs | | | 133402 [1/12] expr: Small optimization [PR102989] | | | 133404 [2/12] lto-streamer-in: Adjust assert [PR102989] | | | 133406 [3/12] phiopt: Fix phiopt ICE on vops [PR102989] | | | 133407 [4/12] Middle-end _BitInt support [PR102989] | | | 133409 [5/12] _BitInt lowering support [PR102989] | | | 133408 [6/12] i386: Enable _BitInt on x86-64 [PR102989] | | | 133410 [7/12] ubsan: _BitInt -fsanitize=undefined support [PR102989] | +------------+------------------------------------------------------------------------------------------------------------------+ + git config pull.rebase false + git fetch origin master From github.com:plctlab/patchwork-gcc * branch master -> FETCH_HEAD + git checkout master Switched to a new branch 'master' branch 'master' set up to track 'origin/master'. + git pull origin master From github.com:plctlab/patchwork-gcc * branch master -> FETCH_HEAD Already up to date. + git fetch origin upstream-master From github.com:plctlab/patchwork-gcc * branch upstream-master -> FETCH_HEAD + git checkout upstream-master Switched to a new branch 'upstream-master' branch 'upstream-master' set up to track 'origin/upstream-master'. + git remote add upstream https://github.com/gcc-mirror/gcc.git + git pull upstream master From https://github.com/gcc-mirror/gcc * branch master -> FETCH_HEAD * [new branch] master -> upstream/master fatal: refusing to merge unrelated histories + git push -u origin upstream-master Everything up-to-date branch 'upstream-master' set up to track 'origin/upstream-master'. + git checkout master Switched to branch 'master' Your branch is up to date with 'origin/master'. + git merge upstream-master fatal: refusing to merge unrelated histories + git push -u origin master Everything up-to-date branch 'master' set up to track 'origin/master'. + branchname=series54803-patch133410 ++ git branch -a ++ grep 'series54803-patch133410$' + checkbranch= + checkbranchresult=null + '[' null = series54803-patch133410 ']' + git checkout -b series54803-patch133410 Switched to a new branch 'series54803-patch133410' ++ curl https://patchwork.plctlab.org/api/1.2/series/54803/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 6181 100 6181 0 0 125k 0 --:--:-- --:--:-- --:--:-- 125k + series_response='{"id":54803,"url":"https://patchwork.plctlab.org/api/1.2/series/54803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/list/?series=54803","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"GCC _BitInt support [PR102989]","date":"2023-08-09T18:14:14","submitter":{"id":40,"url":"https://patchwork.plctlab.org/api/1.2/people/40/","name":"Jakub Jelinek","email":"jakub@redhat.com"},"version":1,"total":12,"received_total":12,"received_all":true,"mbox":"https://patchwork.plctlab.org/series/54803/mbox/","cover_letter":{"id":13393,"url":"https://patchwork.plctlab.org/api/1.2/covers/13393/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/cover/ZNPXdkEC7m01caOV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:14:14","name":"[0/12] GCC _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/cover/ZNPXdkEC7m01caOV@tucnak/mbox/"},"patches":[{"id":133402,"url":"https://patchwork.plctlab.org/api/1.2/patches/133402/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:15:13","name":"[1/12] expr: Small optimization [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/"},{"id":133404,"url":"https://patchwork.plctlab.org/api/1.2/patches/133404/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPX2msMcQsvxzgO@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:15:54","name":"[2/12] lto-streamer-in: Adjust assert [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPX2msMcQsvxzgO@tucnak/mbox/"},{"id":133406,"url":"https://patchwork.plctlab.org/api/1.2/patches/133406/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYJTDaCXXiAkUh@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:17:09","name":"[3/12] phiopt: Fix phiopt ICE on vops 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[PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPZiZWAGWi3IT3f@tucnak/mbox/"},{"id":133413,"url":"https://patchwork.plctlab.org/api/1.2/patches/133413/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaCv0aI4+M+I5E@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:25:14","name":"[10/12] C _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaCv0aI4+M+I5E@tucnak/mbox/"},{"id":133415,"url":"https://patchwork.plctlab.org/api/1.2/patches/133415/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaRCr6wXBE97LV@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:26:12","name":"[11/12] testsuite part 1 for _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaRCr6wXBE97LV@tucnak/mbox/"},{"id":133416,"url":"https://patchwork.plctlab.org/api/1.2/patches/133416/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPakg55oMCtLMt6@tucnak/","msgid":"","list_archive_url":null,"date":"2023-08-09T18:27:30","name":"[12/12] testsuite part 2 for _BitInt support [PR102989]","mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPakg55oMCtLMt6@tucnak/mbox/"}]}' ++ jq '.patches[] | (.id|tostring) + "," + .mbox' + patchid_patchurl='"133402,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/" "133404,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPX2msMcQsvxzgO@tucnak/mbox/" "133406,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYJTDaCXXiAkUh@tucnak/mbox/" "133407,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYTkXPz0ajFPdL@tucnak/mbox/" "133409,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYinLQm7O1PnnV@tucnak/mbox/" "133408,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYvfb7vvQ/Z+pj@tucnak/mbox/" "133410,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPY9RF+NY9zbVju@tucnak/mbox/" "133411,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPZTwyGIx9296/G@tucnak/mbox/" "133412,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPZiZWAGWi3IT3f@tucnak/mbox/" "133413,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaCv0aI4+M+I5E@tucnak/mbox/" "133415,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaRCr6wXBE97LV@tucnak/mbox/" "133416,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPakg55oMCtLMt6@tucnak/mbox/"' + echo '"133402,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/" "133404,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPX2msMcQsvxzgO@tucnak/mbox/" "133406,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYJTDaCXXiAkUh@tucnak/mbox/" "133407,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYTkXPz0ajFPdL@tucnak/mbox/" "133409,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYinLQm7O1PnnV@tucnak/mbox/" "133408,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPYvfb7vvQ/Z+pj@tucnak/mbox/" "133410,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPY9RF+NY9zbVju@tucnak/mbox/" "133411,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPZTwyGIx9296/G@tucnak/mbox/" "133412,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPZiZWAGWi3IT3f@tucnak/mbox/" "133413,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaCv0aI4+M+I5E@tucnak/mbox/" "133415,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPaRCr6wXBE97LV@tucnak/mbox/" "133416,https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPakg55oMCtLMt6@tucnak/mbox/"' + IFS=, + read -r series_patch_id series_patch_url ++ echo '"133402' ++ sed 's/"//g' + series_patch_id=133402 ++ echo 'https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/"' ++ sed 's/"//g' + series_patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/ ++ git rev-parse HEAD + commitid_before=c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a + eval '+++ declare -p bout bret declare -- bout="Applying: expr: Small optimization [PR102989] error: sha1 information is lacking or useless (expr.cc). error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 expr: Small optimization [PR102989] When you have resolved this problem, run \"git am --continue\". If you prefer to skip this patch, run \"git am --skip\" instead. To restore the original branch and stop patching, run \"git am --abort\"." declare -- bret="128" ++ berr='\''++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 8377 100 8377 0 0 302k 0 --:--:-- --:--:-- --:--:-- 302k +++ bout='\''\'\'''\''Applying: expr: Small optimization [PR102989] error: sha1 information is lacking or useless (expr.cc). error: could not build fake ancestor hint: Use '\''\'\'''\''\'\''\'\'''\'''\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\''\'\''\'\'''\'''\''\'\'''\'' to see the failed patch Patch failed at 0001 expr: Small optimization [PR102989] When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\''\'\'''\'' +++ bret=128'\'' ++ declare -p berr declare -- berr="++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 8377 100 8377 0 0 302k 0 --:--:-- --:--:-- --:--:-- 302k +++ bout='\''Applying: expr: Small optimization [PR102989] error: sha1 information is lacking or useless (expr.cc). error: could not build fake ancestor hint: Use '\''\\'\'''\''git am --show-current-patch=diff'\''\\'\'''\'' to see the failed patch Patch failed at 0001 expr: Small optimization [PR102989] When you have resolved this problem, run \"git am --continue\". If you prefer to skip this patch, run \"git am --skip\" instead. To restore the original branch and stop patching, run \"git am --abort\".'\'' +++ bret=128"' ++ +++ declare -p bout bret /tmp/jenkins17028487767148391132.sh: line 129: +++: command not found ++ declare -- 'bout=Applying: expr: Small optimization [PR102989] error: sha1 information is lacking or useless (expr.cc). error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 expr: Small optimization [PR102989] When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' ++ declare -- bret=128 ++ ++ 'berr=++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 8377 100 8377 0 0 302k 0 --:--:-- --:--:-- --:--:-- 302k +++ bout='\''Applying: expr: Small optimization [PR102989] error: sha1 information is lacking or useless (expr.cc). error: could not build fake ancestor hint: Use '\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\'' to see the failed patch Patch failed at 0001 expr: Small optimization [PR102989] When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\'' +++ bret=128' /tmp/jenkins17028487767148391132.sh: line 154: ++: command not found ++ ++ declare -p berr /tmp/jenkins17028487767148391132.sh: line 155: ++: command not found ++ declare -- 'berr=++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 8377 100 8377 0 0 302k 0 --:--:-- --:--:-- --:--:-- 302k +++ bout='\''Applying: expr: Small optimization [PR102989] error: sha1 information is lacking or useless (expr.cc). error: could not build fake ancestor hint: Use '\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\'' to see the failed patch Patch failed at 0001 expr: Small optimization [PR102989] When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\'' +++ bret=128' ++ git rev-parse HEAD + commitid_after=c2d62cdd63f34c2f5187687d4c7b9f00f7d8fa3a + '[' 128 = 0 ']' + [[ ++++ git_am https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/ ++++ curl https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPXsZL3/mmxuDT5@tucnak/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 8377 100 8377 0 0 302k 0 --:--:-- --:--:-- --:--:-- 302k +++ bout='Applying: expr: Small optimization [PR102989] error: sha1 information is lacking or useless (expr.cc). error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 expr: Small optimization [PR102989] When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' +++ bret=128 =~ sha1 information is lacking or useless ]] + submit_check warning Unresolved https://patchwork.plctlab.org/jenkins/job/gcc-patch/10088/consoleText 'Git am fail log' + check_state=warning + patch_state=Unresolved + repo_url=https://patchwork.plctlab.org/jenkins/job/gcc-patch/10088/consoleText + DESCRIPTION='Git am fail log' + curl -X POST -H 'Authorization: Token [*******]' -F state=warning -F target_url=https://patchwork.plctlab.org/jenkins/job/gcc-patch/10088/consoleText -F context=gcc-patch-check -F 'description=Git am fail log' https://patchwork.plctlab.org/api/patches/133410/checks/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 970 100 429 100 541 13000 16393 --:--:-- --:--:-- --:--:-- 29393 {"id":11803,"url":"https://patchwork.plctlab.org/api/patches/133410/checks/11803/","user":{"id":1,"url":"https://patchwork.plctlab.org/api/users/1/","username":"snail","first_name":"","last_name":"","email":"wangliu@iscas.ac.cn"},"date":"2023-08-09T19:29:26.662105","state":"warning","target_url":"https://patchwork.plctlab.org/jenkins/job/gcc-patch/10088/consoleText","context":"gcc-patch-check","description":"Git am fail log"}+ curl -X PATCH -H 'Authorization: Token [*******]' -F state=Unresolved https://patchwork.plctlab.org/api/1.2/patches/133410/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0{"id":133410,"url":"https://patchwork.plctlab.org/api/1.2/patches/133410/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPY9RF+NY9zbVju@tucnak/","project":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/projects/1/","name":"gcc-patch","link_name":"gcc-patch","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":"https://github.com/wangliu-iscas/Patchwork-Bundles/blob/main/gcc-patch.md","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"","list_archive_url":null,"date":"2023-08-09T18:20:37","name":"[7/12] ubsan: _BitInt -fsanitize=undefined support [PR102989]","commit_ref":null,"pull_url":null,"state":"unresolved","archived":false,"hash":"f82df69525c78e151d17e0bbeaeff4f190992344","submitter":{"id":40,"url":"https://patchwork.plctlab.org/api/1.2/people/40/","name":"Jakub Jelinek","email":"jakub@redhat.com"},"delegate":null,"mbox":"https://patchwork.plctlab.org/project/gcc-patch/patch/ZNPY9RF+NY9zbVju@tucnak/mbox/","series":[{"id":54803,"url":"https://patchwork.plctlab.org/api/1.2/series/54803/","web_url":"https://patchwork.plctlab.org/project/gcc-patch/list/?series=54803","date":"2023-08-09T18:14:14","name":"GCC _BitInt support [PR102989]","version":1,"mbox":"https://patchwork.plctlab.org/series/54803/mbox/"}],"comments":"https://patchwork.plctlab.org/api/patches/133410/comments/","check":"warning","checks":"https://patchwork.plctlab.org/api/patches/133410/checks/","tags":{},"headers":{"Return-Path":"","Delivered-To":["ouuuleilei@gmail.com","gcc-patches@gcc.gnu.org"],"Received":["by 2002:a59:c44e:0:b0:3f2:4152:657d with SMTP id w14csp2991626vqr;\n Wed, 9 Aug 2023 11:23:11 -0700 (PDT)","from server2.sourceware.org (server2.sourceware.org.\n [2620:52:3:1:0:246e:9693:128c])\n by mx.google.com with ESMTPS id\n t2-20020a1709063e4200b00993325b159csi8920220eji.659.2023.08.09.11.23.11\n for \n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Wed, 09 Aug 2023 11:23:11 -0700 (PDT)","from server2.sourceware.org (localhost [IPv6:::1])\n\tby sourceware.org (Postfix) with ESMTP id 92A3A3857016\n\tfor ; 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a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org;\n\ts=default; t=1691605382;\n\tbh=ZiPojcxdLk3G1xFtO90aBUCS7C4gGvGCKnbi38EmBpE=;\n\th=Date:To:Cc:Subject:List-Id:List-Unsubscribe:List-Archive:\n\t List-Post:List-Help:List-Subscribe:From:Reply-To:From;\n\tb=FLg/C23v+1ye06gIf1CAg7hhGVgejnTnt2Aym42ch2MfXrScpFjrflTtKgJmUR6kB\n\t 95oLfnb6ZV89f5nXllsiL5rvi+cPWrTFjzCSnu5bD4mHo/0TUIsDpmIkUqSCwu/uQW\n\t u1+w8bYM4e0VF9B5qlH5vnWGDSQW6B/+dEzvdA88=","X-Original-To":"gcc-patches@gcc.gnu.org","DMARC-Filter":"OpenDMARC Filter v1.4.2 sourceware.org 2AE0A3858023","X-MC-Unique":"xZj7Cr_DOTOa5GezoZx_JA-1","Date":"Wed, 9 Aug 2023 20:20:37 +0200","To":"Richard Biener ","Cc":"gcc-patches@gcc.gnu.org","Subject":"[PATCH 7/12] ubsan: _BitInt -fsanitize=undefined support [PR102989]","Message-ID":"","MIME-Version":"1.0","X-Scanned-By":"MIMEDefang 3.1 on 10.11.54.2","X-Mimecast-Spam-Score":"0","X-Mimecast-Originator":"redhat.com","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","X-Spam-Status":"No, score=-3.4 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH,\n DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, RCVD_IN_DNSWL_NONE,\n RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE,\n TXREP autolearn=ham autolearn_force=no version=3.4.6","X-Spam-Checker-Version":"SpamAssassin 3.4.6 (2021-04-09) on\n server2.sourceware.org","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","From":"Jakub Jelinek via Gcc-patches ","Reply-To":"Jakub Jelinek ","Errors-To":"gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org","Sender":"\"Gcc-patches\" ","X-getmail-retrieved-from-mailbox":"INBOX","X-GMAIL-THRID":"1773776815128822290","X-GMAIL-MSGID":"1773776815128822290"},"content":"Hi!\n\nThe following patch introduces some -fsanitize=undefined support for _BitInt,\nbut some of the diagnostics is limited by lack of proper support in the\nlibrary.\nI've filed https://github.com/llvm/llvm-project/issues/64100 to request\nproper support, for now some of the diagnostics might have less or more\nconfusing or inaccurate wording but UB should still be diagnosed when it\nhappens.\n\n2023-08-09 Jakub Jelinek \n\n\tPR c/102989\ngcc/\n\t* internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and\n\tDO_ERROR arguments. For non-mode precision BITINT_TYPE results\n\tcheck if all padding bits up to mode precision are zeros or sign\n\tbit copies and if not, jump to DO_ERROR.\n\t(expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):\n\tAdjust expand_ubsan_result_store callers.\n\t* ubsan.cc: Include target.h and langhooks.h.\n\t(ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer\n\tsize converted to pointer sized integer, pass BITINT_TYPE values\n\twhich fit into TImode (if supported) or DImode as those integer types\n\tor otherwise for now punt (pass 0).\n\t(ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of\n\tUBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a\n\tTImode/DImode precision rather than TK_Unknown used otherwise for\n\tlarge/huge BITINT_TYPEs.\n\t(instrument_si_overflow): Instrument BITINT_TYPE operations even when\n\tthey don't have mode precision.\n\t* ubsan.h (enum ubsan_print_style): New enumerator.\ngcc/c-family/\n\t* c-ubsan.cc (ubsan_instrument_shift): Use UBSAN_PRINT_FORCE_INT\n\tfor type0 type descriptor.\n\n\n\tJakub","diff":"--- gcc/ubsan.cc.jj\t2023-08-08 15:54:35.443599459 +0200\n+++ gcc/ubsan.cc\t2023-08-08 16:12:02.329939798 +0200\n@@ -50,6 +50,8 @@ along with GCC; see the file COPYING3.\n #include \"gimple-fold.h\"\n #include \"varasm.h\"\n #include \"realmpfr.h\"\n+#include \"target.h\"\n+#include \"langhooks.h\"\n \n /* Map from a tree to a VAR_DECL tree. */\n \n@@ -125,6 +127,25 @@ tree\n ubsan_encode_value (tree t, enum ubsan_encode_value_phase phase)\n {\n tree type = TREE_TYPE (t);\n+ if (TREE_CODE (type) == BITINT_TYPE)\n+ {\n+ if (TYPE_PRECISION (type) <= POINTER_SIZE)\n+\t{\n+\t type = pointer_sized_int_node;\n+\t t = fold_build1 (NOP_EXPR, type, t);\n+\t}\n+ else\n+\t{\n+\t scalar_int_mode arith_mode\n+\t = (targetm.scalar_mode_supported_p (TImode) ? TImode : DImode);\n+\t if (TYPE_PRECISION (type) > GET_MODE_PRECISION (arith_mode))\n+\t return build_zero_cst (pointer_sized_int_node);\n+\t type\n+\t = build_nonstandard_integer_type (GET_MODE_PRECISION (arith_mode),\n+\t\t\t\t\t TYPE_UNSIGNED (type));\n+\t t = fold_build1 (NOP_EXPR, type, t);\n+\t}\n+ }\n scalar_mode mode = SCALAR_TYPE_MODE (type);\n const unsigned int bitsize = GET_MODE_BITSIZE (mode);\n if (bitsize <= POINTER_SIZE)\n@@ -355,14 +376,32 @@ ubsan_type_descriptor (tree type, enum u\n {\n /* See through any typedefs. */\n type = TYPE_MAIN_VARIANT (type);\n+ tree type3 = type;\n+ if (pstyle == UBSAN_PRINT_FORCE_INT)\n+ {\n+ /* Temporary hack for -fsanitize=shift with _BitInt(129) and more.\n+\t libubsan crashes if it is not TK_Integer type. */\n+ if (TREE_CODE (type) == BITINT_TYPE)\n+\t{\n+\t scalar_int_mode arith_mode\n+\t = (targetm.scalar_mode_supported_p (TImode)\n+\t ? TImode : DImode);\n+\t if (TYPE_PRECISION (type) > GET_MODE_PRECISION (arith_mode))\n+\t type3 = build_qualified_type (type, TYPE_QUAL_CONST);\n+\t}\n+ if (type3 == type)\n+\tpstyle = UBSAN_PRINT_NORMAL;\n+ }\n \n- tree decl = decl_for_type_lookup (type);\n+ tree decl = decl_for_type_lookup (type3);\n /* It is possible that some of the earlier created DECLs were found\n unused, in that case they weren't emitted and varpool_node::get\n returns NULL node on them. But now we really need them. Thus,\n renew them here. */\n if (decl != NULL_TREE && varpool_node::get (decl))\n- return build_fold_addr_expr (decl);\n+ {\n+ return build_fold_addr_expr (decl);\n+ }\n \n tree dtype = ubsan_get_type_descriptor_type ();\n tree type2 = type;\n@@ -370,6 +409,7 @@ ubsan_type_descriptor (tree type, enum u\n pretty_printer pretty_name;\n unsigned char deref_depth = 0;\n unsigned short tkind, tinfo;\n+ char tname_bitint[sizeof (\"unsigned _BitInt(2147483647)\")];\n \n /* Get the name of the type, or the name of the pointer type. */\n if (pstyle == UBSAN_PRINT_POINTER)\n@@ -403,8 +443,18 @@ ubsan_type_descriptor (tree type, enum u\n }\n \n if (tname == NULL)\n- /* We weren't able to determine the type name. */\n- tname = \"\";\n+ {\n+ if (TREE_CODE (type2) == BITINT_TYPE)\n+\t{\n+\t snprintf (tname_bitint, sizeof (tname_bitint),\n+\t \t \"%s_BitInt(%d)\", TYPE_UNSIGNED (type2) ? \"unsigned \" : \"\",\n+\t\t TYPE_PRECISION (type2));\n+\t tname = tname_bitint;\n+\t}\n+ else\n+\t/* We weren't able to determine the type name. */\n+\ttname = \"\";\n+ }\n \n pp_quote (&pretty_name);\n \n@@ -472,6 +522,18 @@ ubsan_type_descriptor (tree type, enum u\n case INTEGER_TYPE:\n tkind = 0x0000;\n break;\n+ case BITINT_TYPE:\n+ {\n+\t/* FIXME: libubsan right now only supports _BitInts which\n+\t fit into DImode or TImode. */\n+\tscalar_int_mode arith_mode = (targetm.scalar_mode_supported_p (TImode)\n+\t\t\t\t ? TImode : DImode);\n+\tif (TYPE_PRECISION (eltype) <= GET_MODE_PRECISION (arith_mode))\n+\t tkind = 0x0000;\n+\telse\n+\t tkind = 0xffff;\n+ }\n+ break;\n case REAL_TYPE:\n /* FIXME: libubsan right now only supports float, double and\n \t long double type formats. */\n@@ -486,7 +548,17 @@ ubsan_type_descriptor (tree type, enum u\n tkind = 0xffff;\n break;\n }\n- tinfo = get_ubsan_type_info_for_type (eltype);\n+ tinfo = tkind == 0xffff ? 0 : get_ubsan_type_info_for_type (eltype);\n+\n+ if (pstyle == UBSAN_PRINT_FORCE_INT)\n+ {\n+ tkind = 0x0000;\n+ scalar_int_mode arith_mode = (targetm.scalar_mode_supported_p (TImode)\n+\t\t\t\t ? TImode : DImode);\n+ tree t = lang_hooks.types.type_for_mode (arith_mode,\n+\t\t\t\t\t TYPE_UNSIGNED (eltype));\n+ tinfo = get_ubsan_type_info_for_type (t);\n+ }\n \n /* Create a new VAR_DECL of type descriptor. */\n const char *tmp = pp_formatted_text (&pretty_name);\n@@ -522,7 +594,7 @@ ubsan_type_descriptor (tree type, enum u\n varpool_node::finalize_decl (decl);\n \n /* Save the VAR_DECL into the hash table. */\n- decl_for_type_insert (type, decl);\n+ decl_for_type_insert (type3, decl);\n \n return build_fold_addr_expr (decl);\n }\n@@ -1604,8 +1676,9 @@ instrument_si_overflow (gimple_stmt_iter\n Also punt on bit-fields. */\n if (!INTEGRAL_TYPE_P (lhsinner)\n || TYPE_OVERFLOW_WRAPS (lhsinner)\n- || maybe_ne (GET_MODE_BITSIZE (TYPE_MODE (lhsinner)),\n-\t\t TYPE_PRECISION (lhsinner)))\n+ || (TREE_CODE (lhsinner) != BITINT_TYPE\n+\t && maybe_ne (GET_MODE_BITSIZE (TYPE_MODE (lhsinner)),\n+\t\t TYPE_PRECISION (lhsinner))))\n return;\n \n switch (code)\n--- gcc/ubsan.h.jj\t2023-08-08 15:54:35.460599221 +0200\n+++ gcc/ubsan.h\t2023-08-08 16:12:02.329939798 +0200\n@@ -39,7 +39,8 @@ enum ubsan_null_ckind {\n enum ubsan_print_style {\n UBSAN_PRINT_NORMAL,\n UBSAN_PRINT_POINTER,\n- UBSAN_PRINT_ARRAY\n+ UBSAN_PRINT_ARRAY,\n+ UBSAN_PRINT_FORCE_INT\n };\n \n /* This controls ubsan_encode_value behavior. 100 19838 100 19688 100 150 240k 1875 --:--:-- --:--:-- --:--:-- 242k */\n--- gcc/internal-fn.cc.jj\t2023-08-08 15:55:06.709161614 +0200\n+++ gcc/internal-fn.cc\t2023-08-08 16:22:09.404440148 +0200\n@@ -981,8 +981,38 @@ expand_arith_overflow_result_store (tree\n /* Helper for expand_*_overflow. Store RES into TARGET. */\n \n static void\n-expand_ubsan_result_store (rtx target, rtx res)\n+expand_ubsan_result_store (tree lhs, rtx target, scalar_int_mode mode,\n+\t\t\t rtx res, rtx_code_label *do_error)\n {\n+ if (TREE_CODE (TREE_TYPE (lhs)) == BITINT_TYPE\n+ && TYPE_PRECISION (TREE_TYPE (lhs)) < GET_MODE_PRECISION (mode))\n+ {\n+ int uns = TYPE_UNSIGNED (TREE_TYPE (lhs));\n+ int prec = TYPE_PRECISION (TREE_TYPE (lhs));\n+ int tgtprec = GET_MODE_PRECISION (mode);\n+ rtx resc = gen_reg_rtx (mode), lres;\n+ emit_move_insn (resc, res);\n+ if (uns)\n+\t{\n+\t rtx mask\n+\t = immed_wide_int_const (wi::shifted_mask (0, prec, false, tgtprec),\n+\t\t\t\t mode);\n+\t lres = expand_simple_binop (mode, AND, res, mask, NULL_RTX,\n+\t\t\t\t true, OPTAB_LIB_WIDEN);\n+\t}\n+ else\n+\t{\n+\t lres = expand_shift (LSHIFT_EXPR, mode, res, tgtprec - prec,\n+\t\t\t NULL_RTX, 1);\n+\t lres = expand_shift (RSHIFT_EXPR, mode, lres, tgtprec - prec,\n+\t\t\t NULL_RTX, 0);\n+\t}\n+ if (lres != res)\n+\temit_move_insn (res, lres);\n+ do_compare_rtx_and_jump (res, resc,\n+\t\t\t NE, true, mode, NULL_RTX, NULL, do_error,\n+\t\t\t profile_probability::very_unlikely ());\n+ }\n if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))\n /* If this is a scalar in a register that is stored in a wider mode \n than the declared mode, compute the result into its declared mode\n@@ -1431,7 +1461,7 @@ expand_addsub_overflow (location_t loc,\n if (lhs)\n {\n if (is_ubsan)\n-\texpand_ubsan_result_store (target, res);\n+\texpand_ubsan_result_store (lhs, target, mode, res, do_error);\n else\n \t{\n \t if (do_xor)\n@@ -1528,7 +1558,7 @@ expand_neg_overflow (location_t loc, tre\n if (lhs)\n {\n if (is_ubsan)\n-\texpand_ubsan_result_store (target, res);\n+\texpand_ubsan_result_store (lhs, target, mode, res, do_error);\n else\n \texpand_arith_overflow_result_store (lhs, target, mode, res);\n }\n@@ -2414,7 +2450,7 @@ expand_mul_overflow (location_t loc, tre\n if (lhs)\n {\n if (is_ubsan)\n-\texpand_ubsan_result_store (target, res);\n+\texpand_ubsan_result_store (lhs, target, mode, res, do_error);\n else\n \texpand_arith_overflow_result_store (lhs, target, mode, res);\n }\n--- gcc/c-family/c-ubsan.cc.jj\t2023-08-08 15:54:33.596625322 +0200\n+++ gcc/c-family/c-ubsan.cc\t2023-08-08 16:12:02.332939756 +0200\n@@ -256,8 +256,8 @@ ubsan_instrument_shift (location_t loc,\n tt = build_call_expr_loc (loc, builtin_decl_explicit (BUILT_IN_TRAP), 0);\n else\n {\n- tree data = ubsan_create_data (\"__ubsan_shift_data\", 1, &loc,\n-\t\t\t\t ubsan_type_descriptor (type0),\n+ tree utd0 = ubsan_type_descriptor (type0, UBSAN_PRINT_FORCE_INT);\n+ tree data = ubsan_create_data (\"__ubsan_shift_data\", 1, &loc, utd0,\n \t\t\t\t ubsan_type_descriptor (type1), NULL_TREE,\n \t\t\t\t NULL_TREE);\n data = build_fold_addr_expr_loc (loc, data);\n","prefixes":["7/12"]}+ exit 1 Build step 'Execute shell' marked build as failure Finished: FAILURE