Started by user snail Running as SYSTEM [EnvInject] - Loading node environment variables. Building remotely on docker-jenkins-agent in workspace /home/jenkins/agent/workspace/binutils-gdb [WS-CLEANUP] Deleting project workspace... [WS-CLEANUP] Deferred wipeout is used... [WS-CLEANUP] Done The recommended git tool is: NONE using credential 0adb5fc7-caa2-429d-97d2-c7fa2fa1d884 Cloning the remote Git repository Using shallow clone with depth 1 Avoid fetching tags Cloning repository git@github.com:wangliu-iscas/binutils-gdb.git/ > git init /home/jenkins/agent/workspace/binutils-gdb # timeout=10 Fetching upstream changes from git@github.com:wangliu-iscas/binutils-gdb.git/ > git --version # timeout=10 > git --version # 'git version 2.37.2' using GIT_SSH to set credentials patchwork github wangliu-iscas git ssh key Verifying host key using known hosts file, will automatically accept unseen keys > git fetch --no-tags --force --progress --depth=1 -- git@github.com:wangliu-iscas/binutils-gdb.git/ +refs/heads/*:refs/remotes/origin/* # timeout=10 > git config remote.origin.url git@github.com:wangliu-iscas/binutils-gdb.git/ # timeout=10 > git config --add remote.origin.fetch +refs/heads/*:refs/remotes/origin/* # timeout=10 Avoid second fetch > git rev-parse refs/remotes/origin/master^{commit} # timeout=10 Checking out Revision 508ccf9b3e1db355037a4a1c9004efe0d6d3ffbf (refs/remotes/origin/master) > git config core.sparsecheckout # timeout=10 > git checkout -f 508ccf9b3e1db355037a4a1c9004efe0d6d3ffbf # timeout=10 Commit message: "[gdb] Fix assert in handle_jit_event" > git rev-list --no-walk 508ccf9b3e1db355037a4a1c9004efe0d6d3ffbf # timeout=10 [EnvInject] - Mask passwords that will be passed as build parameters. [EnvInject] - Executing scripts and injecting environment variables after the SCM step. [EnvInject] - Injecting as environment variables the properties content GITHUB_REPO=https://github.com/wangliu-iscas/ PATCHWORK_URL=https://patchwork.plctlab.org [EnvInject] - Variables injected successfully. [binutils-gdb] $ /usr/bin/env bash /tmp/jenkins12518415780046909484.sh + git config pw.server https://patchwork.plctlab.org/api/1.2/ + git config pw.project binutils-gdb + git config pw.token [*******] ++ date +%Y-%m + now_date=2022-10 + echo 2022-10 2022-10 ++ curl -s -H 'Authorization: Token [*******]' 'https://patchwork.plctlab.org/api/1.2/bundles/?project=binutils-gdb&per_page=999' + bundle_response='[{"id":6,"url":"https://patchwork.plctlab.org/api/1.2/bundles/6/","web_url":"https://patchwork.plctlab.org/bundle/snail/binutils-gdb_2022-10/","project":{"id":2,"url":"https://patchwork.plctlab.org/api/1.2/projects/2/","name":"binutils-gdb","link_name":"binutils-gdb","list_id":"binutils.sourceware.org","list_email":"binutils@sourceware.org","web_url":"https://sourceware.org/mailman/listinfo/binutils","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"binutils-gdb_2022-10","owner":{"id":1,"url":"https://patchwork.plctlab.org/api/1.2/users/1/","username":"snail","first_name":"","last_name":"","email":"wangliu@iscas.ac.cn"},"patches":[{"id":1592,"url":"https://patchwork.plctlab.org/api/1.2/patches/1592/","web_url":"https://patchwork.plctlab.org/project/binutils-gdb/patch/385d01fd-7e57-1f3f-1bae-30aa0c313d63@suse.com/","msgid":"<385d01fd-7e57-1f3f-1bae-30aa0c313d63@suse.com>","list_archive_url":null,"date":"2022-09-30T11:59:45","name":"[3/4] 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arm","mbox":"https://patchwork.plctlab.org/project/binutils-gdb/patch/619f112539c0bdecd58e25664f1250a3479a37f5.1664707612.git.aburgess@redhat.com/mbox/"},{"id":1635,"url":"https://patchwork.plctlab.org/api/1.2/patches/1635/","web_url":"https://patchwork.plctlab.org/project/binutils-gdb/patch/20221002185433.gl7dvytfh5wthifx@lug-owl.de/","msgid":"<20221002185433.gl7dvytfh5wthifx@lug-owl.de>","list_archive_url":null,"date":"2022-10-02T18:54:33","name":"diagnostics.h: GCC 13 got -Wself-move, breaks GDB build","mbox":"https://patchwork.plctlab.org/project/binutils-gdb/patch/20221002185433.gl7dvytfh5wthifx@lug-owl.de/mbox/"},{"id":1637,"url":"https://patchwork.plctlab.org/api/1.2/patches/1637/","web_url":"https://patchwork.plctlab.org/project/binutils-gdb/patch/20221003014313.28766-1-mark@harmstone.com/","msgid":"<20221003014313.28766-1-mark@harmstone.com>","list_archive_url":null,"date":"2022-10-03T01:43:12","name":"[1/2] ld: Add --pdb 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1619 gold, dwp: support zstd compressed input debug sections [PR 29641] | | | 1620 gold: add --compress-debug-sections=zstd [PR 29641] | | | 1623 [RFC,1/1] RISC-V: Implement common register pair framework | | | 1625 [RFC,1/1] RISC-V: Implement extension variants | | | 1626 [1/1] RISC-V: Move supervisor instructions after all unprivileged ones | | | 1627 readelf: support zstd compressed debug sections [PR 29640] | | | 1631 [PATCHv2,2/2] opcodes/arm: add disassembler styling for arm | | | 1635 diagnostics.h: GCC 13 got -Wself-move, breaks GDB build | | | 1637 [1/2] ld: Add --pdb option | | | 1638 [2/2] ld: Add minimal pdb generation | | | 1640 [1/2] refactor usage of compressed_debug_section_type | | | 1641 [2/2] add --enable-default-compressed-debug-sections-algorithm configure option | | | 1642 opcodes/riscv: style csr names as registers | | | 1643 [v3,1/6] RISC-V: Fix immediates to have "immediate" style | | | 1644 [v3,2/6] RISC-V: Fix printf argument types corresponding %x | | | 1647 [v3,3/6] RISC-V: Optimize riscv_disassemble_data printf | | | 1646 [v3,4/6] RISC-V: Print comma and tabs as the "text" style | | | 1648 [v3,5/6] RISC-V: Fix T-Head immediate types on printing | | | 1649 [v3,6/6] RISC-V: Print XTheadMemPair literal as "immediate" | | | 1656 Commit: readelf: Do not load section data from offset 0 | | | 1659 [PATCHv2,1/2] opcodes/arm: use '@' consistently for the comment character | | | 1660 gas: NEWS: Mention the T-Head extensions that were recently added | | | 1671 Support objcopy changing compression to or from zstd | | | 1673 [1/2] RISC-V: Fix buffer overflow on print_insn_riscv | | | 1672 [2/2] gdb/riscv: Fix buffer overflow on riscv_insn::fetch_instruction | | | 1676 [v2,1/2] RISC-V: Fix buffer overflow on print_insn_riscv | | | 1677 [v2,2/2] gdb/riscv: Partial support for instructions up to 176-bits | | | 1678 [v3,1/2] RISC-V: Fix buffer overflow on print_insn_riscv | | | 1679 [v3,2/2] gdb/riscv: Partial support for instructions up to 176-bit | | | 1681 RISC-V: Zicbo{m,p,z} adjustments to riscv_multi_subset_supports_ext() | | | 1690 gprofng: fix build with --enable-pgo-build=lto | | | 1691 bfd: xtensa: fix __stop_SECTION literal drop, | | | 1702 [RFC] bfd: use bfd_vma for the 64-bit version of put[lb] and get[lb] | | | 1711 PR29647, objdump -S looping | | | 1712 [v3,1/7] x86: constify parse_insn()'s input | | | 1713 [v3,2/7] x86: introduce Pass2 insn attribute | | | 1714 [v3,3/7] x86: re-work insn/suffix recognition | | | 1715 [v3,4/7] x86-64: further re-work insn/suffix recognition to also cover MOVSL | | | 1716 [v3,5/7] ix86: don't recognize/derive Q suffix in the common case | | | 1718 [v3,6/7] x86-64: allow HLE store of accumulator to absolute 32-bit address | | | 1717 [v3,7/7] x86: move bad-use-of-TLS-reloc check | | | 1719 x86: drop "regmask" static variable | | | 1751 [v2,1/2] RISC-V: Fallback for instructions longer than 64b | | | 1752 [v2,2/2] RISC-V: Improve "bits undefined" diagnostics | | | 1776 [v3,1/2] RISC-V: Fallback for instructions longer than 64b | | | 1777 [v3,2/2] RISC-V: Improve "bits undefined" diagnostics | | | 1781 RISC-V: fix linker message when relaxation deletes bytes | | | 1801 PR29653, objcopy/strip: fuzzed small input file induces large output file | | | 1803 @CPP_FOR_BUILD@ problem since binutils-2.38 | | | 1827 [v2,1/1] RISC-V: Test DWARF register numbers for "fp" | | | 1828 [1/1] RISC-V: Move standard hints before all instructions | | | 1829 [RFC,1/1] RISC-V: Imply 'Zicsr' from privileged extensions with CSRs | | | 1830 [1/5] opcodes/riscv-dis.c: Tidying with comments/clarity | | | 1832 [2/5] opcodes/riscv-dis.c: Tidying with spacing | | | 1831 [3/5] opcodes/riscv-dis.c: Use bool type whenever possible | | | 1833 [4/5] opcodes/riscv-dis.c: Make XLEN variable static | | | 1834 [5/5] opcodes/riscv-dis.c: Remove last_map_state | | | 1836 RISC-V: Move certain arrays to riscv-opc.c | | | 1844 [v2,1/2] ld: Add --pdb option | | | 1845 [v2,2/2] ld: Add minimal pdb generation | | | 1890 gprofng: run tests without installation | | | 1893 [2/2] gprofng: use the --libdir path to find libraries | | | 1894 [3/3] gprofng: no need to build version.texi | | | 1895 [v3,1/2] ld: Add --pdb option | | | 1897 [v3,2/2] ld: Add minimal pdb generation | | | 1928 [v4,1/2] ld: Add --pdb option | | | 1929 [v4,2/2] ld: Add minimal pdb generation | | | 1941 [pushed] Re-apply "Pass PKG_CONFIG_PATH down from top-level Makefile" | | | 1976 [v4,1/8] x86: constify parse_insn()'s input | | | 1977 [v4,2/8] x86: introduce Pass2 insn attribute | | | 1978 [v4,3/8] x86: re-work insn/suffix recognition | | | 1979 [v4,4/8] x86-64: further re-work insn/suffix recognition to also cover MOVSL | | | 1980 [v4,5/8] ix86: don't recognize/derive Q suffix in the common case | | | 1981 [v4,6/8] x86-64: allow HLE store of accumulator to absolute 32-bit address | | | 1982 [v4,7/8] x86: move bad-use-of-TLS-reloc check | | | 1983 [v4,8/8] x86: drop (now) stray IsString | | | 2013 include: Declare getopt function on old GNU libc | | | 2352 ld: Add --undefined-version | | | 2532 [1/1] RISC-V: Make R_RISCV_SUB6 conforms to riscv abi standard | | | 2560 [v3] aarch64-pe support for LD, GAS and BFD | | | 2602 [01/10] Support Intel AVX-IFMA | | | 2608 [02/10] Support Intel AVX-VNNI-INT8 | | | 2611 [03/10] Support Intel AVX-NE-CONVERT | | | 2610 [04/10] Support Intel CMPccXADD | | | 2601 [05/10] Add handler for more i386_cpu_flags | | | 2606 [06/10] Support Intel RAO-INT | | | 2609 [07/10] Support Intel WRMSRNS | | | 2605 [08/10] Support Intel MSRLIST | | | 2607 [09/10] Support Intel AMX-FP16 | | | 2604 [10/10] Support Intel PREFETCHI | | | 2643 x86: fold AVX512-VNNI disassembler entries with AVX-VNNI ones | | | 2654 PR29677, Field `the_bfd` of `asymbol` is uninitialised | | | 2656 e200 LSP support | | | 2657 PowerPC SPE disassembly and tests | | | 2695 Binutils: Adding new testcase for addr2line. | | | 2700 x86: properly decode EVEX.W for AVX512_4{FMAPS,VNNIW} insns | | | 2981 PowerPC se_rfmci and VLE, SPE2 and LSP insns with -many | | | 3152 [v5,1/2] ld: Add --pdb option | | | 3151 [v5,2/2] ld: Add minimal pdb generation | | | 3258 x86: correct CPU_AMX_{BF16,INT8}_FLAGS | | | 3272 x86: generalize gas documentation for disabling of ISA extensions | | | 3759 [V2,01/15] sframe.h: Add SFrame format definition | | | 3762 [V2,02/15] gas: add new command line option --gsframe | | | 3761 [V2,03/15] gas: generate .sframe from CFI directives | | | 3760 [V2,04/15] gas: testsuite: add new tests for SFrame unwind info | | | 3764 [V2,05/15] libsframe: add the SFrame library | | | 3766 [V2,06/15] bfd: linker: merge .sframe sections | | | 3763 [V2,07/15] readelf/objdump: support for SFrame section | | | 3765 [V2,08/15] unwinder: generate backtrace using SFrame format | | | 3770 [V2,09/15] unwinder: Add SFrame unwinder tests | | | 3769 [V2,10/15] gdb: sim: buildsystem changes to accommodate libsframe | | | 3771 [V2,11/15] libctf: add libsframe to LDFLAGS and LIBS | | | 3768 [V2,12/15] src-release.sh: Add libsframe | | | 3767 [V2,13/15] binutils/NEWS: add text for SFrame support | | | 3772 [V2,14/15] gas/NEWS: add text about new command line option and SFrame support | | | 3773 [V2,15/15] doc: add SFrame spec file | | | 3999 [1/1] IBM zSystems: Issue error for *DBL relocs on misaligned symbols | | | 4141 xtensa: use definitions from xtensa-config.h | | | 4272 x86: Disable AVX-VNNI when disabling AVX2 | | | 4998 x86: re-work AVX-VNNI support | | | 5276 Fix addr2line test for ppc64 elfv1 and mingw | | | 5424 binutils: Remove unused substitution PROGRAM | | | 5433 [v2,1/8] RISC-V: Add a space at the end of pinfo | | | 5435 [v2,2/8] RISC-V: Fix obvious misalignments ('Zbb'/'Zba') | | | 5437 [v2,3/8] RISC-V: Remove spaces in opcode entries | | | 5436 [v2,4/8] RISC-V: Remove unused instruction macros | | | 5440 [v2,5/8] RISC-V: Complete tidying up with SCALL and SBREAK | | | 5442 [v2,6/8] RISC-V: Tidying up with fmv.w.x and fmv.x.w | | | 5438 [v2,7/8] RISC-V: Make alias instructions aliases | | | 5441 [v2,8/8] RISC-V: Use defined mask and match values | | | 5439 RISC-V: Remove RV32EF conflict | | | 5614 [05/10] Add handler for more i386_cpu_flags | +------------+--------------------------------------------------------------------------------------+ + git config pull.rebase false + git fetch origin master From github.com:wangliu-iscas/binutils-gdb * branch master -> FETCH_HEAD + git checkout master Switched to a new branch 'master' branch 'master' set up to track 'origin/master'. + git pull origin master From github.com:wangliu-iscas/binutils-gdb * branch master -> FETCH_HEAD Already up to date. + git fetch origin upstream-master From github.com:wangliu-iscas/binutils-gdb * branch upstream-master -> FETCH_HEAD + git checkout upstream-master Switched to a new branch 'upstream-master' branch 'upstream-master' set up to track 'origin/upstream-master'. + git remote add upstream https://sourceware.org/git/binutils-gdb.git + git pull upstream master From https://sourceware.org/git/binutils-gdb * branch master -> FETCH_HEAD * [new branch] master -> upstream/master Already up to date. + git push -u origin upstream-master Everything up-to-date branch 'upstream-master' set up to track 'origin/upstream-master'. + git checkout master Switched to branch 'master' Your branch is up to date with 'origin/master'. + git merge upstream-master Already up to date. + git push -u origin master Everything up-to-date branch 'master' set up to track 'origin/master'. + branchname=series2855-patch5614 ++ grep 'series2855-patch5614$' ++ git branch -a + checkbranch= + checkbranchresult=null + '[' null = series2855-patch5614 ']' + git checkout -b series2855-patch5614 Switched to a new branch 'series2855-patch5614' ++ curl https://patchwork.plctlab.org/api/1.2/series/2855/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 2349 100 2349 0 0 29734 0 --:--:-- --:--:-- --:--:-- 29734 + series_response='{"id":2855,"url":"https://patchwork.plctlab.org/api/1.2/series/2855/","web_url":"https://patchwork.plctlab.org/project/binutils-gdb/list/?series=2855","project":{"id":2,"url":"https://patchwork.plctlab.org/api/1.2/projects/2/","name":"binutils-gdb","link_name":"binutils-gdb","list_id":"binutils.sourceware.org","list_email":"binutils@sourceware.org","web_url":"https://sourceware.org/mailman/listinfo/binutils","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"Add new Intel Sierra Forest, Grand Ridge, Granite Rapids Instructions","date":"2022-10-19T14:55:58","submitter":{"id":113,"url":"https://patchwork.plctlab.org/api/1.2/people/113/","name":"Haochen Jiang","email":"haochen.jiang@intel.com"},"version":2,"total":10,"received_total":2,"received_all":false,"mbox":"https://patchwork.plctlab.org/series/2855/mbox/","cover_letter":{"id":356,"url":"https://patchwork.plctlab.org/api/1.2/covers/356/","web_url":"https://patchwork.plctlab.org/project/binutils-gdb/cover/20221019145608.45213-1-haochen.jiang@intel.com/","msgid":"<20221019145608.45213-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-19T14:55:58","name":"[v2,0/10] Add new Intel Sierra Forest, Grand Ridge, Granite Rapids Instructions","mbox":"https://patchwork.plctlab.org/project/binutils-gdb/cover/20221019145608.45213-1-haochen.jiang@intel.com/mbox/"},"patches":[{"id":5616,"url":"https://patchwork.plctlab.org/api/1.2/patches/5616/","web_url":"https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/","msgid":"<20221019145608.45213-5-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-19T14:56:02","name":"[04/10] Support Intel CMPccXADD","mbox":"https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/"},{"id":5614,"url":"https://patchwork.plctlab.org/api/1.2/patches/5614/","web_url":"https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-6-haochen.jiang@intel.com/","msgid":"<20221019145608.45213-6-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-19T14:56:03","name":"[05/10] Add handler for more i386_cpu_flags","mbox":"https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-6-haochen.jiang@intel.com/mbox/"}]}' ++ jq '.patches[] | (.id|tostring) + "," + .mbox' ++ echo '{"id":2855,"url":"https://patchwork.plctlab.org/api/1.2/series/2855/","web_url":"https://patchwork.plctlab.org/project/binutils-gdb/list/?series=2855","project":{"id":2,"url":"https://patchwork.plctlab.org/api/1.2/projects/2/","name":"binutils-gdb","link_name":"binutils-gdb","list_id":"binutils.sourceware.org","list_email":"binutils@sourceware.org","web_url":"https://sourceware.org/mailman/listinfo/binutils","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"name":"Add new Intel Sierra Forest, Grand Ridge, Granite Rapids Instructions","date":"2022-10-19T14:55:58","submitter":{"id":113,"url":"https://patchwork.plctlab.org/api/1.2/people/113/","name":"Haochen Jiang","email":"haochen.jiang@intel.com"},"version":2,"total":10,"received_total":2,"received_all":false,"mbox":"https://patchwork.plctlab.org/series/2855/mbox/","cover_letter":{"id":356,"url":"https://patchwork.plctlab.org/api/1.2/covers/356/","web_url":"https://patchwork.plctlab.org/project/binutils-gdb/cover/20221019145608.45213-1-haochen.jiang@intel.com/","msgid":"<20221019145608.45213-1-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-19T14:55:58","name":"[v2,0/10] Add new Intel Sierra Forest, Grand Ridge, Granite Rapids Instructions","mbox":"https://patchwork.plctlab.org/project/binutils-gdb/cover/20221019145608.45213-1-haochen.jiang@intel.com/mbox/"},"patches":[{"id":5616,"url":"https://patchwork.plctlab.org/api/1.2/patches/5616/","web_url":"https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/","msgid":"<20221019145608.45213-5-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-19T14:56:02","name":"[04/10] Support Intel CMPccXADD","mbox":"https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/"},{"id":5614,"url":"https://patchwork.plctlab.org/api/1.2/patches/5614/","web_url":"https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-6-haochen.jiang@intel.com/","msgid":"<20221019145608.45213-6-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-19T14:56:03","name":"[05/10] Add handler for more i386_cpu_flags","mbox":"https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-6-haochen.jiang@intel.com/mbox/"}]}' + patchid_patchurl='"5616,https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/" "5614,https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-6-haochen.jiang@intel.com/mbox/"' + IFS=, + read -r series_patch_id series_patch_url + echo '"5616,https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/" "5614,https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-6-haochen.jiang@intel.com/mbox/"' ++ echo '"5616' ++ sed 's/"//g' + series_patch_id=5616 ++ echo 'https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/"' ++ sed 's/"//g' + series_patch_url=https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/ ++ git rev-parse HEAD + commitid_before=508ccf9b3e1db355037a4a1c9004efe0d6d3ffbf + eval '+++ declare -p bout bret declare -- bout="Applying: Support Intel CMPccXADD error: sha1 information is lacking or useless (gas/doc/c-i386.texi). error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 Support Intel CMPccXADD When you have resolved this problem, run \"git am --continue\". If you prefer to skip this patch, run \"git am --skip\" instead. To restore the original branch and stop patching, run \"git am --abort\"." declare -- bret="128" ++ berr='\''++++ git_am https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 310k 100 310k 0 0 1991k 0 --:--:-- --:--:-- --:--:-- 1991k +++ bout='\''\'\'''\''Applying: Support Intel CMPccXADD error: sha1 information is lacking or useless (gas/doc/c-i386.texi). error: could not build fake ancestor hint: Use '\''\'\'''\''\'\''\'\'''\'''\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\''\'\''\'\'''\'''\''\'\'''\'' to see the failed patch Patch failed at 0001 Support Intel CMPccXADD When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\''\'\'''\'' +++ bret=128'\'' ++ declare -p berr declare -- berr="++++ git_am https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 310k 100 310k 0 0 1991k 0 --:--:-- --:--:-- --:--:-- 1991k +++ bout='\''Applying: Support Intel CMPccXADD error: sha1 information is lacking or useless (gas/doc/c-i386.texi). error: could not build fake ancestor hint: Use '\''\\'\'''\''git am --show-current-patch=diff'\''\\'\'''\'' to see the failed patch Patch failed at 0001 Support Intel CMPccXADD When you have resolved this problem, run \"git am --continue\". If you prefer to skip this patch, run \"git am --skip\" instead. To restore the original branch and stop patching, run \"git am --abort\".'\'' +++ bret=128"' ++ +++ declare -p bout bret /tmp/jenkins12518415780046909484.sh: line 113: +++: command not found ++ declare -- 'bout=Applying: Support Intel CMPccXADD error: sha1 information is lacking or useless (gas/doc/c-i386.texi). error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 Support Intel CMPccXADD When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' ++ declare -- bret=128 ++ ++ 'berr=++++ git_am https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 310k 100 310k 0 0 1991k 0 --:--:-- --:--:-- --:--:-- 1991k +++ bout='\''Applying: Support Intel CMPccXADD error: sha1 information is lacking or useless (gas/doc/c-i386.texi). error: could not build fake ancestor hint: Use '\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\'' to see the failed patch Patch failed at 0001 Support Intel CMPccXADD When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\'' +++ bret=128' /tmp/jenkins12518415780046909484.sh: line 138: ++: command not found ++ ++ declare -p berr /tmp/jenkins12518415780046909484.sh: line 139: ++: command not found ++ declare -- 'berr=++++ git_am https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 310k 100 310k 0 0 1991k 0 --:--:-- --:--:-- --:--:-- 1991k +++ bout='\''Applying: Support Intel CMPccXADD error: sha1 information is lacking or useless (gas/doc/c-i386.texi). error: could not build fake ancestor hint: Use '\''\'\'''\''git am --show-current-patch=diff'\''\'\'''\'' to see the failed patch Patch failed at 0001 Support Intel CMPccXADD When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".'\'' +++ bret=128' ++ git rev-parse HEAD + commitid_after=508ccf9b3e1db355037a4a1c9004efe0d6d3ffbf + '[' 128 = 0 ']' + [[ ++++ git_am https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/ ++++ patch_url=https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/ ++++ curl https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-5-haochen.jiang@intel.com/mbox/ ++++ git am -3 --empty=drop % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 310k 100 310k 0 0 1991k 0 --:--:-- --:--:-- --:--:-- 1991k +++ bout='Applying: Support Intel CMPccXADD error: sha1 information is lacking or useless (gas/doc/c-i386.texi). error: could not build fake ancestor hint: Use '\''git am --show-current-patch=diff'\'' to see the failed patch Patch failed at 0001 Support Intel CMPccXADD When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".' +++ bret=128 =~ sha1 information is lacking or useless ]] + submit_check warning Unresolved https://patchwork.plctlab.org/jenkins/job/binutils-gdb/155/consoleText 'Git am fail log' + check_state=warning + patch_state=Unresolved + repo_url=https://patchwork.plctlab.org/jenkins/job/binutils-gdb/155/consoleText + DESCRIPTION='Git am fail log' + curl -X POST -H 'Authorization: Token [*******]' -F state=warning -F target_url=https://patchwork.plctlab.org/jenkins/job/binutils-gdb/155/consoleText -F context=binutils-gdb-check -F 'description=Git am fail log' https://patchwork.plctlab.org/api/patches/5614/checks/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0 100 974 100 429 100 545 7396 9396 --:--:-- --:--:-- --:--:-- 16793 {"id":1143,"url":"https://patchwork.plctlab.org/api/patches/5614/checks/1143/","user":{"id":1,"url":"https://patchwork.plctlab.org/api/users/1/","username":"snail","first_name":"","last_name":"","email":"wangliu@iscas.ac.cn"},"date":"2022-10-19T18:15:37.718201","state":"warning","target_url":"https://patchwork.plctlab.org/jenkins/job/binutils-gdb/155/consoleText","context":"binutils-gdb-check","description":"Git am fail log"}+ curl -X PATCH -H 'Authorization: Token [*******]' -F state=Unresolved https://patchwork.plctlab.org/api/1.2/patches/5614/ % Total % Received % Xferd Average Speed Time Time Time Current Dload Upload Total Spent Left Speed 0 0 0 0 0 0 0 0 --:--:-- --:--:-- --:--:-- 0{"id":5614,"url":"https://patchwork.plctlab.org/api/1.2/patches/5614/","web_url":"https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-6-haochen.jiang@intel.com/","project":{"id":2,"url":"https://patchwork.plctlab.org/api/1.2/projects/2/","name":"binutils-gdb","link_name":"binutils-gdb","list_id":"binutils.sourceware.org","list_email":"binutils@sourceware.org","web_url":"https://sourceware.org/mailman/listinfo/binutils","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20221019145608.45213-6-haochen.jiang@intel.com>","list_archive_url":null,"date":"2022-10-19T14:56:03","name":"[05/10] Add handler for more i386_cpu_flags","commit_ref":null,"pull_url":null,"state":"unresolved","archived":false,"hash":"de9287e595cb1ebbcb24a1e130111d33c661e565","submitter":{"id":113,"url":"https://patchwork.plctlab.org/api/1.2/people/113/","name":"Haochen Jiang","email":"haochen.jiang@intel.com"},"delegate":null,"mbox":"https://patchwork.plctlab.org/project/binutils-gdb/patch/20221019145608.45213-6-haochen.jiang@intel.com/mbox/","series":[{"id":2855,"url":"https://patchwork.plctlab.org/api/1.2/series/2855/","web_url":"https://patchwork.plctlab.org/project/binutils-gdb/list/?series=2855","date":"2022-10-19T14:55:58","name":"Add new Intel Sierra Forest, Grand Ridge, Granite Rapids Instructions","version":2,"mbox":"https://patchwork.plctlab.org/series/2855/mbox/"}],"comments":"https://patchwork.plctlab.org/api/patches/5614/comments/","check":"warning","checks":"https://patchwork.plctlab.org/api/patches/5614/checks/","tags":{},"headers":{"Return-Path":"","Delivered-To":["ouuuleilei@gmail.com","binutils@sourceware.org"],"Received":["by 2002:a5d:4ac7:0:0:0:0:0 with SMTP id y7csp371237wrs;\n Wed, 19 Oct 2022 07:56:27 -0700 (PDT)","from sourceware.org (server2.sourceware.org. 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a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org;\n\ts=default; t=1666191386;\n\tbh=WoRaB68vf7uyWQhFOAzwdOA2WSE/0c4dWZnmomgjmPc=;\n\th=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe:\n\t List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc:\n\t From;\n\tb=ymB/W3DmFpLD7z91MdRuJn7xf1KWai5EfHgvLESNsMtW+YzJqXKlOeOGUFaBs4IBW\n\t x2XKGBvmCGW2UhjTAtndEzBqruM78xsjZ6uR0ysC0OapoT4/mTOZXq6kHKI6SVqsgD\n\t JXpQsDQYcyXqq6NlrOiusLWpQY81U2AO35T6WXm0=","X-Original-To":"binutils@sourceware.org","DMARC-Filter":"OpenDMARC Filter v1.4.1 sourceware.org 8ADA23858C83","X-IronPort-AV":["E=McAfee;i=\"6500,9779,10505\"; a=\"289749462\"","E=Sophos;i=\"5.95,196,1661842800\"; d=\"scan'208\";a=\"289749462\"","E=McAfee;i=\"6500,9779,10505\"; a=\"804336399\"","E=Sophos;i=\"5.95,196,1661842800\"; d=\"scan'208\";a=\"804336399\""],"X-ExtLoop1":"1","To":"binutils@sourceware.org","Subject":"[PATCH 05/10] Add handler for more i386_cpu_flags","Date":"Wed, 19 Oct 2022 22:56:03 +0800","Message-Id":"<20221019145608.45213-6-haochen.jiang@intel.com>","X-Mailer":"git-send-email 2.18.1","In-Reply-To":"<20221019145608.45213-1-haochen.jiang@intel.com>","References":"<20221019145608.45213-1-haochen.jiang@intel.com>","X-Spam-Status":"No, score=-11.7 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH,\n DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0,\n SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6","X-Spam-Checker-Version":"SpamAssassin 3.4.6 (2021-04-09) on\n server2.sourceware.org","X-BeenThere":"binutils@sourceware.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"Binutils mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","From":"Haochen Jiang via Binutils ","Reply-To":"Haochen Jiang ","Cc":"Kong Lingling ","Errors-To":"binutils-bounces+ouuuleilei=gmail.com@sourceware.org","Sender":"\"Binutils\" ","X-getmail-retr 100 10391 100 10241 100 150 192k 2884 --:--:-- --:--:-- --:--:-- 191k 100 10391 100 10241 100 150 185k 2777 --:--:-- --:--:-- --:--:-- 184k ieved-from-mailbox":"=?utf-8?q?INBOX?=","X-GMAIL-THRID":"=?utf-8?q?1747128300264154717?=","X-GMAIL-MSGID":"=?utf-8?q?1747128300264154717?="},"content":"From: Kong Lingling \n\ngas/ChangeLog:\n\n\t* config/tc-i386.c (cpu_flags_all_zero): Add new ARRAY_SIZE handle.\n\t(cpu_flags_equal): Ditto.\n\t(cpu_flags_and): Ditto.\n\t(cpu_flags_or): Ditto.\n\t(cpu_flags_and_not): Ditto.\n---\n gas/config/tc-i386.c | 17 +++++++++++++++++\n 1 file changed, 17 insertions(+)","diff":"diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c\nindex f887074e60..81bbf22fec 100644\n--- a/gas/config/tc-i386.c\n+++ b/gas/config/tc-i386.c\n@@ -1618,6 +1618,10 @@ cpu_flags_all_zero (const union i386_cpu_flags *x)\n {\n switch (ARRAY_SIZE(x->array))\n {\n+ case 5:\n+ if (x->array[4])\n+\treturn 0;\n+ /* Fall through. */\n case 4:\n if (x->array[3])\n \treturn 0;\n@@ -1643,6 +1647,10 @@ cpu_flags_equal (const union i386_cpu_flags *x,\n {\n switch (ARRAY_SIZE(x->array))\n {\n+ case 5:\n+ if (x->array[4] != y->array[4])\n+\treturn 0;\n+ /* Fall through. */\n case 4:\n if (x->array[3] != y->array[3])\n \treturn 0;\n@@ -1675,6 +1683,9 @@ cpu_flags_and (i386_cpu_flags x, i386_cpu_flags y)\n {\n switch (ARRAY_SIZE (x.array))\n {\n+ case 5:\n+ x.array [4] &= y.array [4];\n+ /* Fall through. */\n case 4:\n x.array [3] &= y.array [3];\n /* Fall through. */\n@@ -1698,6 +1709,9 @@ cpu_flags_or (i386_cpu_flags x, i386_cpu_flags y)\n {\n switch (ARRAY_SIZE (x.array))\n {\n+ case 5:\n+ x.array [4] |= y.array [4];\n+ /* Fall through. */\n case 4:\n x.array [3] |= y.array [3];\n /* Fall through. */\n@@ -1721,6 +1735,9 @@ cpu_flags_and_not (i386_cpu_flags x, i386_cpu_flags y)\n {\n switch (ARRAY_SIZE (x.array))\n {\n+ case 5:\n+ x.array [4] &= ~y.array [4];\n+ /* Fall through. */\n case 4:\n x.array [3] &= ~y.array [3];\n /* Fall through. */\n","prefixes":["05/10"]}+ exit 1 Build step 'Execute shell' marked build as failure Finished: FAILURE