diff mbox series

RISC-V: Fix PR109399 VSETVL PASS bug

Message ID 20230404084630.48657-1-juzhe.zhong@rivai.ai
State Accepted
Headers
Series RISC-V: Fix PR109399 VSETVL PASS bug |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

juzhe.zhong@rivai.ai April 4, 2023, 8:46 a.m. UTC 
  From: Juzhe-Zhong <juzhe.zhong@rivai.ai>

This patch fix bug:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109399

        PR 109399

gcc/ChangeLog:

        * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local demand fusion.

gcc/testsuite/ChangeLog:

        * gcc.target/riscv/rvv/vsetvl/pr109399.c: New test.

---
 gcc/config/riscv/riscv-vsetvl.cc                   |  8 +++++++-
 .../gcc.target/riscv/rvv/vsetvl/pr109399.c         | 14 ++++++++++++++
 2 files changed, 21 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109399.c

Comments

Jeff Law April 5, 2023, 1:26 a.m. UTC | #1 
On 4/4/23 02:46, juzhe.zhong@rivai.ai wrote:
> From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
> 
> This patch fix bug:
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109399
> 
>          PR 109399
> 
> gcc/ChangeLog:
> 
>          * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local demand fusion.
> 
> gcc/testsuite/ChangeLog:
> 
>          * gcc.target/riscv/rvv/vsetvl/pr109399.c: New test.
Thanks.  Installed.

I noted that change_vsetvl_insn does not have a function comment.  Can 
you please add one.  Perhaps something like this:

/* INSN is either a vector configuration insn, or an insn with a vtype
    that is immediately preceded by a vector configuration insn.  In
    both cases, change the vector configuration insn to utilize the
    vector configuration state in INFO.  */
diff mbox series

Patch

diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
index 4d043c0645b..7e8a5376705 100644
--- a/gcc/config/riscv/riscv-vsetvl.cc
+++ b/gcc/config/riscv/riscv-vsetvl.cc
@@ -2715,7 +2715,13 @@  pass_vsetvl::compute_local_backward_infos (const bb_info *bb)
 	      if (!(propagate_avl_across_demands_p (change, info)
 		    && !reg_available_p (insn, change))
 		  && change.compatible_p (info))
-		info = change.merge (info);
+		{
+		  info = change.merge (info);
+		  /* Fix PR109399, we should update user vsetvl instruction
+		     if there is a change in demand fusion.  */
+		  if (vsetvl_insn_p (insn->rtl ()))
+		    change_vsetvl_insn (insn, info);
+		}
 	    }
 	  change = info;
 	}
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109399.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109399.c
new file mode 100644
index 00000000000..b3abad7a8bf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109399.c
@@ -0,0 +1,14 @@ 
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+void foo(void *in1, void *in2, void *in3, void *out, size_t n) {
+  size_t vl = __riscv_vsetvlmax_e32m1();
+  vint32m1_t a = __riscv_vle32_v_i32m1(in1, vl);
+  vint32m1_t b = __riscv_vle32_v_i32m1_tu(a, in2, vl);
+  vint32m1_t c = __riscv_vle32_v_i32m1_tu(b, in3, vl);
+  __riscv_vse32_v_i32m1(out, c, vl);
+}
+
+/* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e32,\s*m1,\s*tu,\s*m[au]} 1 { target { no-opts "-O0"  no-opts "-Os" no-opts "-Oz" no-opts "-funroll-loops" no-opts "-g" } } } } */