diff mbox series

[8/9] arm64: dts: qcom: qcm2290: Add WCN3990 Wi-Fi node

Message ID 20230403-topic-rb1_qcm-v1-8-ca849b62ba07@linaro.org
State New
Headers
Series RB1 + QCM2290 support |

Commit Message

Konrad Dybcio April 3, 2023, 5:36 p.m. UTC 
  Add a node for the ATH10K SNoC-managed WCN3990 Wi-Fi.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 arch/arm64/boot/dts/qcom/qcm2290.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

Comments

Krzysztof Kozlowski April 4, 2023, 6:08 a.m. UTC | #1 
On 03/04/2023 19:36, Konrad Dybcio wrote:
> Add a node for the ATH10K SNoC-managed WCN3990 Wi-Fi.
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---

We had these talks a lot... All these 3-8 patches should be two patches:
1. SoC DTSI
2. Board DTS.

Splitting superficially patchset on initial submission does not make
sense. If you sent it in separate patchsets during development - release
early, release often - then of course it would be fine. But hoarding
patches till everything is ready is not the approach we want (and we
made it clear that SM8550 should be the last such platform) and does not
justify later fake-splitting.

Best regards,
Krzysztof
Konrad Dybcio April 4, 2023, 9:55 a.m. UTC | #2 
On 4.04.2023 08:08, Krzysztof Kozlowski wrote:
> On 03/04/2023 19:36, Konrad Dybcio wrote:
>> Add a node for the ATH10K SNoC-managed WCN3990 Wi-Fi.
>>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>> ---
> 
> We had these talks a lot... All these 3-8 patches should be two patches:
> 1. SoC DTSI
> 2. Board DTS.
> 
> Splitting superficially patchset on initial submission does not make
> sense. If you sent it in separate patchsets during development - release
> early, release often - then of course it would be fine. But hoarding
> patches till everything is ready is not the approach we want (and we
> made it clear that SM8550 should be the last such platform)
That wasn't my intention.

This patchset is "feature-rich", as it piggybacks off of Shawn and Loic
having submitted the driver parts long long ago and SM6115 being quite
well-supported (and almost identical to the QCM). Patches 4-8 were not
"held hostage" waiting for full fat platform enablement, but were
essentially "copy-paste, adjust, verify" and that does not require a
lot of manpower or time.. I split them to ease the review (~850 LoC @
PATCH 3, ~1900 LoC @ PATCH 8).

In any case, the fact that there's so many features submitted with
the initial posting is not related to me holding onto them on
purpose, they were created together, probably within 20 minutes of
each other.. This should have been posted a long time ago with even
more things (like regulators), but there's been some communication
issues with Qualcomm..

LMK how you want me to proceed with this.

Konrad

and does not
> justify later fake-splitting.
> 
> Best regards,
> Krzysztof
>
Krzysztof Kozlowski April 4, 2023, 10:04 a.m. UTC | #3 
On 04/04/2023 11:55, Konrad Dybcio wrote:
> 
> 
> On 4.04.2023 08:08, Krzysztof Kozlowski wrote:
>> On 03/04/2023 19:36, Konrad Dybcio wrote:
>>> Add a node for the ATH10K SNoC-managed WCN3990 Wi-Fi.
>>>
>>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>>> ---
>>
>> We had these talks a lot... All these 3-8 patches should be two patches:
>> 1. SoC DTSI
>> 2. Board DTS.
>>
>> Splitting superficially patchset on initial submission does not make
>> sense. If you sent it in separate patchsets during development - release
>> early, release often - then of course it would be fine. But hoarding
>> patches till everything is ready is not the approach we want (and we
>> made it clear that SM8550 should be the last such platform)
> That wasn't my intention.
> 
> This patchset is "feature-rich", as it piggybacks off of Shawn and Loic
> having submitted the driver parts long long ago and SM6115 being quite
> well-supported (and almost identical to the QCM). Patches 4-8 were not
> "held hostage" waiting for full fat platform enablement, but were
> essentially "copy-paste, adjust, verify" and that does not require a
> lot of manpower or time.. I split them to ease the review (~850 LoC @
> PATCH 3, ~1900 LoC @ PATCH 8).
> 
> In any case, the fact that there's so many features submitted with
> the initial posting is not related to me holding onto them on
> purpose, they were created together, probably within 20 minutes of
> each other.. This should have been posted a long time ago with even
> more things (like regulators), but there's been some communication
> issues with Qualcomm..
> 
> LMK how you want me to proceed with this.

All these 3-8 patches should be two patches. If you have separate PMIC,
then could be three patches.

Best regards,
Krzysztof
Krzysztof Kozlowski April 4, 2023, 10:05 a.m. UTC | #4 
On 04/04/2023 12:04, Krzysztof Kozlowski wrote:
> On 04/04/2023 11:55, Konrad Dybcio wrote:
>>
>>
>> On 4.04.2023 08:08, Krzysztof Kozlowski wrote:
>>> On 03/04/2023 19:36, Konrad Dybcio wrote:
>>>> Add a node for the ATH10K SNoC-managed WCN3990 Wi-Fi.
>>>>
>>>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>>>> ---
>>>
>>> We had these talks a lot... All these 3-8 patches should be two patches:
>>> 1. SoC DTSI
>>> 2. Board DTS.
>>>
>>> Splitting superficially patchset on initial submission does not make
>>> sense. If you sent it in separate patchsets during development - release
>>> early, release often - then of course it would be fine. But hoarding
>>> patches till everything is ready is not the approach we want (and we
>>> made it clear that SM8550 should be the last such platform)
>> That wasn't my intention.
>>
>> This patchset is "feature-rich", as it piggybacks off of Shawn and Loic
>> having submitted the driver parts long long ago and SM6115 being quite
>> well-supported (and almost identical to the QCM). Patches 4-8 were not
>> "held hostage" waiting for full fat platform enablement, but were
>> essentially "copy-paste, adjust, verify" and that does not require a
>> lot of manpower or time.. I split them to ease the review (~850 LoC @
>> PATCH 3, ~1900 LoC @ PATCH 8).
>>
>> In any case, the fact that there's so many features submitted with
>> the initial posting is not related to me holding onto them on
>> purpose, they were created together, probably within 20 minutes of
>> each other.. This should have been posted a long time ago with even
>> more things (like regulators), but there's been some communication
>> issues with Qualcomm..
>>
>> LMK how you want me to proceed with this.
> 
> All these 3-8 patches should be two patches. If you have separate PMIC,
> then could be three patches.

Correction: 3-9 should be combined. 9 is even more surprising, because
it is a four-liner...

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
index 825623243787..ae5abc76bcc7 100644
--- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
@@ -1159,6 +1159,28 @@  apps_smmu: iommu@c600000 {
 				     <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		wifi: wifi@c800000 {
+			compatible = "qcom,wcn3990-wifi";
+			reg = <0x0 0x0c800000 0x0 0x800000>;
+			reg-names = "membase";
+			memory-region = <&wlan_msa_mem>;
+			interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>;
+			iommus = <&apps_smmu 0x1a0 0x1>;
+			qcom,msa-fixed-perm;
+			status = "disabled";
+		};
+
 		watchdog@f017000 {
 			compatible = "qcom,apss-wdt-qcm2290", "qcom,kpss-wdt";
 			reg = <0x0 0x0f017000 0x0 0x1000>;