diff mbox series

[2/2] gpiolib: of: add polarity quirk for Freescale PCIe controller

Message ID 20221027065553.801153-2-dmitry.torokhov@gmail.com
State New
Headers
Series [1/2] gpiolib: of: factor out quirk setting polarity via separate property |

Commit Message

Dmitry Torokhov Oct. 27, 2022, 6:55 a.m. UTC 
  Bindings for Freescale PCIe controller use a separate property called
"reset-gpio-active-high" to control polarity of its reset line, add it
to the list of quirks in gpiolib so that gpiod API can be used in the
driver.

Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
---
 drivers/gpio/gpiolib-of.c | 9 +++++++++
 1 file changed, 9 insertions(+)

Comments

kernel test robot Oct. 28, 2022, 4:21 p.m. UTC | #1 
Hi Dmitry,

I love your patch! Yet something to improve:

[auto build test ERROR on brgl/gpio/for-next]
[also build test ERROR on next-20221028]
[cannot apply to linus/master v6.1-rc2]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Dmitry-Torokhov/gpiolib-of-factor-out-quirk-setting-polarity-via-separate-property/20221027-145956
base:   https://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git gpio/for-next
patch link:    https://lore.kernel.org/r/20221027065553.801153-2-dmitry.torokhov%40gmail.com
patch subject: [PATCH 2/2] gpiolib: of: add polarity quirk for Freescale PCIe controller
config: arm-buildonly-randconfig-r003-20221026
compiler: clang version 16.0.0 (https://github.com/llvm/llvm-project 791a7ae1ba3efd6bca96338e10ffde557ba83920)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install arm cross compiling tool for clang build
        # apt-get install binutils-arm-linux-gnueabi
        # https://github.com/intel-lab-lkp/linux/commit/5a0b7be6ee388623c4bbd3f9e97249cf0f96096a
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Dmitry-Torokhov/gpiolib-of-factor-out-quirk-setting-polarity-via-separate-property/20221027-145956
        git checkout 5a0b7be6ee388623c4bbd3f9e97249cf0f96096a
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/gpio/ drivers/thermal/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> drivers/gpio/gpiolib-of.c:213:3: error: expected '}'
                   { "fsl,imx6sx-pcie", "reset-gpio", "reset-gpio-active-high" }
                   ^
   drivers/gpio/gpiolib-of.c:197:14: note: to match this '{'
           } gpios[] = {
                       ^
>> drivers/gpio/gpiolib-of.c:241:18: error: invalid application of 'sizeof' to an incomplete type 'const struct (unnamed struct at drivers/gpio/gpiolib-of.c:193:15)[]'
           for (i = 0; i < ARRAY_SIZE(gpios); i++) {
                           ^~~~~~~~~~~~~~~~~
   include/linux/kernel.h:55:32: note: expanded from macro 'ARRAY_SIZE'
   #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
                                  ^~~~~
   2 errors generated.


vim +213 drivers/gpio/gpiolib-of.c

   188	
   189	static void of_gpio_set_polarity_by_property(const struct device_node *np,
   190						     const char *propname,
   191						     enum of_gpio_flags *flags)
   192	{
   193		static const struct {
   194			const char *compatible;
   195			const char *gpio_propname;
   196			const char *polarity_propname;
   197		} gpios[] = {
   198	#if IS_ENABLED(CONFIG_FEC)
   199			/* Freescale Fast Ethernet Controller */
   200			{ "fsl,imx25-fec",   "phy-reset-gpios", "phy-reset-active-high" },
   201			{ "fsl,imx27-fec",   "phy-reset-gpios", "phy-reset-active-high" },
   202			{ "fsl,imx28-fec",   "phy-reset-gpios", "phy-reset-active-high" },
   203			{ "fsl,imx6q-fec",   "phy-reset-gpios", "phy-reset-active-high" },
   204			{ "fsl,mvf600-fec",  "phy-reset-gpios", "phy-reset-active-high" },
   205			{ "fsl,imx6sx-fec",  "phy-reset-gpios", "phy-reset-active-high" },
   206			{ "fsl,imx6ul-fec",  "phy-reset-gpios", "phy-reset-active-high" },
   207			{ "fsl,imx8mq-fec",  "phy-reset-gpios", "phy-reset-active-high" },
   208			{ "fsl,imx8qm-fec",  "phy-reset-gpios", "phy-reset-active-high" },
   209			{ "fsl,s32v234-fec", "phy-reset-gpios", "phy-reset-active-high" },
   210	#endif
   211	#if IS_ENABLED(CONFIG_PCI_IMX6)
   212			{ "fsl,imx6q-pcie",  "reset-gpio", "reset-gpio-active-high" }
 > 213			{ "fsl,imx6sx-pcie", "reset-gpio", "reset-gpio-active-high" }
   214			{ "fsl,imx6qp-pcie", "reset-gpio", "reset-gpio-active-high" }
   215			{ "fsl,imx7d-pcie",  "reset-gpio", "reset-gpio-active-high" }
   216			{ "fsl,imx8mq-pcie", "reset-gpio", "reset-gpio-active-high" }
   217			{ "fsl,imx8mm-pcie", "reset-gpio", "reset-gpio-active-high" }
   218			{ "fsl,imx8mp-pcie", "reset-gpio", "reset-gpio-active-high" }
   219	#endif
   220	
   221			/*
   222			 * The regulator GPIO handles are specified such that the
   223			 * presence or absence of "enable-active-high" solely controls
   224			 * the polarity of the GPIO line. Any phandle flags must
   225			 * be actively ignored.
   226			 */
   227	#if IS_ENABLED(CONFIG_REGULATOR_FIXED_VOLTAGE)
   228			{ "regulator-fixed",   "gpios",        "enable-active-high" },
   229			{ "regulator-fixed",   "gpio",         "enable-active-high" },
   230			{ "reg-fixed-voltage", "gpios",        "enable-active-high" },
   231			{ "reg-fixed-voltage", "gpio",         "enable-active-high" },
   232	#endif
   233	#if IS_ENABLED(CONFIG_REGULATOR_GPIO)
   234			{ "regulator-gpio",    "enable-gpio",  "enable-active-high" },
   235			{ "regulator-gpio",    "enable-gpios", "enable-active-high" },
   236	#endif
   237		};
   238		unsigned int i;
   239		bool active_high;
   240	
 > 241		for (i = 0; i < ARRAY_SIZE(gpios); i++) {
   242			if (of_device_is_compatible(np, gpios[i].compatible) &&
   243			    !strcmp(propname, gpios[i].gpio_propname)) {
   244				active_high = of_property_read_bool(np,
   245							gpios[i].polarity_propname);
   246				of_gpio_quirk_polarity(np, active_high, flags);
   247				break;
   248			}
   249		}
   250	}
   251
diff mbox series

Patch

diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c
index 331744c75faf..1d37172579d1 100644
--- a/drivers/gpio/gpiolib-of.c
+++ b/drivers/gpio/gpiolib-of.c
@@ -208,6 +208,15 @@  static void of_gpio_set_polarity_by_property(const struct device_node *np,
 		{ "fsl,imx8qm-fec",  "phy-reset-gpios", "phy-reset-active-high" },
 		{ "fsl,s32v234-fec", "phy-reset-gpios", "phy-reset-active-high" },
 #endif
+#if IS_ENABLED(CONFIG_PCI_IMX6)
+		{ "fsl,imx6q-pcie",  "reset-gpio", "reset-gpio-active-high" }
+		{ "fsl,imx6sx-pcie", "reset-gpio", "reset-gpio-active-high" }
+		{ "fsl,imx6qp-pcie", "reset-gpio", "reset-gpio-active-high" }
+		{ "fsl,imx7d-pcie",  "reset-gpio", "reset-gpio-active-high" }
+		{ "fsl,imx8mq-pcie", "reset-gpio", "reset-gpio-active-high" }
+		{ "fsl,imx8mm-pcie", "reset-gpio", "reset-gpio-active-high" }
+		{ "fsl,imx8mp-pcie", "reset-gpio", "reset-gpio-active-high" }
+#endif
 
 		/*
 		 * The regulator GPIO handles are specified such that the