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From: Bhupesh Sharma <bhupesh.sharma@linaro.org>
To: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org
Cc: agross@kernel.org, linux-kernel@vger.kernel.org,
linux-crypto@vger.kernel.org, andersson@kernel.org,
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Bhupesh Sharma <bhupesh.sharma@qcom-hackbox.linaro.org>
Subject: [PATCH v4 03/11] arm64: dts: qcom: sdm8550: Fix the BAM DMA engine
compatible string
Date: Fri, 31 Mar 2023 22:13:15 +0530
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| Series |
arm64: qcom: Enable Crypto Engine for a few Qualcomm SoCs
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Commit Message
Bhupesh Sharma
March 31, 2023, 4:43 p.m. UTC
From: Bhupesh Sharma <bhupesh.sharma@qcom-hackbox.linaro.org> As per documentation, Qualcomm SM8550 SoC supports BAM DMA engine v1.7.4, so use the correct compatible strings. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Comments
On 31.03.2023 18:43, Bhupesh Sharma wrote: > From: Bhupesh Sharma <bhupesh.sharma@qcom-hackbox.linaro.org> > > As per documentation, Qualcomm SM8550 SoC supports BAM DMA > engine v1.7.4, so use the correct compatible strings. > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi > index 9c24af40ee61..774e3295081c 100644 > --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi > @@ -1841,7 +1841,7 @@ pcie1_phy: phy@1c0e000 { > }; > > cryptobam: dma-controller@1dc4000 { > - compatible = "qcom,bam-v1.7.0"; > + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; > reg = <0x0 0x01dc4000 0x0 0x28000>; > interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; > #dma-cells = <1>;
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index 9c24af40ee61..774e3295081c 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -1841,7 +1841,7 @@ pcie1_phy: phy@1c0e000 { }; cryptobam: dma-controller@1dc4000 { - compatible = "qcom,bam-v1.7.0"; + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; reg = <0x0 0x01dc4000 0x0 0x28000>; interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; #dma-cells = <1>;