diff mbox series

[v2,1/7] dt-bindings: misc: Add the Lantiq PEF2466 E1/T1/J1 framer

Message ID 20230316122741.577663-2-herve.codina@bootlin.com
State New
Headers
Series Add the Lantiq PEF2256 audio support |

Commit Message

Herve Codina March 16, 2023, 12:27 p.m. UTC 
  The Lantiq PEF2256 is a framer and line interface component designed to
fulfill all required interfacing between an analog E1/T1/J1 line and the
digital PCM system highway/H.100 bus.

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
---
 .../bindings/misc/lantiq,pef2256.yaml         | 190 ++++++++++++++++++
 1 file changed, 190 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/misc/lantiq,pef2256.yaml

Comments

Krzysztof Kozlowski March 17, 2023, 8:54 a.m. UTC | #1 
On 16/03/2023 13:27, Herve Codina wrote:
> The Lantiq PEF2256 is a framer and line interface component designed to
> fulfill all required interfacing between an analog E1/T1/J1 line and the
> digital PCM system highway/H.100 bus.
> 
> Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> ---
>  .../bindings/misc/lantiq,pef2256.yaml         | 190 ++++++++++++++++++
>  1 file changed, 190 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/misc/lantiq,pef2256.yaml
> 
> diff --git a/Documentation/devicetree/bindings/misc/lantiq,pef2256.yaml b/Documentation/devicetree/bindings/misc/lantiq,pef2256.yaml
> new file mode 100644
> index 000000000000..1ba788d06a14
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/misc/lantiq,pef2256.yaml
> @@ -0,0 +1,190 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/misc/lantiq,pef2256.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Lantiq PEF2256
> +
> +maintainers:
> +  - Herve Codina <herve.codina@bootlin.com>
> +
> +description:
> +  The Lantiq PEF2256, also known as Infineon PEF2256 or FALC256, is a framer and
> +  line interface component designed to fulfill all required interfacing between
> +  an analog E1/T1/J1 line and the digital PCM system highway/H.100 bus.
> +
> +properties:
> +  compatible:
> +    const: lantiq,pef2256
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    items:
> +      - description: Master clock
> +
> +  clock-names:
> +    items:
> +      - const: mclk
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  reset-gpios:
> +    description:
> +      GPIO used to reset the device.
> +    maxItems: 1
> +
> +  pinctrl:
> +    allOf:
> +      - $ref: "/schemas/pinctrl/pinctrl.yaml#"

Drop quotes. Drop allOf, no need for it.

additionalProperties: false

> +
> +    patternProperties:
> +      '-pins$':
> +        type: object
> +        allOf:
> +          - $ref: "/schemas/pinctrl/pincfg-node.yaml#"

Drop quotes. Drop allOf, no need for it.

additionalProperties: false


> +
> +        properties:
> +          pins:
> +            enum: [ RPA, RPB, RPC, RPD, XPA, XPB, XPC, XPD ]
> +
> +          function:
> +            enum: [ SYPR, RFM, RFMB, RSIGM, RSIG, DLR, FREEZE, RFSP, LOS,
> +                    SYPX, XFMS, XSIG, TCLK, XMFB, XSIGM, DLX, XCLK, XLT,
> +                    GPI, GPOH, GPOL ]
> +
> +        required:
> +          - pins
> +          - function
> +
> +  lantiq,line-interface:
> +    $ref: /schemas/types.yaml#/definitions/string
> +    enum: [e1, t1j1]
> +    default: e1
> +    description: |
> +      The line interface type
> +        - e1: E1 line
> +        - t1j1: T1/J1 line
> +
> +  lantiq,sysclk-rate-hz:
> +    enum: [2048000, 4096000, 8192000, 16384000]
> +    default: 2048000
> +    description:
> +      Clock rate (Hz) on the system highway.

I am pretty sure we have discussions on sysclk for other drivers. First,
why you cannot use assigned-clock-rates? Or clk_get_rate() if this is
about being consumer?

Second, there is already system-clock-frequency property, so use it.

> +
> +  lantiq,data-rate-bps:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    enum: [2048000, 4096000, 8192000, 16384000]
> +    default: 2048000
> +    description:
> +      Data rate (bit per seconds) on the system highway.

Why do you need it? How is it different from clock? Do you expect some
DDR here?

> +
> +  lantiq,clock-falling-edge:
> +    $ref: /schemas/types.yaml#/definitions/flag
> +    description:
> +      Data is sent on falling edge of the clock (and received on the rising
> +      edge). If 'clock-falling-edge' is not present, data is sent on the
> +      rising edge (and received on the falling edge).
> +
> +  lantiq,channel-phase:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    enum: [0, 1, 2, 3, 4, 5, 6, 7]
> +    default: 0
> +    description:
> +      The pef2256 delivers a full frame (32 8bit time-slots in E1 and 24 8bit
> +      time-slots 8 8bit signaling in E1/J1) every 125us. This lead to a data
> +      rate of 2048000 bit/s. When lantiq,data-rate-bps is more than 2048000
> +      bit/s, the data (all 32 8bit) present in the frame are interleave with
> +      unused time-slots. The lantiq,channel-phase property allows to set the
> +      correct alignment of the interleave mechanism.
> +      For instance, suppose lantiq,data-rate-bps = 8192000 (ie 4*2048000), and
> +      lantiq,channel-phase = 2, the interleave schema with unused time-slots
> +      (nu) and used time-slots (XX) for TSi is
> +        nu nu XX nu nu nu XX nu nu nu XX nu
> +        <-- TSi --> <- TSi+1 -> <- TSi+2 ->
> +      With lantiq,data-rate-bps = 8192000, and lantiq,channel-phase = 1, the
> +      interleave schema is
> +        nu XX nu nu nu XX nu nu nu XX nu nu
> +        <-- TSi --> <- TSi+1 -> <- TSi+2 ->
> +      With lantiq,data-rate-bps = 4096000 (ie 2*2048000), and
> +      lantiq,channel-phase = 1, the interleave schema is
> +        nu    XX    nu    XX    nu    XX
> +        <-- TSi --> <- TSi+1 -> <- TSi+2 ->
> +
> +  lantiq,subordinate:
> +    $ref: /schemas/types.yaml#/definitions/flag
> +    description:
> +      If present, the pef2256 works in subordinate mode. In this mode it
> +      synchronizes on line interface clock signals. Otherwise, it synchronizes
> +      on internal clocks.
> +
> +allOf:
> +  - if:
> +      properties:
> +        lantiq,line-interface:
> +          contains:
> +            const: e1
> +    then:
> +      properties:
> +        lantiq,frame-format:

Do not define properties in if:then, but in top-level. Disallow them or
customize for the specific cases in if:then

> +          $ref: /schemas/types.yaml#/definitions/string
> +          enum: [doubleframe, crc4-multiframe, auto-multiframe]
> +          default: doubleframe
> +          description: |
> +            The E1 line interface frame format
> +              - doubleframe: Doubleframe format
> +              - crc4-multiframe: CRC4 multiframe format
> +              - auto-multiframe: CRC4 multiframe format with interworking
> +                                 capabilities (ITU-T G.706 Annex B)
> +
> +    else:
> +      # T1/J1 line
> +      properties:
> +        lantiq,frame-format:

Same problem - definitions go to top level.

> +          $ref: /schemas/types.yaml#/definitions/string
> +          enum: [4frame, 12frame, 24frame, 72frame]
> +          default: 12frame
> +          description: |
> +            The T1/J1 line interface frame format
> +              - 4frame: 4-frame multiframe format (F4)
> +              - 12frame: 12-frame multiframe format (F12, D3/4)
> +              - 24frame: 24-frame multiframe format (ESF)
> +              - 72frame: 72-frame multiframe format (F72, remote switch mode)
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - clock-names
> +  - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/gpio/gpio.h>
> +    pef2256@2000000 {

Figure out some generic node name.

> +      compatible = "lantiq,pef2256";
> +      reg = <0x2000000 0xFF>;

Lowercase hex

> +      interrupts = <8 1>;

if 1 is interrupt flag, use proper defines.

> +      interrupt-parent = <&PIC>;
> +      clocks = <&clk_mclk>;
> +      clock-names = "mclk";
> +      reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
> +      lantiq,sysclk-rate-hz = <8192000>;
> +      lantiq,data-rate-bps = <4096000>;
> +
> +      pinctrl {
> +        pef2256_rpa_sypr: rpa-pins {
> +          pins = "RPA";
> +          function = "SYPR";
> +        };
> +        pef2256_xpa_sypx: xpa-pins {
> +          pins = "XPA";
> +          function = "SYPX";
> +        };
> +      };
> +    };

Best regards,
Krzysztof
Krzysztof Kozlowski March 17, 2023, 8:55 a.m. UTC | #2 
On 16/03/2023 13:27, Herve Codina wrote:
> The Lantiq PEF2256 is a framer and line interface component designed to

Your subject says PEF2466, commit msg and code say something different.

> fulfill all required interfacing between an analog E1/T1/J1 line and the
> digital PCM system highway/H.100 bus.
> 
> Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> ---


Best regards,
Krzysztof
Herve Codina March 20, 2023, 9:46 a.m. UTC | #3 
Hi Krzysztof

On Fri, 17 Mar 2023 09:54:07 +0100
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:

> On 16/03/2023 13:27, Herve Codina wrote:
> > The Lantiq PEF2256 is a framer and line interface component designed to
> > fulfill all required interfacing between an analog E1/T1/J1 line and the
> > digital PCM system highway/H.100 bus.
> > 
> > Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> > ---
> >  .../bindings/misc/lantiq,pef2256.yaml         | 190 ++++++++++++++++++
> >  1 file changed, 190 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/misc/lantiq,pef2256.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/misc/lantiq,pef2256.yaml b/Documentation/devicetree/bindings/misc/lantiq,pef2256.yaml
> > new file mode 100644
> > index 000000000000..1ba788d06a14
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/misc/lantiq,pef2256.yaml
> > @@ -0,0 +1,190 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/misc/lantiq,pef2256.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Lantiq PEF2256
> > +
> > +maintainers:
> > +  - Herve Codina <herve.codina@bootlin.com>
> > +
> > +description:
> > +  The Lantiq PEF2256, also known as Infineon PEF2256 or FALC256, is a framer and
> > +  line interface component designed to fulfill all required interfacing between
> > +  an analog E1/T1/J1 line and the digital PCM system highway/H.100 bus.
> > +
> > +properties:
> > +  compatible:
> > +    const: lantiq,pef2256
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    items:
> > +      - description: Master clock
> > +
> > +  clock-names:
> > +    items:
> > +      - const: mclk
> > +
> > +  interrupts:
> > +    maxItems: 1
> > +
> > +  reset-gpios:
> > +    description:
> > +      GPIO used to reset the device.
> > +    maxItems: 1
> > +
> > +  pinctrl:
> > +    allOf:
> > +      - $ref: "/schemas/pinctrl/pinctrl.yaml#"  
> 
> Drop quotes. Drop allOf, no need for it.
> 
> additionalProperties: false

Will be dropped and added in v3

> 
> > +
> > +    patternProperties:
> > +      '-pins$':
> > +        type: object
> > +        allOf:
> > +          - $ref: "/schemas/pinctrl/pincfg-node.yaml#"  
> 
> Drop quotes. Drop allOf, no need for it.
> 
> additionalProperties: false
> 

Will be dropped and added in v3

> 
> > +
> > +        properties:
> > +          pins:
> > +            enum: [ RPA, RPB, RPC, RPD, XPA, XPB, XPC, XPD ]
> > +
> > +          function:
> > +            enum: [ SYPR, RFM, RFMB, RSIGM, RSIG, DLR, FREEZE, RFSP, LOS,
> > +                    SYPX, XFMS, XSIG, TCLK, XMFB, XSIGM, DLX, XCLK, XLT,
> > +                    GPI, GPOH, GPOL ]
> > +
> > +        required:
> > +          - pins
> > +          - function
> > +
> > +  lantiq,line-interface:
> > +    $ref: /schemas/types.yaml#/definitions/string
> > +    enum: [e1, t1j1]
> > +    default: e1
> > +    description: |
> > +      The line interface type
> > +        - e1: E1 line
> > +        - t1j1: T1/J1 line
> > +
> > +  lantiq,sysclk-rate-hz:
> > +    enum: [2048000, 4096000, 8192000, 16384000]
> > +    default: 2048000
> > +    description:
> > +      Clock rate (Hz) on the system highway.  
> 
> I am pretty sure we have discussions on sysclk for other drivers. First,
> why you cannot use assigned-clock-rates? Or clk_get_rate() if this is
> about being consumer?
> 
> Second, there is already system-clock-frequency property, so use it.

Indeed, I will added the related clocks in the 'clocks' property and use
clk_get_rate() in the driver.

> 
> > +
> > +  lantiq,data-rate-bps:
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    enum: [2048000, 4096000, 8192000, 16384000]
> > +    default: 2048000
> > +    description:
> > +      Data rate (bit per seconds) on the system highway.  
> 
> Why do you need it? How is it different from clock? Do you expect some
> DDR here?

This is needed to set the data position on the data line.
If the data line clock (sysclk-rate-hz) is greater than 'data-rate-bps',
the device interleaves some holes between data in the full frame.

The exact position of the data and the holes is defined by 'channel-phase'

So, two information are needed:
- The number of slots available (deduced from 'lantiq,data-rate-bps')
- The slot to use in the available slots ('lantiq,channel-phase" property

lantiq,data-rate-bps is not a clock but a property used to set the frame
physical setting. ie the correct data position in the frame. 

> 
> > +
> > +  lantiq,clock-falling-edge:
> > +    $ref: /schemas/types.yaml#/definitions/flag
> > +    description:
> > +      Data is sent on falling edge of the clock (and received on the rising
> > +      edge). If 'clock-falling-edge' is not present, data is sent on the
> > +      rising edge (and received on the falling edge).
> > +
> > +  lantiq,channel-phase:
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    enum: [0, 1, 2, 3, 4, 5, 6, 7]
> > +    default: 0
> > +    description:
> > +      The pef2256 delivers a full frame (32 8bit time-slots in E1 and 24 8bit
> > +      time-slots 8 8bit signaling in E1/J1) every 125us. This lead to a data
> > +      rate of 2048000 bit/s. When lantiq,data-rate-bps is more than 2048000
> > +      bit/s, the data (all 32 8bit) present in the frame are interleave with
> > +      unused time-slots. The lantiq,channel-phase property allows to set the
> > +      correct alignment of the interleave mechanism.
> > +      For instance, suppose lantiq,data-rate-bps = 8192000 (ie 4*2048000), and
> > +      lantiq,channel-phase = 2, the interleave schema with unused time-slots
> > +      (nu) and used time-slots (XX) for TSi is
> > +        nu nu XX nu nu nu XX nu nu nu XX nu
> > +        <-- TSi --> <- TSi+1 -> <- TSi+2 ->
> > +      With lantiq,data-rate-bps = 8192000, and lantiq,channel-phase = 1, the
> > +      interleave schema is
> > +        nu XX nu nu nu XX nu nu nu XX nu nu
> > +        <-- TSi --> <- TSi+1 -> <- TSi+2 ->
> > +      With lantiq,data-rate-bps = 4096000 (ie 2*2048000), and
> > +      lantiq,channel-phase = 1, the interleave schema is
> > +        nu    XX    nu    XX    nu    XX
> > +        <-- TSi --> <- TSi+1 -> <- TSi+2 ->
> > +
> > +  lantiq,subordinate:
> > +    $ref: /schemas/types.yaml#/definitions/flag
> > +    description:
> > +      If present, the pef2256 works in subordinate mode. In this mode it
> > +      synchronizes on line interface clock signals. Otherwise, it synchronizes
> > +      on internal clocks.
> > +
> > +allOf:
> > +  - if:
> > +      properties:
> > +        lantiq,line-interface:
> > +          contains:
> > +            const: e1
> > +    then:
> > +      properties:
> > +        lantiq,frame-format:  
> 
> Do not define properties in if:then, but in top-level. Disallow them or
> customize for the specific cases in if:then

Will be changed in v3.

> 
> > +          $ref: /schemas/types.yaml#/definitions/string
> > +          enum: [doubleframe, crc4-multiframe, auto-multiframe]
> > +          default: doubleframe
> > +          description: |
> > +            The E1 line interface frame format
> > +              - doubleframe: Doubleframe format
> > +              - crc4-multiframe: CRC4 multiframe format
> > +              - auto-multiframe: CRC4 multiframe format with interworking
> > +                                 capabilities (ITU-T G.706 Annex B)
> > +
> > +    else:
> > +      # T1/J1 line
> > +      properties:
> > +        lantiq,frame-format:  
> 
> Same problem - definitions go to top level.

Will be changed in v3

> 
> > +          $ref: /schemas/types.yaml#/definitions/string
> > +          enum: [4frame, 12frame, 24frame, 72frame]
> > +          default: 12frame
> > +          description: |
> > +            The T1/J1 line interface frame format
> > +              - 4frame: 4-frame multiframe format (F4)
> > +              - 12frame: 12-frame multiframe format (F12, D3/4)
> > +              - 24frame: 24-frame multiframe format (ESF)
> > +              - 72frame: 72-frame multiframe format (F72, remote switch mode)
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - clocks
> > +  - clock-names
> > +  - interrupts
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/gpio/gpio.h>
> > +    pef2256@2000000 {  
> 
> Figure out some generic node name.

What do you think about 'framer' ?

> 
> > +      compatible = "lantiq,pef2256";
> > +      reg = <0x2000000 0xFF>;  
> 
> Lowercase hex

Will be changed in v3.

> 
> > +      interrupts = <8 1>;  
> 
> if 1 is interrupt flag, use proper defines.

Will be replaced by 'interrupts = <8 IRQ_TYPE_LEVEL_LOW>'
I will also change the interrupt-parent to interrupt-parent = <&intc>
to avoid mentioning PIC and avoid any misunderstanding as the PIC we use
does not follow the standard IRQ_TYPE_* flags.

> 
> > +      interrupt-parent = <&PIC>;
> > +      clocks = <&clk_mclk>;
> > +      clock-names = "mclk";
> > +      reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
> > +      lantiq,sysclk-rate-hz = <8192000>;
> > +      lantiq,data-rate-bps = <4096000>;
> > +
> > +      pinctrl {
> > +        pef2256_rpa_sypr: rpa-pins {
> > +          pins = "RPA";
> > +          function = "SYPR";
> > +        };
> > +        pef2256_xpa_sypx: xpa-pins {
> > +          pins = "XPA";
> > +          function = "SYPX";
> > +        };
> > +      };
> > +    };  
> 
> Best regards,
> Krzysztof
> 

Thanks for the review.

Best regards,
Hervé
Krzysztof Kozlowski March 20, 2023, 10:20 a.m. UTC | #4 
On 20/03/2023 10:46, Herve Codina wrote:
>>
>>> +
>>> +  lantiq,data-rate-bps:
>>> +    $ref: /schemas/types.yaml#/definitions/uint32
>>> +    enum: [2048000, 4096000, 8192000, 16384000]
>>> +    default: 2048000
>>> +    description:
>>> +      Data rate (bit per seconds) on the system highway.  
>>
>> Why do you need it? How is it different from clock? Do you expect some
>> DDR here?
> 
> This is needed to set the data position on the data line.
> If the data line clock (sysclk-rate-hz) is greater than 'data-rate-bps',
> the device interleaves some holes between data in the full frame.
> 
> The exact position of the data and the holes is defined by 'channel-phase'
> 
> So, two information are needed:
> - The number of slots available (deduced from 'lantiq,data-rate-bps')
> - The slot to use in the available slots ('lantiq,channel-phase" property
> 
> lantiq,data-rate-bps is not a clock but a property used to set the frame
> physical setting. ie the correct data position in the frame. 

OK

(...)

>>> +additionalProperties: false
>>> +
>>> +examples:
>>> +  - |
>>> +    #include <dt-bindings/gpio/gpio.h>
>>> +    pef2256@2000000 {  
>>
>> Figure out some generic node name.
> 
> What do you think about 'framer' ?

Sure, I don't have particular proposal.


Best regards,
Krzysztof
Rob Herring March 20, 2023, 6:51 p.m. UTC | #5 
On Mon, Mar 20, 2023 at 10:46:19AM +0100, Herve Codina via Alsa-devel wrote:
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> DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 3FF5FF80105
> Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key,
>  unprotected) header.d=bootlin.com header.i=@bootlin.com
>  header.a=rsa-sha256 header.s=gm1 header.b=m4O7nLC1
> Received: (Authenticated sender: herve.codina@bootlin.com) by
>  mail.gandi.net (Postfix) with ESMTPSA id 40453C0009; Mon, 20 Mar 2023
>  09:46:20 +0000 (UTC)
> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1;
>  t=1679305582;
>  h=from:from:reply-to:subject:subject:date:date:message-id:message-id:
>   to:to:cc:cc:mime-version:mime-version:content-type:content-type:
>   content-transfer-encoding:content-transfer-encoding:
>   in-reply-to:in-reply-to:references:references;
>  bh=Ieu9Fv38se4lD4z/BVXUHLrVJL9Tx5iKWZgvO8X+VoY=;
>  b=m4O7nLC1LPZDOI5eM/hmgqouxdkin2veA6CvJhT9kU9rGQALB3ya2fuybMfDvrkTqqBjEd
>  j6DAxXMgOKgwuUfEsZsp3BFJpoii00hSaf0r2uIbnnGcUrDGVQqUQVEqv51O6VBqnrViQk
>  PstlJM0lcE9R/AFASd5D/HQGoYYyRY+NKT7xt8g1Ax23Yk/tUG59LXku/skn/4faSLodnU
>  vV2ng3VMUcoLuvSMJtdYY3hrXEWqUrW1ZogxAFHJNiKuyOELmqZGmNo4B4yAFOEcqqyano
>  /f4m/7BtT7X1wwPvGu29gg+0aOFrGQq5kb4UNrMoriSQyKnxPRha8zL3J2Jckw==
> Date: Mon, 20 Mar 2023 10:46:19 +0100
> From: Herve Codina <herve.codina@bootlin.com>
> To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Subject: Re: [PATCH v2 1/7] dt-bindings: misc: Add the Lantiq PEF2466
>  E1/T1/J1 framer
> Message-ID: <20230320104619.468a304b@bootlin.com>
> In-Reply-To: <96b01241-d57d-a460-4a8b-9e83eaab24ae@linaro.org>
> References: <20230316122741.577663-1-herve.codina@bootlin.com>
>  <20230316122741.577663-2-herve.codina@bootlin.com>
>  <96b01241-d57d-a460-4a8b-9e83eaab24ae@linaro.org>
> Organization: Bootlin
> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.37; x86_64-redhat-linux-gnu)
> MIME-Version: 1.0
> Content-Type: text/plain; charset=UTF-8
> Content-Transfer-Encoding: quoted-printable
> Message-ID-Hash: AJZF4VHU24ASVVBCPRMLJCDG4ZDX55LB
> X-Message-ID-Hash: AJZF4VHU24ASVVBCPRMLJCDG4ZDX55LB
> X-MailFrom: herve.codina@bootlin.com
> X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency;
>  loop; banned-address; member-moderation;
>  header-match-alsa-devel.alsa-project.org-0;
>  header-match-alsa-devel.alsa-project.org-1; nonmember-moderation;
>  administrivia; implicit-dest; max-recipients; max-size; news-moderation;
>  no-subject; digests; suspicious-header
> CC: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski
>  <krzysztof.kozlowski+dt@linaro.org>, Liam Girdwood <lgirdwood@gmail.com>,
>  Mark Brown <broonie@kernel.org>, Derek Kiernan <derek.kiernan@xilinx.com>,
>  Dragan Cvetic <dragan.cvetic@xilinx.com>, Arnd Bergmann <arnd@arndb.de>,
>  Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Takashi Iwai
>  <tiwai@suse.com>, linux-kernel@vger.kernel.org,
>  devicetree@vger.kernel.org, alsa-devel@alsa-project.org, Christophe Leroy
>  <christophe.leroy@csgroup.eu>, Thomas Petazzoni
>  <thomas.petazzoni@bootlin.com>
> X-Mailman-Version: 3.3.8
> Precedence: list
> List-Id: "Alsa-devel mailing list for ALSA developers -
>  http://www.alsa-project.org" <alsa-devel.alsa-project.org>
> Archived-At: <https://mailman.alsa-project.org/hyperkitty/list/alsa-devel@alsa-project.org/message/AJZF4VHU24ASVVBCPRMLJCDG4ZDX55LB/>
> List-Archive: <https://mailman.alsa-project.org/hyperkitty/list/alsa-devel@alsa-project.org/>
> List-Help: <mailto:alsa-devel-request@alsa-project.org?subject=help>
> List-Owner: <mailto:alsa-devel-owner@alsa-project.org>
> List-Post: <mailto:alsa-devel@alsa-project.org>
> List-Subscribe: <mailto:alsa-devel-join@alsa-project.org>
> List-Unsubscribe: <mailto:alsa-devel-leave@alsa-project.org>

The alsa-devel list doesn't seem to like your emails. The archives 
(lore) has 2 copies with the 2nd having the original headers in the 
body. I'm seeing this recently on other senders too. Best I can tell is  
you sent this as quoted-printable.

Rob
Herve Codina March 22, 2023, 10:20 a.m. UTC | #6 
Hi Rob,

On Mon, 20 Mar 2023 13:51:27 -0500
Rob Herring <robh@kernel.org> wrote:

> On Mon, Mar 20, 2023 at 10:46:19AM +0100, Herve Codina via Alsa-devel wrote:
> > Received: by alsa1.perex.cz (Postfix, from userid 50401) id 16494F8027B;
> >  Mon, 20 Mar 2023 10:46:37 +0100 (CET)
> > X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on alsa1.perex.cz
> > X-Spam-Level: 
> > X-Spam-Status: No, score=-5.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID,
> >  DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI,SPF_HELO_NONE,SPF_PASS,
> >  URIBL_BLOCKED shortcircuit=no autolearn=ham autolearn_force=no
> >  version=3.4.6
> > Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net
> >  [217.70.183.198]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384
> >  (256/256 bits)) (No client certificate requested) by alsa1.perex.cz
> >  (Postfix) with ESMTPS id 3FF5FF80105 for <alsa-devel@alsa-project.org>;
> >  Mon, 20 Mar 2023 10:46:22 +0100 (CET)
> > DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 3FF5FF80105
> > Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key,
> >  unprotected) header.d=bootlin.com header.i=@bootlin.com
> >  header.a=rsa-sha256 header.s=gm1 header.b=m4O7nLC1
> > Received: (Authenticated sender: herve.codina@bootlin.com) by
> >  mail.gandi.net (Postfix) with ESMTPSA id 40453C0009; Mon, 20 Mar 2023
> >  09:46:20 +0000 (UTC)
> > DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1;
> >  t=1679305582;
> >  h=from:from:reply-to:subject:subject:date:date:message-id:message-id:
> >   to:to:cc:cc:mime-version:mime-version:content-type:content-type:
> >   content-transfer-encoding:content-transfer-encoding:
> >   in-reply-to:in-reply-to:references:references;
> >  bh=Ieu9Fv38se4lD4z/BVXUHLrVJL9Tx5iKWZgvO8X+VoY=;
> >  b=m4O7nLC1LPZDOI5eM/hmgqouxdkin2veA6CvJhT9kU9rGQALB3ya2fuybMfDvrkTqqBjEd
> >  j6DAxXMgOKgwuUfEsZsp3BFJpoii00hSaf0r2uIbnnGcUrDGVQqUQVEqv51O6VBqnrViQk
> >  PstlJM0lcE9R/AFASd5D/HQGoYYyRY+NKT7xt8g1Ax23Yk/tUG59LXku/skn/4faSLodnU
> >  vV2ng3VMUcoLuvSMJtdYY3hrXEWqUrW1ZogxAFHJNiKuyOELmqZGmNo4B4yAFOEcqqyano
> >  /f4m/7BtT7X1wwPvGu29gg+0aOFrGQq5kb4UNrMoriSQyKnxPRha8zL3J2Jckw==
> > Date: Mon, 20 Mar 2023 10:46:19 +0100
> > From: Herve Codina <herve.codina@bootlin.com>
> > To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> > Subject: Re: [PATCH v2 1/7] dt-bindings: misc: Add the Lantiq PEF2466
> >  E1/T1/J1 framer
> > Message-ID: <20230320104619.468a304b@bootlin.com>
> > In-Reply-To: <96b01241-d57d-a460-4a8b-9e83eaab24ae@linaro.org>
> > References: <20230316122741.577663-1-herve.codina@bootlin.com>
> >  <20230316122741.577663-2-herve.codina@bootlin.com>
> >  <96b01241-d57d-a460-4a8b-9e83eaab24ae@linaro.org>
> > Organization: Bootlin
> > X-Mailer: Claws Mail 4.1.1 (GTK 3.24.37; x86_64-redhat-linux-gnu)
> > MIME-Version: 1.0
> > Content-Type: text/plain; charset=UTF-8
> > Content-Transfer-Encoding: quoted-printable
> > Message-ID-Hash: AJZF4VHU24ASVVBCPRMLJCDG4ZDX55LB
> > X-Message-ID-Hash: AJZF4VHU24ASVVBCPRMLJCDG4ZDX55LB
> > X-MailFrom: herve.codina@bootlin.com
> > X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency;
> >  loop; banned-address; member-moderation;
> >  header-match-alsa-devel.alsa-project.org-0;
> >  header-match-alsa-devel.alsa-project.org-1; nonmember-moderation;
> >  administrivia; implicit-dest; max-recipients; max-size; news-moderation;
> >  no-subject; digests; suspicious-header
> > CC: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski
> >  <krzysztof.kozlowski+dt@linaro.org>, Liam Girdwood <lgirdwood@gmail.com>,
> >  Mark Brown <broonie@kernel.org>, Derek Kiernan <derek.kiernan@xilinx.com>,
> >  Dragan Cvetic <dragan.cvetic@xilinx.com>, Arnd Bergmann <arnd@arndb.de>,
> >  Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Takashi Iwai
> >  <tiwai@suse.com>, linux-kernel@vger.kernel.org,
> >  devicetree@vger.kernel.org, alsa-devel@alsa-project.org, Christophe Leroy
> >  <christophe.leroy@csgroup.eu>, Thomas Petazzoni
> >  <thomas.petazzoni@bootlin.com>
> > X-Mailman-Version: 3.3.8
> > Precedence: list
> > List-Id: "Alsa-devel mailing list for ALSA developers -
> >  http://www.alsa-project.org" <alsa-devel.alsa-project.org>
> > Archived-At: <https://mailman.alsa-project.org/hyperkitty/list/alsa-devel@alsa-project.org/message/AJZF4VHU24ASVVBCPRMLJCDG4ZDX55LB/>
> > List-Archive: <https://mailman.alsa-project.org/hyperkitty/list/alsa-devel@alsa-project.org/>
> > List-Help: <mailto:alsa-devel-request@alsa-project.org?subject=help>
> > List-Owner: <mailto:alsa-devel-owner@alsa-project.org>
> > List-Post: <mailto:alsa-devel@alsa-project.org>
> > List-Subscribe: <mailto:alsa-devel-join@alsa-project.org>
> > List-Unsubscribe: <mailto:alsa-devel-leave@alsa-project.org>  
> 
> The alsa-devel list doesn't seem to like your emails. The archives 
> (lore) has 2 copies with the 2nd having the original headers in the 
> body. I'm seeing this recently on other senders too. Best I can tell is  
> you sent this as quoted-printable.
> 
> Rob

I don't known what happened with alsa-devel list.

For this answer, I tried to force '8bit' encoding instead of quoted-printable.
Let me know if it is better.

Regards,
Hervé
Rob Herring March 22, 2023, 12:56 p.m. UTC | #7 
On Wed, Mar 22, 2023 at 5:21 AM Herve Codina <herve.codina@bootlin.com> wrote:
>
> Hi Rob,
>
> On Mon, 20 Mar 2023 13:51:27 -0500
> Rob Herring <robh@kernel.org> wrote:
>
> > On Mon, Mar 20, 2023 at 10:46:19AM +0100, Herve Codina via Alsa-devel wrote:
> > > Received: by alsa1.perex.cz (Postfix, from userid 50401) id 16494F8027B;
> > >  Mon, 20 Mar 2023 10:46:37 +0100 (CET)
> > > X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on alsa1.perex.cz
> > > X-Spam-Level:
> > > X-Spam-Status: No, score=-5.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID,
> > >  DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI,SPF_HELO_NONE,SPF_PASS,
> > >  URIBL_BLOCKED shortcircuit=no autolearn=ham autolearn_force=no
> > >  version=3.4.6
> > > Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net
> > >  [217.70.183.198]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384
> > >  (256/256 bits)) (No client certificate requested) by alsa1.perex.cz
> > >  (Postfix) with ESMTPS id 3FF5FF80105 for <alsa-devel@alsa-project.org>;
> > >  Mon, 20 Mar 2023 10:46:22 +0100 (CET)
> > > DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 3FF5FF80105
> > > Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key,
> > >  unprotected) header.d=bootlin.com header.i=@bootlin.com
> > >  header.a=rsa-sha256 header.s=gm1 header.b=m4O7nLC1
> > > Received: (Authenticated sender: herve.codina@bootlin.com) by
> > >  mail.gandi.net (Postfix) with ESMTPSA id 40453C0009; Mon, 20 Mar 2023
> > >  09:46:20 +0000 (UTC)
> > > DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1;
> > >  t=1679305582;
> > >  h=from:from:reply-to:subject:subject:date:date:message-id:message-id:
> > >   to:to:cc:cc:mime-version:mime-version:content-type:content-type:
> > >   content-transfer-encoding:content-transfer-encoding:
> > >   in-reply-to:in-reply-to:references:references;
> > >  bh=Ieu9Fv38se4lD4z/BVXUHLrVJL9Tx5iKWZgvO8X+VoY=;
> > >  b=m4O7nLC1LPZDOI5eM/hmgqouxdkin2veA6CvJhT9kU9rGQALB3ya2fuybMfDvrkTqqBjEd
> > >  j6DAxXMgOKgwuUfEsZsp3BFJpoii00hSaf0r2uIbnnGcUrDGVQqUQVEqv51O6VBqnrViQk
> > >  PstlJM0lcE9R/AFASd5D/HQGoYYyRY+NKT7xt8g1Ax23Yk/tUG59LXku/skn/4faSLodnU
> > >  vV2ng3VMUcoLuvSMJtdYY3hrXEWqUrW1ZogxAFHJNiKuyOELmqZGmNo4B4yAFOEcqqyano
> > >  /f4m/7BtT7X1wwPvGu29gg+0aOFrGQq5kb4UNrMoriSQyKnxPRha8zL3J2Jckw==
> > > Date: Mon, 20 Mar 2023 10:46:19 +0100
> > > From: Herve Codina <herve.codina@bootlin.com>
> > > To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> > > Subject: Re: [PATCH v2 1/7] dt-bindings: misc: Add the Lantiq PEF2466
> > >  E1/T1/J1 framer
> > > Message-ID: <20230320104619.468a304b@bootlin.com>
> > > In-Reply-To: <96b01241-d57d-a460-4a8b-9e83eaab24ae@linaro.org>
> > > References: <20230316122741.577663-1-herve.codina@bootlin.com>
> > >  <20230316122741.577663-2-herve.codina@bootlin.com>
> > >  <96b01241-d57d-a460-4a8b-9e83eaab24ae@linaro.org>
> > > Organization: Bootlin
> > > X-Mailer: Claws Mail 4.1.1 (GTK 3.24.37; x86_64-redhat-linux-gnu)
> > > MIME-Version: 1.0
> > > Content-Type: text/plain; charset=UTF-8
> > > Content-Transfer-Encoding: quoted-printable
> > > Message-ID-Hash: AJZF4VHU24ASVVBCPRMLJCDG4ZDX55LB
> > > X-Message-ID-Hash: AJZF4VHU24ASVVBCPRMLJCDG4ZDX55LB
> > > X-MailFrom: herve.codina@bootlin.com
> > > X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency;
> > >  loop; banned-address; member-moderation;
> > >  header-match-alsa-devel.alsa-project.org-0;
> > >  header-match-alsa-devel.alsa-project.org-1; nonmember-moderation;
> > >  administrivia; implicit-dest; max-recipients; max-size; news-moderation;
> > >  no-subject; digests; suspicious-header
> > > CC: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski
> > >  <krzysztof.kozlowski+dt@linaro.org>, Liam Girdwood <lgirdwood@gmail.com>,
> > >  Mark Brown <broonie@kernel.org>, Derek Kiernan <derek.kiernan@xilinx.com>,
> > >  Dragan Cvetic <dragan.cvetic@xilinx.com>, Arnd Bergmann <arnd@arndb.de>,
> > >  Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Takashi Iwai
> > >  <tiwai@suse.com>, linux-kernel@vger.kernel.org,
> > >  devicetree@vger.kernel.org, alsa-devel@alsa-project.org, Christophe Leroy
> > >  <christophe.leroy@csgroup.eu>, Thomas Petazzoni
> > >  <thomas.petazzoni@bootlin.com>
> > > X-Mailman-Version: 3.3.8
> > > Precedence: list
> > > List-Id: "Alsa-devel mailing list for ALSA developers -
> > >  http://www.alsa-project.org" <alsa-devel.alsa-project.org>
> > > Archived-At: <https://mailman.alsa-project.org/hyperkitty/list/alsa-devel@alsa-project.org/message/AJZF4VHU24ASVVBCPRMLJCDG4ZDX55LB/>
> > > List-Archive: <https://mailman.alsa-project.org/hyperkitty/list/alsa-devel@alsa-project.org/>
> > > List-Help: <mailto:alsa-devel-request@alsa-project.org?subject=help>
> > > List-Owner: <mailto:alsa-devel-owner@alsa-project.org>
> > > List-Post: <mailto:alsa-devel@alsa-project.org>
> > > List-Subscribe: <mailto:alsa-devel-join@alsa-project.org>
> > > List-Unsubscribe: <mailto:alsa-devel-leave@alsa-project.org>
> >
> > The alsa-devel list doesn't seem to like your emails. The archives
> > (lore) has 2 copies with the 2nd having the original headers in the
> > body. I'm seeing this recently on other senders too. Best I can tell is
> > you sent this as quoted-printable.
> >
> > Rob
>
> I don't known what happened with alsa-devel list.
>
> For this answer, I tried to force '8bit' encoding instead of quoted-printable.
> Let me know if it is better.

Nope, still the same issue:

https://lore.kernel.org/all/167948048307.26.16805930109507404147@mailman-core.alsa-project.org/

I added the alsa-devel owner. Maybe they know what's happening.

Rob
Rob Herring March 22, 2023, 1:09 p.m. UTC | #8 
On Wed, Mar 22, 2023 at 7:56 AM Rob Herring <robh@kernel.org> wrote:
>
> On Wed, Mar 22, 2023 at 5:21 AM Herve Codina <herve.codina@bootlin.com> wrote:
> >
> > Hi Rob,
> >
> > On Mon, 20 Mar 2023 13:51:27 -0500
> > Rob Herring <robh@kernel.org> wrote:
> >
> > > On Mon, Mar 20, 2023 at 10:46:19AM +0100, Herve Codina via Alsa-devel wrote:
> > > > Received: by alsa1.perex.cz (Postfix, from userid 50401) id 16494F8027B;
> > > >  Mon, 20 Mar 2023 10:46:37 +0100 (CET)
> > > > X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on alsa1.perex.cz
> > > > X-Spam-Level:
> > > > X-Spam-Status: No, score=-5.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID,
> > > >  DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI,SPF_HELO_NONE,SPF_PASS,
> > > >  URIBL_BLOCKED shortcircuit=no autolearn=ham autolearn_force=no
> > > >  version=3.4.6
> > > > Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net
> > > >  [217.70.183.198]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384
> > > >  (256/256 bits)) (No client certificate requested) by alsa1.perex.cz
> > > >  (Postfix) with ESMTPS id 3FF5FF80105 for <alsa-devel@alsa-project.org>;
> > > >  Mon, 20 Mar 2023 10:46:22 +0100 (CET)
> > > > DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 3FF5FF80105
> > > > Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key,
> > > >  unprotected) header.d=bootlin.com header.i=@bootlin.com
> > > >  header.a=rsa-sha256 header.s=gm1 header.b=m4O7nLC1
> > > > Received: (Authenticated sender: herve.codina@bootlin.com) by
> > > >  mail.gandi.net (Postfix) with ESMTPSA id 40453C0009; Mon, 20 Mar 2023
> > > >  09:46:20 +0000 (UTC)
> > > > DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1;
> > > >  t=1679305582;
> > > >  h=from:from:reply-to:subject:subject:date:date:message-id:message-id:
> > > >   to:to:cc:cc:mime-version:mime-version:content-type:content-type:
> > > >   content-transfer-encoding:content-transfer-encoding:
> > > >   in-reply-to:in-reply-to:references:references;
> > > >  bh=Ieu9Fv38se4lD4z/BVXUHLrVJL9Tx5iKWZgvO8X+VoY=;
> > > >  b=m4O7nLC1LPZDOI5eM/hmgqouxdkin2veA6CvJhT9kU9rGQALB3ya2fuybMfDvrkTqqBjEd
> > > >  j6DAxXMgOKgwuUfEsZsp3BFJpoii00hSaf0r2uIbnnGcUrDGVQqUQVEqv51O6VBqnrViQk
> > > >  PstlJM0lcE9R/AFASd5D/HQGoYYyRY+NKT7xt8g1Ax23Yk/tUG59LXku/skn/4faSLodnU
> > > >  vV2ng3VMUcoLuvSMJtdYY3hrXEWqUrW1ZogxAFHJNiKuyOELmqZGmNo4B4yAFOEcqqyano
> > > >  /f4m/7BtT7X1wwPvGu29gg+0aOFrGQq5kb4UNrMoriSQyKnxPRha8zL3J2Jckw==
> > > > Date: Mon, 20 Mar 2023 10:46:19 +0100
> > > > From: Herve Codina <herve.codina@bootlin.com>
> > > > To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> > > > Subject: Re: [PATCH v2 1/7] dt-bindings: misc: Add the Lantiq PEF2466
> > > >  E1/T1/J1 framer
> > > > Message-ID: <20230320104619.468a304b@bootlin.com>
> > > > In-Reply-To: <96b01241-d57d-a460-4a8b-9e83eaab24ae@linaro.org>
> > > > References: <20230316122741.577663-1-herve.codina@bootlin.com>
> > > >  <20230316122741.577663-2-herve.codina@bootlin.com>
> > > >  <96b01241-d57d-a460-4a8b-9e83eaab24ae@linaro.org>
> > > > Organization: Bootlin
> > > > X-Mailer: Claws Mail 4.1.1 (GTK 3.24.37; x86_64-redhat-linux-gnu)
> > > > MIME-Version: 1.0
> > > > Content-Type: text/plain; charset=UTF-8
> > > > Content-Transfer-Encoding: quoted-printable
> > > > Message-ID-Hash: AJZF4VHU24ASVVBCPRMLJCDG4ZDX55LB
> > > > X-Message-ID-Hash: AJZF4VHU24ASVVBCPRMLJCDG4ZDX55LB
> > > > X-MailFrom: herve.codina@bootlin.com
> > > > X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency;
> > > >  loop; banned-address; member-moderation;
> > > >  header-match-alsa-devel.alsa-project.org-0;
> > > >  header-match-alsa-devel.alsa-project.org-1; nonmember-moderation;
> > > >  administrivia; implicit-dest; max-recipients; max-size; news-moderation;
> > > >  no-subject; digests; suspicious-header
> > > > CC: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski
> > > >  <krzysztof.kozlowski+dt@linaro.org>, Liam Girdwood <lgirdwood@gmail.com>,
> > > >  Mark Brown <broonie@kernel.org>, Derek Kiernan <derek.kiernan@xilinx.com>,
> > > >  Dragan Cvetic <dragan.cvetic@xilinx.com>, Arnd Bergmann <arnd@arndb.de>,
> > > >  Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Takashi Iwai
> > > >  <tiwai@suse.com>, linux-kernel@vger.kernel.org,
> > > >  devicetree@vger.kernel.org, alsa-devel@alsa-project.org, Christophe Leroy
> > > >  <christophe.leroy@csgroup.eu>, Thomas Petazzoni
> > > >  <thomas.petazzoni@bootlin.com>
> > > > X-Mailman-Version: 3.3.8
> > > > Precedence: list
> > > > List-Id: "Alsa-devel mailing list for ALSA developers -
> > > >  http://www.alsa-project.org" <alsa-devel.alsa-project.org>
> > > > Archived-At: <https://mailman.alsa-project.org/hyperkitty/list/alsa-devel@alsa-project.org/message/AJZF4VHU24ASVVBCPRMLJCDG4ZDX55LB/>
> > > > List-Archive: <https://mailman.alsa-project.org/hyperkitty/list/alsa-devel@alsa-project.org/>
> > > > List-Help: <mailto:alsa-devel-request@alsa-project.org?subject=help>
> > > > List-Owner: <mailto:alsa-devel-owner@alsa-project.org>
> > > > List-Post: <mailto:alsa-devel@alsa-project.org>
> > > > List-Subscribe: <mailto:alsa-devel-join@alsa-project.org>
> > > > List-Unsubscribe: <mailto:alsa-devel-leave@alsa-project.org>
> > >
> > > The alsa-devel list doesn't seem to like your emails. The archives
> > > (lore) has 2 copies with the 2nd having the original headers in the
> > > body. I'm seeing this recently on other senders too. Best I can tell is
> > > you sent this as quoted-printable.
> > >
> > > Rob
> >
> > I don't known what happened with alsa-devel list.
> >
> > For this answer, I tried to force '8bit' encoding instead of quoted-printable.
> > Let me know if it is better.
>
> Nope, still the same issue:
>
> https://lore.kernel.org/all/167948048307.26.16805930109507404147@mailman-core.alsa-project.org/
>
> I added the alsa-devel owner. Maybe they know what's happening.

Here's the answer:

https://lore.kernel.org/alsa-devel/6f003598-4cae-a521-233f-2c19eb439359@perex.cz/

Something about DMARC and your domain. But some reason git-send-email
doesn't have the issue sending.

Rob
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/misc/lantiq,pef2256.yaml b/Documentation/devicetree/bindings/misc/lantiq,pef2256.yaml
new file mode 100644
index 000000000000..1ba788d06a14
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/lantiq,pef2256.yaml
@@ -0,0 +1,190 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/misc/lantiq,pef2256.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Lantiq PEF2256
+
+maintainers:
+  - Herve Codina <herve.codina@bootlin.com>
+
+description:
+  The Lantiq PEF2256, also known as Infineon PEF2256 or FALC256, is a framer and
+  line interface component designed to fulfill all required interfacing between
+  an analog E1/T1/J1 line and the digital PCM system highway/H.100 bus.
+
+properties:
+  compatible:
+    const: lantiq,pef2256
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: Master clock
+
+  clock-names:
+    items:
+      - const: mclk
+
+  interrupts:
+    maxItems: 1
+
+  reset-gpios:
+    description:
+      GPIO used to reset the device.
+    maxItems: 1
+
+  pinctrl:
+    allOf:
+      - $ref: "/schemas/pinctrl/pinctrl.yaml#"
+
+    patternProperties:
+      '-pins$':
+        type: object
+        allOf:
+          - $ref: "/schemas/pinctrl/pincfg-node.yaml#"
+
+        properties:
+          pins:
+            enum: [ RPA, RPB, RPC, RPD, XPA, XPB, XPC, XPD ]
+
+          function:
+            enum: [ SYPR, RFM, RFMB, RSIGM, RSIG, DLR, FREEZE, RFSP, LOS,
+                    SYPX, XFMS, XSIG, TCLK, XMFB, XSIGM, DLX, XCLK, XLT,
+                    GPI, GPOH, GPOL ]
+
+        required:
+          - pins
+          - function
+
+  lantiq,line-interface:
+    $ref: /schemas/types.yaml#/definitions/string
+    enum: [e1, t1j1]
+    default: e1
+    description: |
+      The line interface type
+        - e1: E1 line
+        - t1j1: T1/J1 line
+
+  lantiq,sysclk-rate-hz:
+    enum: [2048000, 4096000, 8192000, 16384000]
+    default: 2048000
+    description:
+      Clock rate (Hz) on the system highway.
+
+  lantiq,data-rate-bps:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [2048000, 4096000, 8192000, 16384000]
+    default: 2048000
+    description:
+      Data rate (bit per seconds) on the system highway.
+
+  lantiq,clock-falling-edge:
+    $ref: /schemas/types.yaml#/definitions/flag
+    description:
+      Data is sent on falling edge of the clock (and received on the rising
+      edge). If 'clock-falling-edge' is not present, data is sent on the
+      rising edge (and received on the falling edge).
+
+  lantiq,channel-phase:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [0, 1, 2, 3, 4, 5, 6, 7]
+    default: 0
+    description:
+      The pef2256 delivers a full frame (32 8bit time-slots in E1 and 24 8bit
+      time-slots 8 8bit signaling in E1/J1) every 125us. This lead to a data
+      rate of 2048000 bit/s. When lantiq,data-rate-bps is more than 2048000
+      bit/s, the data (all 32 8bit) present in the frame are interleave with
+      unused time-slots. The lantiq,channel-phase property allows to set the
+      correct alignment of the interleave mechanism.
+      For instance, suppose lantiq,data-rate-bps = 8192000 (ie 4*2048000), and
+      lantiq,channel-phase = 2, the interleave schema with unused time-slots
+      (nu) and used time-slots (XX) for TSi is
+        nu nu XX nu nu nu XX nu nu nu XX nu
+        <-- TSi --> <- TSi+1 -> <- TSi+2 ->
+      With lantiq,data-rate-bps = 8192000, and lantiq,channel-phase = 1, the
+      interleave schema is
+        nu XX nu nu nu XX nu nu nu XX nu nu
+        <-- TSi --> <- TSi+1 -> <- TSi+2 ->
+      With lantiq,data-rate-bps = 4096000 (ie 2*2048000), and
+      lantiq,channel-phase = 1, the interleave schema is
+        nu    XX    nu    XX    nu    XX
+        <-- TSi --> <- TSi+1 -> <- TSi+2 ->
+
+  lantiq,subordinate:
+    $ref: /schemas/types.yaml#/definitions/flag
+    description:
+      If present, the pef2256 works in subordinate mode. In this mode it
+      synchronizes on line interface clock signals. Otherwise, it synchronizes
+      on internal clocks.
+
+allOf:
+  - if:
+      properties:
+        lantiq,line-interface:
+          contains:
+            const: e1
+    then:
+      properties:
+        lantiq,frame-format:
+          $ref: /schemas/types.yaml#/definitions/string
+          enum: [doubleframe, crc4-multiframe, auto-multiframe]
+          default: doubleframe
+          description: |
+            The E1 line interface frame format
+              - doubleframe: Doubleframe format
+              - crc4-multiframe: CRC4 multiframe format
+              - auto-multiframe: CRC4 multiframe format with interworking
+                                 capabilities (ITU-T G.706 Annex B)
+
+    else:
+      # T1/J1 line
+      properties:
+        lantiq,frame-format:
+          $ref: /schemas/types.yaml#/definitions/string
+          enum: [4frame, 12frame, 24frame, 72frame]
+          default: 12frame
+          description: |
+            The T1/J1 line interface frame format
+              - 4frame: 4-frame multiframe format (F4)
+              - 12frame: 12-frame multiframe format (F12, D3/4)
+              - 24frame: 24-frame multiframe format (ESF)
+              - 72frame: 72-frame multiframe format (F72, remote switch mode)
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/gpio/gpio.h>
+    pef2256@2000000 {
+      compatible = "lantiq,pef2256";
+      reg = <0x2000000 0xFF>;
+      interrupts = <8 1>;
+      interrupt-parent = <&PIC>;
+      clocks = <&clk_mclk>;
+      clock-names = "mclk";
+      reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+      lantiq,sysclk-rate-hz = <8192000>;
+      lantiq,data-rate-bps = <4096000>;
+
+      pinctrl {
+        pef2256_rpa_sypr: rpa-pins {
+          pins = "RPA";
+          function = "SYPR";
+        };
+        pef2256_xpa_sypx: xpa-pins {
+          pins = "XPA";
+          function = "SYPX";
+        };
+      };
+    };