[v2,06/10] riscv: dts: allwinner: d1: Switch dma-names order for snps,dw-apb-uart nodes
Message ID | 20230321215624.78383-7-cristian.ciocaltea@collabora.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id q4-20020a056a0002a400b005f681d0192csi13596734pfs.27.2023.03.21.15.00.59; Tue, 21 Mar 2023 15:01:16 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=eXz8t03p; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230257AbjCUV6F (ORCPT <rfc822;ezelljr.billy@gmail.com> + 99 others); Tue, 21 Mar 2023 17:58:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58102 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230076AbjCUV5D (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Tue, 21 Mar 2023 17:57:03 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A374753DB3; Tue, 21 Mar 2023 14:56:50 -0700 (PDT) Received: from localhost (unknown [188.24.179.102]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id AFA8566030EB; Tue, 21 Mar 2023 21:56:48 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1679435808; bh=ebvOxKanu6MoxWyeCbmEv5UBMJrCH6Tv4wEIv8LZNec=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eXz8t03pxfzBmsapf6cd6G89Or+RWnz7/e2HJoapOb+cUUDYdDwMyV9nyMWjP7bXn gPDfpzmv2AxOh1y61tizCPX3P9uH8Lbt4gg22UWdt3BUS5YKBfpbyrvpxCk2lkag2a AkM84D91q8aSZ043ov2UWIy/pu15jpHinmBbwGYR6Z6zVyi6ZfnnwbZTL8EJgBCNxI RCoZbpeTKhzcHmoYIgZzv8HZU+Uz4iQyGrFl/JmXjnWcsP8F7OIoMGQEbuRN8YlFcJ OBqs+jRyHHtUdX6bN1k7qpFjs1pXpMjXtIXbD9PR9LilSpqX6/yv7/zQaJzc5+r6BO cjffKcVVyD63g== From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Chen-Yu Tsai <wens@csie.org>, Jernej Skrabec <jernej.skrabec@gmail.com>, Samuel Holland <samuel@sholland.org>, Heiko Stuebner <heiko@sntech.de>, Conor Dooley <conor@kernel.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Cc: linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-rockchip@lists.infradead.org, linux-riscv@lists.infradead.org, kernel@collabora.com Subject: [PATCH v2 06/10] riscv: dts: allwinner: d1: Switch dma-names order for snps,dw-apb-uart nodes Date: Tue, 21 Mar 2023 23:56:20 +0200 Message-Id: <20230321215624.78383-7-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230321215624.78383-1-cristian.ciocaltea@collabora.com> References: <20230321215624.78383-1-cristian.ciocaltea@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761016363570121190?= X-GMAIL-MSGID: =?utf-8?q?1761016363570121190?= |
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Enable I2S support for RK3588/RK3588S SoCs
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Commit Message
Cristian Ciocaltea
March 21, 2023, 9:56 p.m. UTC
Commit 370f696e4474 ("dt-bindings: serial: snps-dw-apb-uart: add dma &
dma-names properties") documented dma-names property to handle Allwinner
D1 dtbs_check warnings, but relies on the rx->tx ordering, which is the
reverse of what a bunch of different boards expect.
The initial proposed solution was to allow a flexible dma-names order in
the binding, due to potential ABI breakage concerns after fixing the DTS
files. But luckily the Allwinner boards are not affected, since they are
using a shared DMA channel for rx and tx.
Hence, the first step in fixing the inconsistency was to change
dma-names order in the binding to tx->rx.
Do the same for the snps,dw-apb-uart nodes in the DTS file.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
Comments
On Tue, Mar 21, 2023 at 11:56:20PM +0200, Cristian Ciocaltea wrote: > Commit 370f696e4474 ("dt-bindings: serial: snps-dw-apb-uart: add dma & > dma-names properties") documented dma-names property to handle Allwinner > D1 dtbs_check warnings, but relies on the rx->tx ordering, which is the > reverse of what a bunch of different boards expect. > > The initial proposed solution was to allow a flexible dma-names order in > the binding, due to potential ABI breakage concerns after fixing the DTS > files. But luckily the Allwinner boards are not affected, since they are > using a shared DMA channel for rx and tx. > > Hence, the first step in fixing the inconsistency was to change > dma-names order in the binding to tx->rx. > > Do the same for the snps,dw-apb-uart nodes in the DTS file. > > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Thanks, Conor. > --- > arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > index 951810d46307..922e8e0e2c09 100644 > --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > @@ -211,7 +211,7 @@ uart0: serial@2500000 { > clocks = <&ccu CLK_BUS_UART0>; > resets = <&ccu RST_BUS_UART0>; > dmas = <&dma 14>, <&dma 14>; > - dma-names = "rx", "tx"; > + dma-names = "tx", "rx"; > status = "disabled"; > }; > > @@ -224,7 +224,7 @@ uart1: serial@2500400 { > clocks = <&ccu CLK_BUS_UART1>; > resets = <&ccu RST_BUS_UART1>; > dmas = <&dma 15>, <&dma 15>; > - dma-names = "rx", "tx"; > + dma-names = "tx", "rx"; > status = "disabled"; > }; > > @@ -237,7 +237,7 @@ uart2: serial@2500800 { > clocks = <&ccu CLK_BUS_UART2>; > resets = <&ccu RST_BUS_UART2>; > dmas = <&dma 16>, <&dma 16>; > - dma-names = "rx", "tx"; > + dma-names = "tx", "rx"; > status = "disabled"; > }; > > @@ -250,7 +250,7 @@ uart3: serial@2500c00 { > clocks = <&ccu CLK_BUS_UART3>; > resets = <&ccu RST_BUS_UART3>; > dmas = <&dma 17>, <&dma 17>; > - dma-names = "rx", "tx"; > + dma-names = "tx", "rx"; > status = "disabled"; > }; > > @@ -263,7 +263,7 @@ uart4: serial@2501000 { > clocks = <&ccu CLK_BUS_UART4>; > resets = <&ccu RST_BUS_UART4>; > dmas = <&dma 18>, <&dma 18>; > - dma-names = "rx", "tx"; > + dma-names = "tx", "rx"; > status = "disabled"; > }; > > @@ -276,7 +276,7 @@ uart5: serial@2501400 { > clocks = <&ccu CLK_BUS_UART5>; > resets = <&ccu RST_BUS_UART5>; > dmas = <&dma 19>, <&dma 19>; > - dma-names = "rx", "tx"; > + dma-names = "tx", "rx"; > status = "disabled"; > }; > > -- > 2.40.0 >
Dne torek, 21. marec 2023 ob 22:56:20 CEST je Cristian Ciocaltea napisal(a): > Commit 370f696e4474 ("dt-bindings: serial: snps-dw-apb-uart: add dma & > dma-names properties") documented dma-names property to handle Allwinner > D1 dtbs_check warnings, but relies on the rx->tx ordering, which is the > reverse of what a bunch of different boards expect. > > The initial proposed solution was to allow a flexible dma-names order in > the binding, due to potential ABI breakage concerns after fixing the DTS > files. But luckily the Allwinner boards are not affected, since they are > using a shared DMA channel for rx and tx. > > Hence, the first step in fixing the inconsistency was to change > dma-names order in the binding to tx->rx. > > Do the same for the snps,dw-apb-uart nodes in the DTS file. > > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Applied patches 2-6, thanks! Best regards, Jernej
On 4/8/23 15:36, Jernej Škrabec wrote: > Dne torek, 21. marec 2023 ob 22:56:20 CEST je Cristian Ciocaltea napisal(a): >> Commit 370f696e4474 ("dt-bindings: serial: snps-dw-apb-uart: add dma & >> dma-names properties") documented dma-names property to handle Allwinner >> D1 dtbs_check warnings, but relies on the rx->tx ordering, which is the >> reverse of what a bunch of different boards expect. >> >> The initial proposed solution was to allow a flexible dma-names order in >> the binding, due to potential ABI breakage concerns after fixing the DTS >> files. But luckily the Allwinner boards are not affected, since they are >> using a shared DMA channel for rx and tx. >> >> Hence, the first step in fixing the inconsistency was to change >> dma-names order in the binding to tx->rx. >> >> Do the same for the snps,dw-apb-uart nodes in the DTS file. >> >> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> > > Applied patches 2-6, thanks! Hi Jernej, Please note the patches have been already picked by Greg and were merged in next-20230331. Regards, Cristian
diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index 951810d46307..922e8e0e2c09 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi @@ -211,7 +211,7 @@ uart0: serial@2500000 { clocks = <&ccu CLK_BUS_UART0>; resets = <&ccu RST_BUS_UART0>; dmas = <&dma 14>, <&dma 14>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -224,7 +224,7 @@ uart1: serial@2500400 { clocks = <&ccu CLK_BUS_UART1>; resets = <&ccu RST_BUS_UART1>; dmas = <&dma 15>, <&dma 15>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -237,7 +237,7 @@ uart2: serial@2500800 { clocks = <&ccu CLK_BUS_UART2>; resets = <&ccu RST_BUS_UART2>; dmas = <&dma 16>, <&dma 16>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -250,7 +250,7 @@ uart3: serial@2500c00 { clocks = <&ccu CLK_BUS_UART3>; resets = <&ccu RST_BUS_UART3>; dmas = <&dma 17>, <&dma 17>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -263,7 +263,7 @@ uart4: serial@2501000 { clocks = <&ccu CLK_BUS_UART4>; resets = <&ccu RST_BUS_UART4>; dmas = <&dma 18>, <&dma 18>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -276,7 +276,7 @@ uart5: serial@2501400 { clocks = <&ccu CLK_BUS_UART5>; resets = <&ccu RST_BUS_UART5>; dmas = <&dma 19>, <&dma 19>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; };