[v2,2/2] spi: loongson: add bus driver for the loongson spi controller
Commit Message
This bus driver supports the Loongson spi hardware controller in the
Loongson platforms and supports to use DTS and PCI framework to
register spi device resources.
Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn>
---
MAINTAINERS | 1 +
drivers/spi/Kconfig | 10 +
drivers/spi/Makefile | 1 +
drivers/spi/spi-loongson.c | 459 +++++++++++++++++++++++++++++++++++++
4 files changed, 471 insertions(+)
create mode 100644 drivers/spi/spi-loongson.c
Comments
On Fri, Mar 17, 2023 at 04:29:50PM +0800, Yinbo Zhu wrote:
> +static int loongson_spi_update_state(struct loongson_spi *loongson_spi,
> + struct spi_device *spi, struct spi_transfer *t)
> +{
...
> + loongson_spi->hz = hz;
> + loongson_spi->spcr = div_tmp & 3;
> + loongson_spi->sper = (div_tmp >> 2) & 3;
> + val = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPCR_REG);
This is writing to general chip registers, apparently not per chip
select ones.
> +static int loongson_spi_setup(struct spi_device *spi)
> +{
> + struct loongson_spi *loongson_spi;
> + spin_lock(&loongson_spi->lock);
> + loongson_spi_update_state(loongson_spi, spi, NULL);
As IIRC I mentioned last time setup() might be called while other
transfers are happening and therefore shouldn't affect parallel
operations on other devices.
> +static const struct of_device_id loongson_spi_id_table[] = {
> + { .compatible = "loongson,ls2k-spi", },
> + { }
> +};
> +MODULE_DEVICE_TABLE(of, loongson_spi_id_table);
> +
> +static struct platform_driver loongson_spi_driver = {
> + .probe = loongson_spi_platform_probe,
> + .driver = {
> + .name = "loongson-spi",
> + .owner = THIS_MODULE,
> + .bus = &platform_bus_type,
> + .pm = &loongson_spi_dev_pm_ops,
> + .of_match_table = loongson_spi_id_table,
> + },
> +};
> +
> +#ifdef CONFIG_PCI
> +static int loongson_spi_pci_register(struct pci_dev *pdev,
> + const struct pci_device_id *ent)
Again as I said last time the two buses should probably be separate
modules.
Otherwise this looks fine.
Hi Yinbo,
I love your patch! Yet something to improve:
[auto build test ERROR on broonie-spi/for-next]
[also build test ERROR on robh/for-next krzk-dt/for-next linus/master v6.3-rc2 next-20230317]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Yinbo-Zhu/dt-bindings-spi-add-loongson-spi/20230317-163907
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
patch link: https://lore.kernel.org/r/20230317082950.12738-3-zhuyinbo%40loongson.cn
patch subject: [PATCH v2 2/2] spi: loongson: add bus driver for the loongson spi controller
config: m68k-allmodconfig (https://download.01.org/0day-ci/archive/20230318/202303180159.1qAKqnp9-lkp@intel.com/config)
compiler: m68k-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/a532955fcee3d37eb4332cea2b868f74ace0bc72
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Yinbo-Zhu/dt-bindings-spi-add-loongson-spi/20230317-163907
git checkout a532955fcee3d37eb4332cea2b868f74ace0bc72
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=m68k olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=m68k SHELL=/bin/bash
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202303180159.1qAKqnp9-lkp@intel.com/
All errors (new ones prefixed by >>, old ones prefixed by <<):
>> ERROR: modpost: "__udivdi3" [drivers/spi/spi-loongson.ko] undefined!
在 2023/3/18 上午2:07, kernel test robot 写道:
> Hi Yinbo,
>
> I love your patch! Yet something to improve:
>
> [auto build test ERROR on broonie-spi/for-next]
> [also build test ERROR on robh/for-next krzk-dt/for-next linus/master v6.3-rc2 next-20230317]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch#_base_tree_information]
>
> url: https://github.com/intel-lab-lkp/linux/commits/Yinbo-Zhu/dt-bindings-spi-add-loongson-spi/20230317-163907
> base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
> patch link: https://lore.kernel.org/r/20230317082950.12738-3-zhuyinbo%40loongson.cn
> patch subject: [PATCH v2 2/2] spi: loongson: add bus driver for the loongson spi controller
> config: m68k-allmodconfig (https://download.01.org/0day-ci/archive/20230318/202303180159.1qAKqnp9-lkp@intel.com/config)
> compiler: m68k-linux-gcc (GCC) 12.1.0
> reproduce (this is a W=1 build):
> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # https://github.com/intel-lab-lkp/linux/commit/a532955fcee3d37eb4332cea2b868f74ace0bc72
> git remote add linux-review https://github.com/intel-lab-lkp/linux
> git fetch --no-tags linux-review Yinbo-Zhu/dt-bindings-spi-add-loongson-spi/20230317-163907
> git checkout a532955fcee3d37eb4332cea2b868f74ace0bc72
> # save the config file
> mkdir build_dir && cp config build_dir/.config
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=m68k olddefconfig
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=m68k SHELL=/bin/bash
>
> If you fix the issue, kindly add following tag where applicable
> | Reported-by: kernel test robot <lkp@intel.com>
> | Link: https://lore.kernel.org/oe-kbuild-all/202303180159.1qAKqnp9-lkp@intel.com/
>
> All errors (new ones prefixed by >>, old ones prefixed by <<):
>
>>> ERROR: modpost: "__udivdi3" [drivers/spi/spi-loongson.ko] undefined!
This "__udivdi3" undefined!" ERROR that due to u64 / u32 and not use do_div, I think add following change
that can fix this ERROR.
- div = DIV_ROUND_UP(loongson_spi->clk_rate, hz);
+ div = DIV_ROUND_UP_ULL(loongson_spi->clk_rate, hz);
Hi Yinbo,
I love your patch! Yet something to improve:
[auto build test ERROR on broonie-spi/for-next]
[also build test ERROR on robh/for-next krzk-dt/for-next linus/master v6.3-rc2 next-20230317]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Yinbo-Zhu/dt-bindings-spi-add-loongson-spi/20230317-163907
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
patch link: https://lore.kernel.org/r/20230317082950.12738-3-zhuyinbo%40loongson.cn
patch subject: [PATCH v2 2/2] spi: loongson: add bus driver for the loongson spi controller
config: arm-allyesconfig (https://download.01.org/0day-ci/archive/20230318/202303181149.mdhwoup2-lkp@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/a532955fcee3d37eb4332cea2b868f74ace0bc72
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Yinbo-Zhu/dt-bindings-spi-add-loongson-spi/20230317-163907
git checkout a532955fcee3d37eb4332cea2b868f74ace0bc72
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202303181149.mdhwoup2-lkp@intel.com/
All errors (new ones prefixed by >>):
arm-linux-gnueabi-ld: drivers/spi/spi-loongson.o: in function `loongson_spi_update_state':
>> spi-loongson.c:(.text+0x430): undefined reference to `__aeabi_uldivmod'
在 2023/3/18 上午12:26, Mark Brown 写道:
> On Fri, Mar 17, 2023 at 04:29:50PM +0800, Yinbo Zhu wrote:
>
>> +static int loongson_spi_update_state(struct loongson_spi *loongson_spi,
>> + struct spi_device *spi, struct spi_transfer *t)
>> +{
> ...
>
>> + loongson_spi->hz = hz;
>> + loongson_spi->spcr = div_tmp & 3;
>> + loongson_spi->sper = (div_tmp >> 2) & 3;
>> + val = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPCR_REG);
> This is writing to general chip registers, apparently not per chip
> select ones.
The loongson_spi_update_state was only be called in setup or transfer_one, and I will also
add a spin lock in tranfser_one.
>
>> +static int loongson_spi_setup(struct spi_device *spi)
>> +{
>> + struct loongson_spi *loongson_spi;
>> + spin_lock(&loongson_spi->lock);
>> + loongson_spi_update_state(loongson_spi, spi, NULL);
> As IIRC I mentioned last time setup() might be called while other
> transfers are happening and therefore shouldn't affect parallel
> operations on other devices.
I think add spin_lock in transfer_one interface that should be to fix
this issue, Do you think so?
loongson_spi_transfer_one(struct spi_controller *ctrl, struct spi_dev
{
struct loongson_spi *loongson_spi =
spi_master_get_devdata(spi->master);
+ spin_lock(&loongson_spi->lock);
loongson_spi_update_state(loongson_spi, spi, xfer);
+ spin_unlock(&loongson_spi->lock);
>
>> +static const struct of_device_id loongson_spi_id_table[] = {
>> + { .compatible = "loongson,ls2k-spi", },
>> + { }
>> +};
>> +MODULE_DEVICE_TABLE(of, loongson_spi_id_table);
>> +
>> +static struct platform_driver loongson_spi_driver = {
>> + .probe = loongson_spi_platform_probe,
>> + .driver = {
>> + .name = "loongson-spi",
>> + .owner = THIS_MODULE,
>> + .bus = &platform_bus_type,
>> + .pm = &loongson_spi_dev_pm_ops,
>> + .of_match_table = loongson_spi_id_table,
>> + },
>> +};
>> +
>> +#ifdef CONFIG_PCI
>> +static int loongson_spi_pci_register(struct pci_dev *pdev,
>> + const struct pci_device_id *ent)
> Again as I said last time the two buses should probably be separate
> modules.
>
> Otherwise this looks fine.
okay, I will do it.
在 2023/3/18 上午11:21, kernel test robot 写道:
> Hi Yinbo,
>
> I love your patch! Yet something to improve:
>
> [auto build test ERROR on broonie-spi/for-next]
> [also build test ERROR on robh/for-next krzk-dt/for-next linus/master v6.3-rc2 next-20230317]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch#_base_tree_information]
>
> url: https://github.com/intel-lab-lkp/linux/commits/Yinbo-Zhu/dt-bindings-spi-add-loongson-spi/20230317-163907
> base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
> patch link: https://lore.kernel.org/r/20230317082950.12738-3-zhuyinbo%40loongson.cn
> patch subject: [PATCH v2 2/2] spi: loongson: add bus driver for the loongson spi controller
> config: arm-allyesconfig (https://download.01.org/0day-ci/archive/20230318/202303181149.mdhwoup2-lkp@intel.com/config)
> compiler: arm-linux-gnueabi-gcc (GCC) 12.1.0
> reproduce (this is a W=1 build):
> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # https://github.com/intel-lab-lkp/linux/commit/a532955fcee3d37eb4332cea2b868f74ace0bc72
> git remote add linux-review https://github.com/intel-lab-lkp/linux
> git fetch --no-tags linux-review Yinbo-Zhu/dt-bindings-spi-add-loongson-spi/20230317-163907
> git checkout a532955fcee3d37eb4332cea2b868f74ace0bc72
> # save the config file
> mkdir build_dir && cp config build_dir/.config
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm olddefconfig
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash
>
> If you fix the issue, kindly add following tag where applicable
> | Reported-by: kernel test robot <lkp@intel.com>
> | Link: https://lore.kernel.org/oe-kbuild-all/202303181149.mdhwoup2-lkp@intel.com/
>
> All errors (new ones prefixed by >>):
>
> arm-linux-gnueabi-ld: drivers/spi/spi-loongson.o: in function `loongson_spi_update_state':
>>> spi-loongson.c:(.text+0x430): undefined reference to `__aeabi_uldivmod'
This Error's reason was same with "__udivdi3" undefined!" ERROR and
use do_div replace "/" operatators can fix this
issue when it comes to division of 64bit.
On Sat, Mar 18, 2023 at 02:07:16PM +0800, zhuyinbo wrote:
> 在 2023/3/18 上午12:26, Mark Brown 写道:
> > On Fri, Mar 17, 2023 at 04:29:50PM +0800, Yinbo Zhu wrote:
> > As IIRC I mentioned last time setup() might be called while other
> > transfers are happening and therefore shouldn't affect parallel
> > operations on other devices.
> I think add spin_lock in transfer_one interface that should be to fix this
> issue, Do you think so?
No, that doesn't help if setup() reconfigures the controller while it's
doing a transfer. The issue is that the controller might be put into
the wrong mode or run at the wrong speed.
在 2023/3/20 下午8:52, Mark Brown 写道:
> On Sat, Mar 18, 2023 at 02:07:16PM +0800, zhuyinbo wrote:
>> 在 2023/3/18 上午12:26, Mark Brown 写道:
>>> On Fri, Mar 17, 2023 at 04:29:50PM +0800, Yinbo Zhu wrote:
>>> As IIRC I mentioned last time setup() might be called while other
>>> transfers are happening and therefore shouldn't affect parallel
>>> operations on other devices.
>> I think add spin_lock in transfer_one interface that should be to fix this
>> issue, Do you think so?
> No, that doesn't help if setup() reconfigures the controller while it's
> doing a transfer. The issue is that the controller might be put into
> the wrong mode or run at the wrong speed.
sorry, I don't got that why cpu still can call setup's critical region
when cpu call transfer_one to transfer spi data.
when I added a spin_lock for setup and transfer_one then setup and
transfer_one's critical region cann't be called
simultaneously as I know, because the their lock was same lock.
On Tue, Mar 21, 2023 at 10:54:32AM +0800, zhuyinbo wrote:
> 在 2023/3/20 下午8:52, Mark Brown 写道:
> > No, that doesn't help if setup() reconfigures the controller while it's
> > doing a transfer. The issue is that the controller might be put into
> > the wrong mode or run at the wrong speed.
> sorry, I don't got that why cpu still can call setup's critical region when
> cpu call transfer_one to transfer spi data.
> when I added a spin_lock for setup and transfer_one then setup and
> transfer_one's critical region cann't be called
> simultaneously as I know, because the their lock was same lock.
Think what happens if the two SPI devices have different configurations
- for example, a different SPI mode. The register state won't be
corrupted but the devices will still end up seeing misconfigured SPI
transfers.
在 2023/3/21 下午8:08, Mark Brown 写道:
> On Tue, Mar 21, 2023 at 10:54:32AM +0800, zhuyinbo wrote:
>> 在 2023/3/20 下午8:52, Mark Brown 写道:
>>> No, that doesn't help if setup() reconfigures the controller while it's
>>> doing a transfer. The issue is that the controller might be put into
>>> the wrong mode or run at the wrong speed.
>> sorry, I don't got that why cpu still can call setup's critical region when
>> cpu call transfer_one to transfer spi data.
>> when I added a spin_lock for setup and transfer_one then setup and
>> transfer_one's critical region cann't be called
>> simultaneously as I know, because the their lock was same lock.
> Think what happens if the two SPI devices have different configurations
> - for example, a different SPI mode. The register state won't be
> corrupted but the devices will still end up seeing misconfigured SPI
> transfers.
I think add following change and that issue what you said will can be
fixed, in addition, the spin_lock
was also not needed. Do you think so?
@@ -101,8 +101,10 @@ static int loongson_spi_setup(struct spi_device *spi)
if (spi->chip_select >= spi->master->num_chipselect)
return -EINVAL;
+ loongson_spi->hz = 0;
+ loongson_spi->mode &= SPI_NO_CS;
+
spin_lock(&loongson_spi->lock);
- loongson_spi_update_state(loongson_spi, spi, NULL);
loongson_spi_set_cs(spi, 1);
On Thu, Mar 23, 2023 at 08:46:19PM +0800, zhuyinbo wrote:
> I think add following change and that issue what you said will can be
> fixed, in addition, the spin_lock
> was also not needed. Do you think so?
> @@ -101,8 +101,10 @@ static int loongson_spi_setup(struct spi_device *spi)
> if (spi->chip_select >= spi->master->num_chipselect)
> return -EINVAL;
>
> + loongson_spi->hz = 0;
> + loongson_spi->mode &= SPI_NO_CS;
> +
> spin_lock(&loongson_spi->lock);
> - loongson_spi_update_state(loongson_spi, spi, NULL);
Looks plausible, yes - I'd need to see the full thing to verify.
在 2023/3/23 下午9:59, Mark Brown 写道:
> On Thu, Mar 23, 2023 at 08:46:19PM +0800, zhuyinbo wrote:
>
>> I think add following change and that issue what you said will can be
>> fixed, in addition, the spin_lock
>> was also not needed. Do you think so?
>> @@ -101,8 +101,10 @@ static int loongson_spi_setup(struct spi_device *spi)
>> if (spi->chip_select >= spi->master->num_chipselect)
>> return -EINVAL;
>>
>> + loongson_spi->hz = 0;
>> + loongson_spi->mode &= SPI_NO_CS;
>> +
>> spin_lock(&loongson_spi->lock);
>> - loongson_spi_update_state(loongson_spi, spi, NULL);
> Looks plausible, yes - I'd need to see the full thing to verify.
okay, I will send v3.
@@ -12162,6 +12162,7 @@ M: Yinbo Zhu <zhuyinbo@loongson.cn>
L: linux-spi@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/spi/loongson,ls-spi.yaml
+F: drivers/spi/spi-loongson.c
LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI)
M: Sathya Prakash <sathya.prakash@broadcom.com>
@@ -509,6 +509,16 @@ config SPI_LM70_LLP
which interfaces to an LM70 temperature sensor using
a parallel port.
+config SPI_LOONGSON
+ tristate "Loongson SPI Controller Support"
+ depends on OF && (LOONGARCH || COMPILE_TEST)
+ help
+ This bus driver supports the Loongson spi hardware controller in
+ the Loongson platforms and supports to use DTS and PCI framework
+ to register spi device resources.
+ Say Y or M here if you want to use the SPI controller on
+ Loongson platform.
+
config SPI_LP8841_RTC
tristate "ICP DAS LP-8841 SPI Controller for RTC"
depends on MACH_PXA27X_DT || COMPILE_TEST
@@ -70,6 +70,7 @@ obj-$(CONFIG_SPI_INTEL_PLATFORM) += spi-intel-platform.o
obj-$(CONFIG_SPI_LANTIQ_SSC) += spi-lantiq-ssc.o
obj-$(CONFIG_SPI_JCORE) += spi-jcore.o
obj-$(CONFIG_SPI_LM70_LLP) += spi-lm70llp.o
+obj-$(CONFIG_SPI_LOONGSON) += spi-loongson.o
obj-$(CONFIG_SPI_LP8841_RTC) += spi-lp8841-rtc.o
obj-$(CONFIG_SPI_MESON_SPICC) += spi-meson-spicc.o
obj-$(CONFIG_SPI_MESON_SPIFC) += spi-meson-spifc.o
new file mode 100644
@@ -0,0 +1,459 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Loongson SPI Support
+// Copyright (C) 2023 Loongson Technology Corporation Limited
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/spi/spi.h>
+#include <linux/pci.h>
+#include <linux/clk.h>
+#include <linux/of.h>
+
+#define LOONGSON_SPI_SPCR_REG 0x00
+#define LOONGSON_SPI_SPSR_REG 0x01
+#define LOONGSON_SPI_FIFO_REG 0x02
+#define LOONGSON_SPI_SPER_REG 0x03
+#define LOONGSON_SPI_PARA_REG 0x04
+#define LOONGSON_SPI_SFCS_REG 0x05
+#define LOONGSON_SPI_TIMI_REG 0x06
+
+/* Bits definition for Loongson SPI register */
+#define LOONGSON_SPI_PARA_MEM_EN BIT(0)
+#define LOONGSON_SPI_SPSR_SPIF BIT(7)
+#define LOONGSON_SPI_SPSR_WCOL BIT(6)
+#define LOONGSON_SPI_SPCR_SPE BIT(6)
+
+#define SPI_COMPLETION_TIMEOUT msecs_to_jiffies(2000)
+
+struct loongson_spi {
+ spinlock_t lock;
+ struct spi_master *master;
+ void __iomem *base;
+ int cs_active;
+ unsigned int hz;
+ unsigned char spcr;
+ unsigned char sper;
+ unsigned char spsr;
+ unsigned char para;
+ unsigned char sfcs;
+ unsigned char timi;
+ unsigned int mode;
+ u64 clk_rate;
+};
+
+static inline void loongson_spi_write_reg(struct loongson_spi *spi, unsigned char reg,
+ unsigned char data)
+{
+ writeb(data, spi->base + reg);
+}
+
+static inline char loongson_spi_read_reg(struct loongson_spi *spi, unsigned char reg)
+{
+ return readb(spi->base + reg);
+}
+
+static void loongson_spi_set_cs(struct spi_device *spi, bool val)
+{
+ int cs;
+ struct loongson_spi *loongson_spi = spi_master_get_devdata(spi->master);
+
+ if (loongson_spi->mode & SPI_NO_CS)
+ loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SFCS_REG, 0);
+ else {
+ cs = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SFCS_REG)
+ & ~(0x11 << spi->chip_select);
+ loongson_spi_write_reg(loongson_spi,
+ LOONGSON_SPI_SFCS_REG,
+ (val ? (0x11 << spi->chip_select) :
+ (0x1 << spi->chip_select)) | cs);
+ }
+}
+
+static int loongson_spi_update_state(struct loongson_spi *loongson_spi,
+ struct spi_device *spi, struct spi_transfer *t)
+{
+ unsigned int hz;
+ unsigned int div, div_tmp;
+ unsigned int bit;
+ unsigned char val;
+ const char rdiv[12] = {0, 1, 4, 2, 3, 5, 6, 7, 8, 9, 10, 11};
+
+ if (t)
+ hz = t->speed_hz;
+
+ if ((hz && loongson_spi->hz != hz) ||
+ ((spi->mode ^ loongson_spi->mode) & (SPI_CPOL | SPI_CPHA))) {
+ div = DIV_ROUND_UP(loongson_spi->clk_rate, hz);
+ if (div < 2)
+ div = 2;
+ if (div > 4096)
+ div = 4096;
+
+ bit = fls(div) - 1;
+ if ((1<<bit) == div)
+ bit--;
+ div_tmp = rdiv[bit];
+ dev_dbg(&spi->dev, "clk_rate = %llu hz = %d div_tmp = %d bit = %d\n",
+ loongson_spi->clk_rate, hz, div_tmp, bit);
+
+ loongson_spi->hz = hz;
+ loongson_spi->spcr = div_tmp & 3;
+ loongson_spi->sper = (div_tmp >> 2) & 3;
+ val = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPCR_REG);
+ val &= ~0xc;
+ if (spi->mode & SPI_CPOL)
+ val |= 8;
+ if (spi->mode & SPI_CPHA)
+ val |= 4;
+
+ loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPCR_REG, (val & ~3) |
+ loongson_spi->spcr);
+ val = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPER_REG);
+ loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPER_REG, (val & ~3) |
+ loongson_spi->sper);
+ loongson_spi->mode &= SPI_NO_CS;
+ loongson_spi->mode |= spi->mode;
+ }
+
+ return 0;
+}
+
+static int loongson_spi_setup(struct spi_device *spi)
+{
+ struct loongson_spi *loongson_spi;
+
+ loongson_spi = spi_master_get_devdata(spi->master);
+ if (spi->bits_per_word % 8)
+ return -EINVAL;
+
+ if (spi->chip_select >= spi->master->num_chipselect)
+ return -EINVAL;
+
+ spin_lock(&loongson_spi->lock);
+ loongson_spi_update_state(loongson_spi, spi, NULL);
+ loongson_spi_set_cs(spi, 1);
+ spin_unlock(&loongson_spi->lock);
+
+ return 0;
+}
+
+static int loongson_spi_write_read_8bit(struct spi_device *spi, const u8 **tx_buf,
+ u8 **rx_buf, unsigned int num)
+{
+ struct loongson_spi *loongson_spi = spi_master_get_devdata(spi->master);
+ unsigned long timeout = jiffies + SPI_COMPLETION_TIMEOUT;
+
+ if (tx_buf && *tx_buf) {
+ loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_FIFO_REG, *((*tx_buf)++));
+ while ((loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPSR_REG) & 0x1) == 1 &&
+ time_after(timeout, jiffies))
+ cpu_relax();
+ } else {
+ loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_FIFO_REG, 0);
+ while ((loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPSR_REG) & 0x1) == 1 &&
+ time_after(timeout, jiffies))
+ cpu_relax();
+ }
+
+ if (rx_buf && *rx_buf)
+ *(*rx_buf)++ = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_FIFO_REG);
+ else
+ loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_FIFO_REG);
+
+ return 0;
+}
+
+static unsigned int loongson_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer)
+{
+ unsigned int count;
+ const u8 *tx = xfer->tx_buf;
+ u8 *rx = xfer->rx_buf;
+
+ count = xfer->len;
+
+ do {
+ if (loongson_spi_write_read_8bit(spi, &tx, &rx, count) < 0)
+ goto out;
+ count--;
+ } while (count);
+
+out:
+ return xfer->len - count;
+}
+
+static int loongson_spi_prepare_message(struct spi_controller *ctlr, struct spi_message *m)
+{
+ struct loongson_spi *loongson_spi = spi_controller_get_devdata(ctlr);
+
+ loongson_spi->para = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_PARA_REG);
+ loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_PARA_REG, loongson_spi->para & ~1);
+
+ return 0;
+}
+
+static int loongson_spi_transfer_one(struct spi_controller *ctrl, struct spi_device *spi,
+ struct spi_transfer *xfer)
+{
+ struct loongson_spi *loongson_spi = spi_master_get_devdata(spi->master);
+
+ loongson_spi_update_state(loongson_spi, spi, xfer);
+ if (xfer->len)
+ xfer->len = loongson_spi_write_read(spi, xfer);
+
+ return 0;
+}
+
+static int loongson_spi_unprepare_message(struct spi_controller *ctrl, struct spi_message *m)
+{
+ struct loongson_spi *loongson_spi = spi_controller_get_devdata(ctrl);
+
+ loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_PARA_REG, loongson_spi->para);
+
+ return 0;
+}
+
+static void loongson_spi_reginit(struct loongson_spi *loongson_spi_dev)
+{
+ unsigned char val;
+
+ val = loongson_spi_read_reg(loongson_spi_dev, LOONGSON_SPI_SPCR_REG);
+ val &= ~LOONGSON_SPI_SPCR_SPE;
+ loongson_spi_write_reg(loongson_spi_dev, LOONGSON_SPI_SPCR_REG, val);
+
+ loongson_spi_write_reg(loongson_spi_dev, LOONGSON_SPI_SPSR_REG,
+ (LOONGSON_SPI_SPSR_SPIF | LOONGSON_SPI_SPSR_WCOL));
+
+ val = loongson_spi_read_reg(loongson_spi_dev, LOONGSON_SPI_SPCR_REG);
+ val |= LOONGSON_SPI_SPCR_SPE;
+ loongson_spi_write_reg(loongson_spi_dev, LOONGSON_SPI_SPCR_REG, val);
+}
+
+static int loongson_spi_init_master(struct device *dev, struct resource *res)
+{
+ struct spi_master *master;
+ struct loongson_spi *spi;
+ struct clk *clk;
+ int ret;
+
+ master = spi_alloc_master(dev, sizeof(struct loongson_spi));
+ if (master == NULL) {
+ dev_dbg(dev, "master allocation failed\n");
+ return -ENOMEM;
+ }
+
+ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
+ master->setup = loongson_spi_setup;
+ master->prepare_message = loongson_spi_prepare_message;
+ master->transfer_one = loongson_spi_transfer_one;
+ master->unprepare_message = loongson_spi_unprepare_message;
+ master->set_cs = loongson_spi_set_cs;
+ master->num_chipselect = 4;
+ master->dev.of_node = of_node_get(dev->of_node);
+ dev_set_drvdata(dev, master);
+
+ spi = spi_master_get_devdata(master);
+
+ spi->master = master;
+
+ spi->base = devm_ioremap(dev, res->start, resource_size(res));
+ if (spi->base == NULL) {
+ dev_err(dev, "cannot map io\n");
+ ret = -ENXIO;
+ goto free_master;
+ }
+
+ clk = devm_clk_get(dev, NULL);
+ if (!IS_ERR(clk))
+ spi->clk_rate = clk_get_rate(clk);
+
+ loongson_spi_reginit(spi);
+
+ spi->mode = 0;
+ if (of_get_property(dev->of_node, "spi-nocs", NULL))
+ spi->mode |= SPI_NO_CS;
+
+ spin_lock_init(&spi->lock);
+
+ ret = spi_register_master(master);
+ if (ret < 0)
+ goto free_master;
+
+ return ret;
+
+free_master:
+ kfree(master);
+ spi_master_put(master);
+
+ return ret;
+}
+
+static int loongson_spi_platform_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct resource *res;
+ int ret;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (res == NULL) {
+ dev_err(dev, "cannot get io resource memory\n");
+ return -ENOENT;
+ }
+
+ ret = loongson_spi_init_master(dev, res);
+ if (ret)
+ dev_err(dev, "failed to initialize master\n");
+
+ return ret;
+}
+
+static int __maybe_unused loongson_spi_suspend(struct device *dev)
+{
+ struct loongson_spi *loongson_spi;
+ struct spi_master *master;
+
+ master = dev_get_drvdata(dev);
+ loongson_spi = spi_master_get_devdata(master);
+
+ loongson_spi->spcr = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPCR_REG);
+ loongson_spi->sper = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPER_REG);
+ loongson_spi->spsr = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPSR_REG);
+ loongson_spi->para = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_PARA_REG);
+ loongson_spi->sfcs = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SFCS_REG);
+ loongson_spi->timi = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_TIMI_REG);
+
+ return 0;
+}
+
+static int __maybe_unused loongson_spi_resume(struct device *dev)
+{
+ struct loongson_spi *loongson_spi;
+ struct spi_master *master;
+
+ master = dev_get_drvdata(dev);
+ loongson_spi = spi_master_get_devdata(master);
+
+ loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPCR_REG, loongson_spi->spcr);
+ loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPER_REG, loongson_spi->sper);
+ loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPSR_REG, loongson_spi->spsr);
+ loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_PARA_REG, loongson_spi->para);
+ loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SFCS_REG, loongson_spi->sfcs);
+ loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_TIMI_REG, loongson_spi->timi);
+
+ return 0;
+}
+
+static const struct dev_pm_ops loongson_spi_dev_pm_ops = {
+ .suspend = loongson_spi_suspend,
+ .resume = loongson_spi_resume,
+};
+
+static const struct of_device_id loongson_spi_id_table[] = {
+ { .compatible = "loongson,ls2k-spi", },
+ { }
+};
+MODULE_DEVICE_TABLE(of, loongson_spi_id_table);
+
+static struct platform_driver loongson_spi_driver = {
+ .probe = loongson_spi_platform_probe,
+ .driver = {
+ .name = "loongson-spi",
+ .owner = THIS_MODULE,
+ .bus = &platform_bus_type,
+ .pm = &loongson_spi_dev_pm_ops,
+ .of_match_table = loongson_spi_id_table,
+ },
+};
+
+#ifdef CONFIG_PCI
+static int loongson_spi_pci_register(struct pci_dev *pdev,
+ const struct pci_device_id *ent)
+{
+ int ret;
+ unsigned char v8;
+ struct resource res[2];
+ struct device *dev = &pdev->dev;
+
+ ret = pci_enable_device(pdev);
+ if (ret < 0) {
+ dev_err(dev, "cannot enable pci device\n");
+ goto err_out;
+ }
+
+ ret = pci_request_region(pdev, 0, "loongson-spi io");
+ if (ret < 0) {
+ dev_err(dev, "cannot request region 0.\n");
+ goto err_out;
+ }
+
+ res[0].start = pci_resource_start(pdev, 0);
+ res[0].end = pci_resource_end(pdev, 0);
+ ret = pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &v8);
+
+ if (ret == PCIBIOS_SUCCESSFUL) {
+ res[1].start = v8;
+ res[1].end = v8;
+ }
+
+ ret = loongson_spi_init_master(dev, res);
+ if (ret)
+ dev_err(dev, "failed to initialize master\n");
+
+err_out:
+ return ret;
+}
+
+static void loongson_spi_pci_unregister(struct pci_dev *pdev)
+{
+ pci_release_region(pdev, 0);
+}
+
+static struct pci_device_id loongson_spi_devices[] = {
+ {PCI_DEVICE(0x14, 0x7a0b)},
+ {PCI_DEVICE(0x14, 0x7a1b)},
+ {0, 0, 0, 0, 0, 0, 0}
+};
+MODULE_DEVICE_TABLE(pci, loongson_spi_devices);
+
+static struct pci_driver loongson_spi_pci_driver = {
+ .name = "loongson-spi-pci",
+ .id_table = loongson_spi_devices,
+ .probe = loongson_spi_pci_register,
+ .remove = loongson_spi_pci_unregister,
+};
+#endif
+
+static int __init loongson_spi_init(void)
+{
+ int ret;
+
+ ret = platform_driver_register(&loongson_spi_driver);
+ if (ret)
+ return ret;
+#ifdef CONFIG_PCI
+ ret = pci_register_driver(&loongson_spi_pci_driver);
+ if (ret) {
+ platform_driver_unregister(&loongson_spi_driver);
+ return ret;
+ }
+#endif
+ return 0;
+}
+
+static void __exit loongson_spi_exit(void)
+{
+ platform_driver_unregister(&loongson_spi_driver);
+#ifdef CONFIG_PCI
+ pci_unregister_driver(&loongson_spi_pci_driver);
+#endif
+}
+
+module_init(loongson_spi_init);
+module_exit(loongson_spi_exit);
+
+MODULE_DESCRIPTION("Loongson spi driver");
+MODULE_LICENSE("GPL");