[3/5] arm64: dts: qcom: sm6350: Add QFPROM node

Message ID 20230315-topic-lagoon_gpu-v1-3-a74cbec4ecfc@linaro.org
State New
Headers
Series SM6350 GPU |

Commit Message

Konrad Dybcio March 16, 2023, 11:16 a.m. UTC
  From: Konrad Dybcio <konrad.dybcio@somainline.org>

Add a node for the QFPROM NVMEM hw and define the GPU fuse.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm6350.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)
  

Comments

Luca Weiss March 17, 2023, 8:50 a.m. UTC | #1
On Thu Mar 16, 2023 at 12:16 PM CET, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@somainline.org>
>
> Add a node for the QFPROM NVMEM hw and define the GPU fuse.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sm6350.dtsi | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
> index 523c7edfa4b3..60b68d305e53 100644
> --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
> @@ -637,6 +637,18 @@ ipcc: mailbox@408000 {
>  			#mbox-cells = <2>;
>  		};
>  
> +		qfprom: qfprom@784000 {
> +			compatible = "qcom,sm6350-qfprom", "qcom,qfprom";
> +			reg = <0 0x00784000 0 0x3000>;
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +
> +			gpu_speed_bin: gpu_speed_bin@2015 {

gpu-speed-bin@2015 ?

With that fixed:

Reviewed-by: Luca Weiss <luca.weiss@fairphone.com>

> +				reg = <0x2015 0x1>;
> +				bits = <0 8>;
> +			};
> +		};
> +
>  		rng: rng@793000 {
>  			compatible = "qcom,prng-ee";
>  			reg = <0 0x00793000 0 0x1000>;
>
> -- 
> 2.39.2
  
Konrad Dybcio March 17, 2023, 12:12 p.m. UTC | #2
On 17.03.2023 09:50, Luca Weiss wrote:
> On Thu Mar 16, 2023 at 12:16 PM CET, Konrad Dybcio wrote:
>> From: Konrad Dybcio <konrad.dybcio@somainline.org>
>>
>> Add a node for the QFPROM NVMEM hw and define the GPU fuse.
>>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>> ---
>>  arch/arm64/boot/dts/qcom/sm6350.dtsi | 12 ++++++++++++
>>  1 file changed, 12 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
>> index 523c7edfa4b3..60b68d305e53 100644
>> --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
>> @@ -637,6 +637,18 @@ ipcc: mailbox@408000 {
>>  			#mbox-cells = <2>;
>>  		};
>>  
>> +		qfprom: qfprom@784000 {
>> +			compatible = "qcom,sm6350-qfprom", "qcom,qfprom";
>> +			reg = <0 0x00784000 0 0x3000>;
>> +			#address-cells = <1>;
>> +			#size-cells = <1>;
>> +
>> +			gpu_speed_bin: gpu_speed_bin@2015 {
> 
> gpu-speed-bin@2015 ?
Ack
Konrad
> 
> With that fixed:
> 
> Reviewed-by: Luca Weiss <luca.weiss@fairphone.com>
> 
>> +				reg = <0x2015 0x1>;
>> +				bits = <0 8>;
>> +			};
>> +		};
>> +
>>  		rng: rng@793000 {
>>  			compatible = "qcom,prng-ee";
>>  			reg = <0 0x00793000 0 0x1000>;
>>
>> -- 
>> 2.39.2
>
  

Patch

diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 523c7edfa4b3..60b68d305e53 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -637,6 +637,18 @@  ipcc: mailbox@408000 {
 			#mbox-cells = <2>;
 		};
 
+		qfprom: qfprom@784000 {
+			compatible = "qcom,sm6350-qfprom", "qcom,qfprom";
+			reg = <0 0x00784000 0 0x3000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			gpu_speed_bin: gpu_speed_bin@2015 {
+				reg = <0x2015 0x1>;
+				bits = <0 8>;
+			};
+		};
+
 		rng: rng@793000 {
 			compatible = "qcom,prng-ee";
 			reg = <0 0x00793000 0 0x1000>;