Message ID | 20230315-topic-lagoon_gpu-v1-1-a74cbec4ecfc@linaro.org |
---|---|
State | New |
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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id u28-20020ac243dc000000b004db2978e330sm1194222lfl.258.2023.03.16.04.17.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 04:17:08 -0700 (PDT) From: Konrad Dybcio <konrad.dybcio@linaro.org> Date: Thu, 16 Mar 2023 12:16:56 +0100 Subject: [PATCH 1/5] dt-bindings: clock: qcom,gpucc: Fix SM6350 clock names MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20230315-topic-lagoon_gpu-v1-1-a74cbec4ecfc@linaro.org> References: <20230315-topic-lagoon_gpu-v1-0-a74cbec4ecfc@linaro.org> In-Reply-To: <20230315-topic-lagoon_gpu-v1-0-a74cbec4ecfc@linaro.org> To: Bjorn Andersson <andersson@kernel.org>, Andy Gross <agross@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Cc: Marijn Suijten <marijn.suijten@somainline.org>, Rob Herring <robh@kernel.org>, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio <konrad.dybcio@linaro.org> X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678965426; l=1659; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=bpaAXA5y4g96VwCAJK9chz5FYE16LKwf+GCJo/Dh+04=; b=Jild5AY0GLW3IlK/0sO5nZu7MvhQrlDmN5ABPy6VIRbq5sH0zdDzJyWVgYFZkV1dqSaHbcjDa8ah 60eKja2ND5+/d/+W42zSyRGM0uDlHxgiIq4CiB4Jr8+5kd3WG32y X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-0.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_HTTP,RCVD_IN_SORBS_SOCKS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1760523318363366118?= X-GMAIL-MSGID: =?utf-8?q?1760523318363366118?= |
Series |
SM6350 GPU
|
|
Commit Message
Konrad Dybcio
March 16, 2023, 11:16 a.m. UTC
SM6350 GPUCC uses the same clock names as the rest of the gang, except
without a _src suffix. Account for that.
Fixes: 7b91b9d8cc6c ("dt-bindings: clock: add SM6350 QCOM Graphics clock bindings")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
.../devicetree/bindings/clock/qcom,gpucc.yaml | 29 +++++++++++++++++++---
1 file changed, 25 insertions(+), 4 deletions(-)
Comments
On 16/03/2023 12:16, Konrad Dybcio wrote: > SM6350 GPUCC uses the same clock names as the rest of the gang, except > without a _src suffix. Account for that. Why not fixing the names instead (to use the same)? If the clocks are the same, why using different names for the inputs? To remind - these are not names of clocks in GCC, but names of clock inputs to the device. > > Fixes: 7b91b9d8cc6c ("dt-bindings: clock: add SM6350 QCOM Graphics clock bindings") > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- > .../devicetree/bindings/clock/qcom,gpucc.yaml | 29 +++++++++++++++++++--- > 1 file changed, 25 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml > index db53eb288995..d209060a619d 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml > @@ -43,10 +43,8 @@ properties: > - description: GPLL0 div branch source > > clock-names: > - items: > - - const: bi_tcxo > - - const: gcc_gpu_gpll0_clk_src > - - const: gcc_gpu_gpll0_div_clk_src > + minItems: 3 Drop minItems, not needed as it is implied by maxItems. > + maxItems: 3 > > '#clock-cells': > const: 1 > @@ -71,6 +69,29 @@ required: > > additionalProperties: false > > Best regards, Krzysztof
On 17.03.2023 09:37, Krzysztof Kozlowski wrote: > On 16/03/2023 12:16, Konrad Dybcio wrote: >> SM6350 GPUCC uses the same clock names as the rest of the gang, except >> without a _src suffix. Account for that. > > Why not fixing the names instead (to use the same)? If the clocks are > the same, why using different names for the inputs? To remind - these > are not names of clocks in GCC, but names of clock inputs to the device. Considering SM6350 is the only used of SM6350_GPUCC and it's not yet in next and I don't think any other project using devicetree has Adreno up on any platform, let alone this one, I suppose the ABI could be broken and the driver could be made to expect the more common set of names? Or I could transition it to index-based lookup? Konrad > >> >> Fixes: 7b91b9d8cc6c ("dt-bindings: clock: add SM6350 QCOM Graphics clock bindings") >> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> >> --- >> .../devicetree/bindings/clock/qcom,gpucc.yaml | 29 +++++++++++++++++++--- >> 1 file changed, 25 insertions(+), 4 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml >> index db53eb288995..d209060a619d 100644 >> --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml >> +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml >> @@ -43,10 +43,8 @@ properties: >> - description: GPLL0 div branch source >> >> clock-names: >> - items: >> - - const: bi_tcxo >> - - const: gcc_gpu_gpll0_clk_src >> - - const: gcc_gpu_gpll0_div_clk_src >> + minItems: 3 > > Drop minItems, not needed as it is implied by maxItems. > >> + maxItems: 3 >> >> '#clock-cells': >> const: 1 >> @@ -71,6 +69,29 @@ required: >> >> additionalProperties: false >> >> > > Best regards, > Krzysztof >
On 17.03.2023 13:11, Konrad Dybcio wrote: > > > On 17.03.2023 09:37, Krzysztof Kozlowski wrote: >> On 16/03/2023 12:16, Konrad Dybcio wrote: >>> SM6350 GPUCC uses the same clock names as the rest of the gang, except >>> without a _src suffix. Account for that. >> >> Why not fixing the names instead (to use the same)? If the clocks are >> the same, why using different names for the inputs? To remind - these >> are not names of clocks in GCC, but names of clock inputs to the device. > Considering SM6350 is the only used of SM6350_GPUCC and it's not yet > in next and I don't think any other project using devicetree has > Adreno up on any platform, let alone this one, I suppose the ABI could > be broken and the driver could be made to expect the more common set > of names? Or I could transition it to index-based lookup? Comments, please? Konrad > > Konrad >> >>> >>> Fixes: 7b91b9d8cc6c ("dt-bindings: clock: add SM6350 QCOM Graphics clock bindings") >>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> >>> --- >>> .../devicetree/bindings/clock/qcom,gpucc.yaml | 29 +++++++++++++++++++--- >>> 1 file changed, 25 insertions(+), 4 deletions(-) >>> >>> diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml >>> index db53eb288995..d209060a619d 100644 >>> --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml >>> +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml >>> @@ -43,10 +43,8 @@ properties: >>> - description: GPLL0 div branch source >>> >>> clock-names: >>> - items: >>> - - const: bi_tcxo >>> - - const: gcc_gpu_gpll0_clk_src >>> - - const: gcc_gpu_gpll0_div_clk_src >>> + minItems: 3 >> >> Drop minItems, not needed as it is implied by maxItems. >> >>> + maxItems: 3 >>> >>> '#clock-cells': >>> const: 1 >>> @@ -71,6 +69,29 @@ required: >>> >>> additionalProperties: false >>> >>> >> >> Best regards, >> Krzysztof >>
diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml index db53eb288995..d209060a619d 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml @@ -43,10 +43,8 @@ properties: - description: GPLL0 div branch source clock-names: - items: - - const: bi_tcxo - - const: gcc_gpu_gpll0_clk_src - - const: gcc_gpu_gpll0_div_clk_src + minItems: 3 + maxItems: 3 '#clock-cells': const: 1 @@ -71,6 +69,29 @@ required: additionalProperties: false +allOf: + - if: + properties: + compatible: + items: + - const: qcom,sm6350-gpucc + + then: + properties: + clock-names: + items: + - const: bi_tcxo + - const: gcc_gpu_gpll0_clk + - const: gcc_gpu_gpll0_div_clk + + else: + properties: + clock-names: + items: + - const: bi_tcxo + - const: gcc_gpu_gpll0_clk_src + - const: gcc_gpu_gpll0_div_clk_src + examples: - | #include <dt-bindings/clock/qcom,gcc-sdm845.h>