[13/15] reset: Add Nuvoton ma35d1 reset driver support
Commit Message
From: Jacky Huang <ychuang3@nuvoton.com>
This driver supports individual IP reset for ma35d1. The reset
control registers is a subset of system control registers.
Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
---
drivers/reset/Kconfig | 6 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-ma35d1.c | 152 +++++++++++++++++++++++++++++++++++
3 files changed, 159 insertions(+)
create mode 100644 drivers/reset/reset-ma35d1.c
Comments
On 15/03/2023 08:29, Jacky Huang wrote:
> From: Jacky Huang <ychuang3@nuvoton.com>
>
> This driver supports individual IP reset for ma35d1. The reset
> control registers is a subset of system control registers.
>
> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
> ---
> drivers/reset/Kconfig | 6 ++
> drivers/reset/Makefile | 1 +
> drivers/reset/reset-ma35d1.c | 152 +++++++++++++++++++++++++++++++++++
> 3 files changed, 159 insertions(+)
> create mode 100644 drivers/reset/reset-ma35d1.c
>
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index 2a52c990d4fe..47671060d259 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -143,6 +143,12 @@ config RESET_NPCM
> This enables the reset controller driver for Nuvoton NPCM
> BMC SoCs.
>
> +config RESET_NUVOTON_MA35D1
> + bool "Nuvton MA35D1 Reset Driver"
> + default ARCH_NUVOTON
|| COMPILE_TEST
> + help
> + This enables the reset controller driver for Nuvoton MA35D1 SoC.
> +
Best regards,
Krzysztof
On Wed, 15 Mar 2023, Jacky Huang wrote:
> From: Jacky Huang <ychuang3@nuvoton.com>
>
> This driver supports individual IP reset for ma35d1. The reset
> control registers is a subset of system control registers.
>
> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
> ---
> drivers/reset/Kconfig | 6 ++
> drivers/reset/Makefile | 1 +
> drivers/reset/reset-ma35d1.c | 152 +++++++++++++++++++++++++++++++++++
> 3 files changed, 159 insertions(+)
> create mode 100644 drivers/reset/reset-ma35d1.c
>
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index 2a52c990d4fe..47671060d259 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -143,6 +143,12 @@ config RESET_NPCM
> This enables the reset controller driver for Nuvoton NPCM
> BMC SoCs.
>
> +config RESET_NUVOTON_MA35D1
> + bool "Nuvton MA35D1 Reset Driver"
> + default ARCH_NUVOTON
> + help
> + This enables the reset controller driver for Nuvoton MA35D1 SoC.
> +
> config RESET_OXNAS
> bool
>
> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> index 3e7e5fd633a8..fd52dcf66a99 100644
> --- a/drivers/reset/Makefile
> +++ b/drivers/reset/Makefile
> @@ -20,6 +20,7 @@ obj-$(CONFIG_RESET_MCHP_SPARX5) += reset-microchip-sparx5.o
> obj-$(CONFIG_RESET_MESON) += reset-meson.o
> obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
> obj-$(CONFIG_RESET_NPCM) += reset-npcm.o
> +obj-$(CONFIG_RESET_NUVOTON_MA35D1) += reset-ma35d1.o
> obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
> obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
> obj-$(CONFIG_RESET_POLARFIRE_SOC) += reset-mpfs.o
> diff --git a/drivers/reset/reset-ma35d1.c b/drivers/reset/reset-ma35d1.c
> new file mode 100644
> index 000000000000..bdd39483ca4e
> --- /dev/null
> +++ b/drivers/reset/reset-ma35d1.c
> @@ -0,0 +1,152 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (C) 2023 Nuvoton Technology Corp.
> + * Author: Chi-Fang Li <cfli0@nuvoton.com>
> + */
> +
> +#include <linux/device.h>
> +#include <linux/err.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/reset-controller.h>
> +#include <linux/mfd/ma35d1-sys.h>
> +#include <dt-bindings/reset/nuvoton,ma35d1-reset.h>
> +#include <linux/regmap.h>
> +#include <linux/reboot.h>
> +
> +#define RST_PRE_REG 32
> +
> +struct ma35d1_reset_data {
> + struct reset_controller_dev rcdev;
> + struct regmap *regmap;
> +};
> +
> +struct ma35d1_reboot_data {
> + struct notifier_block restart_handler;
> + struct regmap *regmap;
> +};
> +
> +static int ma35d1_restart_handler(struct notifier_block *this,
> + unsigned long mode, void *cmd)
> +{
> + struct ma35d1_reboot_data *data =
> + container_of(this, struct ma35d1_reboot_data,
> + restart_handler);
> + regmap_write(data->regmap, REG_SYS_IPRST0, 1 << MA35D1_RESET_CHIP);
> + return -EAGAIN;
This results -EAGAIN always???
> +}
> +
> +static int ma35d1_reset_update(struct reset_controller_dev *rcdev,
> + unsigned long id, bool assert)
> +{
> + int reg;
> + int offset = (id / RST_PRE_REG) * 4;
> + struct ma35d1_reset_data *data =
> + container_of(rcdev, struct ma35d1_reset_data, rcdev);
> +
> + regmap_read(data->regmap, REG_SYS_IPRST0 + offset, ®);
> + if (assert)
> + reg |= 1 << (id % RST_PRE_REG);
> + else
> + reg &= ~(1 << (id % RST_PRE_REG));
> +
> + regmap_write(data->regmap, REG_SYS_IPRST0 + offset, reg);
> + return 0;
This returns always 0. What about regmap_read/write() errors, should the
be returned?
> +}
> +
> +static int ma35d1_reset_assert(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + return ma35d1_reset_update(rcdev, id, true);
> +}
> +
> +static int ma35d1_reset_deassert(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + return ma35d1_reset_update(rcdev, id, false);
> +}
> +
> +static int ma35d1_reset_status(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + int reg;
> + int offset = id / RST_PRE_REG;
> + struct ma35d1_reset_data *data =
> + container_of(rcdev, struct ma35d1_reset_data, rcdev);
> +
> + regmap_read(data->regmap, REG_SYS_IPRST0 + offset, ®);
Error handling?
> + return !!(reg & BIT(id % RST_PRE_REG));
> +}
> +
> +static const struct reset_control_ops ma35d1_reset_ops = {
> + .assert = ma35d1_reset_assert,
> + .deassert = ma35d1_reset_deassert,
> + .status = ma35d1_reset_status,
> +};
> +
> +static const struct of_device_id ma35d1_reset_dt_ids[] = {
> + { .compatible = "nuvoton,ma35d1-reset" },
> + { },
> +};
> +
> +static int ma35d1_reset_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct ma35d1_reset_data *reset_data;
> + struct ma35d1_reboot_data *reboot_data;
> + int err;
> +
> + if (!pdev->dev.of_node) {
> + dev_err(&pdev->dev, "Device tree node not found\n");
> + return -EINVAL;
> + }
> +
> + reset_data = devm_kzalloc(dev, sizeof(*reset_data), GFP_KERNEL);
> + if (!reset_data)
> + return -ENOMEM;
> +
> + reboot_data = devm_kzalloc(dev, sizeof(*reboot_data), GFP_KERNEL);
> + if (!reboot_data) {
> + devm_kfree(dev, reset_data);
Unnecessary.
> + return -ENOMEM;
> + }
> +
> + reset_data->regmap = syscon_regmap_lookup_by_phandle(
> + pdev->dev.of_node, "regmap");
> + if (IS_ERR(reset_data->regmap)) {
> + dev_err(&pdev->dev, "Failed to get SYS register base\n");
> + err = PTR_ERR(reset_data->regmap);
> + goto err_out;
> + }
> + reset_data->rcdev.owner = THIS_MODULE;
> + reset_data->rcdev.nr_resets = MA35D1_RESET_COUNT;
> + reset_data->rcdev.ops = &ma35d1_reset_ops;
> + reset_data->rcdev.of_node = dev->of_node;
> +
> + reboot_data->regmap = reset_data->regmap;
> + reboot_data->restart_handler.notifier_call = ma35d1_restart_handler;
> + reboot_data->restart_handler.priority = 192;
> +
> + err = register_restart_handler(&reboot_data->restart_handler);
> + if (err)
> + dev_warn(&pdev->dev, "failed to register restart handler\n");
> +
> + return devm_reset_controller_register(dev, &reset_data->rcdev);
> +
> +err_out:
> + devm_kfree(dev, reset_data);
> + devm_kfree(dev, reboot_data);
These are unnecessary since the probe is failing.
> + return err;
> +}
> +
> +static struct platform_driver ma35d1_reset_driver = {
> + .probe = ma35d1_reset_probe,
> + .driver = {
> + .name = "ma35d1-reset",
> + .of_match_table = ma35d1_reset_dt_ids,
> + },
> +};
> +
> +builtin_platform_driver(ma35d1_reset_driver);
>
Hi Krzysztof,
On 2023/3/16 下午 03:51, Krzysztof Kozlowski wrote:
> On 15/03/2023 08:29, Jacky Huang wrote:
>> From: Jacky Huang<ychuang3@nuvoton.com>
>>
>> This driver supports individual IP reset for ma35d1. The reset
>> control registers is a subset of system control registers.
>>
>> Signed-off-by: Jacky Huang<ychuang3@nuvoton.com>
>> ---
>> drivers/reset/Kconfig | 6 ++
>> drivers/reset/Makefile | 1 +
>> drivers/reset/reset-ma35d1.c | 152 +++++++++++++++++++++++++++++++++++
>> 3 files changed, 159 insertions(+)
>> create mode 100644 drivers/reset/reset-ma35d1.c
>>
>> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
>> index 2a52c990d4fe..47671060d259 100644
>> --- a/drivers/reset/Kconfig
>> +++ b/drivers/reset/Kconfig
>> @@ -143,6 +143,12 @@ config RESET_NPCM
>> This enables the reset controller driver for Nuvoton NPCM
>> BMC SoCs.
>>
>> +config RESET_NUVOTON_MA35D1
>> + bool "Nuvton MA35D1 Reset Driver"
>> + default ARCH_NUVOTON
> || COMPILE_TEST
I will add this config. Thank you.
>> + help
>> + This enables the reset controller driver for Nuvoton MA35D1 SoC.
>> +
> Best regards,
> Krzysztof
>
Best regards,
Jacky Huang
Dear Ilpo,
On 2023/3/16 下午 11:05, Ilpo Järvinen wrote:
> On Wed, 15 Mar 2023, Jacky Huang wrote:
>
>> From: Jacky Huang <ychuang3@nuvoton.com>
>>
>> This driver supports individual IP reset for ma35d1. The reset
>> control registers is a subset of system control registers.
>>
>> Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
>> ---
>> drivers/reset/Kconfig | 6 ++
>> drivers/reset/Makefile | 1 +
>> drivers/reset/reset-ma35d1.c | 152 +++++++++++++++++++++++++++++++++++
>> 3 files changed, 159 insertions(+)
>> create mode 100644 drivers/reset/reset-ma35d1.c
>>
>> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
>> index 2a52c990d4fe..47671060d259 100644
>> --- a/drivers/reset/Kconfig
>> +++ b/drivers/reset/Kconfig
>> @@ -143,6 +143,12 @@ config RESET_NPCM
>> This enables the reset controller driver for Nuvoton NPCM
>> BMC SoCs.
>>
>> +config RESET_NUVOTON_MA35D1
>> + bool "Nuvton MA35D1 Reset Driver"
>> + default ARCH_NUVOTON
>> + help
>> + This enables the reset controller driver for Nuvoton MA35D1 SoC.
>> +
>> config RESET_OXNAS
>> bool
>>
>> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
>> index 3e7e5fd633a8..fd52dcf66a99 100644
>> --- a/drivers/reset/Makefile
>> +++ b/drivers/reset/Makefile
>> @@ -20,6 +20,7 @@ obj-$(CONFIG_RESET_MCHP_SPARX5) += reset-microchip-sparx5.o
>> obj-$(CONFIG_RESET_MESON) += reset-meson.o
>> obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
>> obj-$(CONFIG_RESET_NPCM) += reset-npcm.o
>> +obj-$(CONFIG_RESET_NUVOTON_MA35D1) += reset-ma35d1.o
>> obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
>> obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
>> obj-$(CONFIG_RESET_POLARFIRE_SOC) += reset-mpfs.o
>> diff --git a/drivers/reset/reset-ma35d1.c b/drivers/reset/reset-ma35d1.c
>> new file mode 100644
>> index 000000000000..bdd39483ca4e
>> --- /dev/null
>> +++ b/drivers/reset/reset-ma35d1.c
>> @@ -0,0 +1,152 @@
>> +// SPDX-License-Identifier: GPL-2.0-only
>> +/*
>> + * Copyright (C) 2023 Nuvoton Technology Corp.
>> + * Author: Chi-Fang Li <cfli0@nuvoton.com>
>> + */
>> +
>> +#include <linux/device.h>
>> +#include <linux/err.h>
>> +#include <linux/mfd/syscon.h>
>> +#include <linux/io.h>
>> +#include <linux/of.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/reset-controller.h>
>> +#include <linux/mfd/ma35d1-sys.h>
>> +#include <dt-bindings/reset/nuvoton,ma35d1-reset.h>
>> +#include <linux/regmap.h>
>> +#include <linux/reboot.h>
>> +
>> +#define RST_PRE_REG 32
>> +
>> +struct ma35d1_reset_data {
>> + struct reset_controller_dev rcdev;
>> + struct regmap *regmap;
>> +};
>> +
>> +struct ma35d1_reboot_data {
>> + struct notifier_block restart_handler;
>> + struct regmap *regmap;
>> +};
>> +
>> +static int ma35d1_restart_handler(struct notifier_block *this,
>> + unsigned long mode, void *cmd)
>> +{
>> + struct ma35d1_reboot_data *data =
>> + container_of(this, struct ma35d1_reboot_data,
>> + restart_handler);
>> + regmap_write(data->regmap, REG_SYS_IPRST0, 1 << MA35D1_RESET_CHIP);
>> + return -EAGAIN;
> This results -EAGAIN always???
The chip will reset immediately after the write to REG_SYS_IPRST0.
The return line should never be executed. If yes, it must be failed to
reset.
Anyway, I will modify it as
return regmap_write(data->regmap, REG_SYS_IPRST0, 1 << MA35D1_RESET_CHIP);
>
>> +}
>> +
>> +static int ma35d1_reset_update(struct reset_controller_dev *rcdev,
>> + unsigned long id, bool assert)
>> +{
>> + int reg;
>> + int offset = (id / RST_PRE_REG) * 4;
>> + struct ma35d1_reset_data *data =
>> + container_of(rcdev, struct ma35d1_reset_data, rcdev);
>> +
>> + regmap_read(data->regmap, REG_SYS_IPRST0 + offset, ®);
>> + if (assert)
>> + reg |= 1 << (id % RST_PRE_REG);
>> + else
>> + reg &= ~(1 << (id % RST_PRE_REG));
>> +
>> + regmap_write(data->regmap, REG_SYS_IPRST0 + offset, reg);
>> + return 0;
> This returns always 0. What about regmap_read/write() errors, should the
> be returned?
I will modify it as
return regmap_write(data->regmap, REG_SYS_IPRST0 + offset, reg);
And add return value check to the regmap_read().
>> +}
>> +
>> +static int ma35d1_reset_assert(struct reset_controller_dev *rcdev,
>> + unsigned long id)
>> +{
>> + return ma35d1_reset_update(rcdev, id, true);
>> +}
>> +
>> +static int ma35d1_reset_deassert(struct reset_controller_dev *rcdev,
>> + unsigned long id)
>> +{
>> + return ma35d1_reset_update(rcdev, id, false);
>> +}
>> +
>> +static int ma35d1_reset_status(struct reset_controller_dev *rcdev,
>> + unsigned long id)
>> +{
>> + int reg;
>> + int offset = id / RST_PRE_REG;
>> + struct ma35d1_reset_data *data =
>> + container_of(rcdev, struct ma35d1_reset_data, rcdev);
>> +
>> + regmap_read(data->regmap, REG_SYS_IPRST0 + offset, ®);
> Error handling?
I will modify it as
ret = regmap_read(data->regmap, REG_SYS_IPRST0 + offset, ®);
if (ret < 0)
return ret;
>
>> + return !!(reg & BIT(id % RST_PRE_REG));
>> +}
>> +
>> +static const struct reset_control_ops ma35d1_reset_ops = {
>> + .assert = ma35d1_reset_assert,
>> + .deassert = ma35d1_reset_deassert,
>> + .status = ma35d1_reset_status,
>> +};
>> +
>> +static const struct of_device_id ma35d1_reset_dt_ids[] = {
>> + { .compatible = "nuvoton,ma35d1-reset" },
>> + { },
>> +};
>> +
>> +static int ma35d1_reset_probe(struct platform_device *pdev)
>> +{
>> + struct device *dev = &pdev->dev;
>> + struct ma35d1_reset_data *reset_data;
>> + struct ma35d1_reboot_data *reboot_data;
>> + int err;
>> +
>> + if (!pdev->dev.of_node) {
>> + dev_err(&pdev->dev, "Device tree node not found\n");
>> + return -EINVAL;
>> + }
>> +
>> + reset_data = devm_kzalloc(dev, sizeof(*reset_data), GFP_KERNEL);
>> + if (!reset_data)
>> + return -ENOMEM;
>> +
>> + reboot_data = devm_kzalloc(dev, sizeof(*reboot_data), GFP_KERNEL);
>> + if (!reboot_data) {
>> + devm_kfree(dev, reset_data);
> Unnecessary.
OK, I will remove this devm_kfree().
>> + return -ENOMEM;
>> + }
>> +
>> + reset_data->regmap = syscon_regmap_lookup_by_phandle(
>> + pdev->dev.of_node, "regmap");
>> + if (IS_ERR(reset_data->regmap)) {
>> + dev_err(&pdev->dev, "Failed to get SYS register base\n");
>> + err = PTR_ERR(reset_data->regmap);
>> + goto err_out;
>> + }
>> + reset_data->rcdev.owner = THIS_MODULE;
>> + reset_data->rcdev.nr_resets = MA35D1_RESET_COUNT;
>> + reset_data->rcdev.ops = &ma35d1_reset_ops;
>> + reset_data->rcdev.of_node = dev->of_node;
>> +
>> + reboot_data->regmap = reset_data->regmap;
>> + reboot_data->restart_handler.notifier_call = ma35d1_restart_handler;
>> + reboot_data->restart_handler.priority = 192;
>> +
>> + err = register_restart_handler(&reboot_data->restart_handler);
>> + if (err)
>> + dev_warn(&pdev->dev, "failed to register restart handler\n");
>> +
>> + return devm_reset_controller_register(dev, &reset_data->rcdev);
>> +
>> +err_out:
>> + devm_kfree(dev, reset_data);
>> + devm_kfree(dev, reboot_data);
> These are unnecessary since the probe is failing.
OK, I will make it just return err.
>
>> + return err;
>> +}
>> +
>> +static struct platform_driver ma35d1_reset_driver = {
>> + .probe = ma35d1_reset_probe,
>> + .driver = {
>> + .name = "ma35d1-reset",
>> + .of_match_table = ma35d1_reset_dt_ids,
>> + },
>> +};
>> +
>> +builtin_platform_driver(ma35d1_reset_driver);
>>
Best regards,
Jacky Huang
@@ -143,6 +143,12 @@ config RESET_NPCM
This enables the reset controller driver for Nuvoton NPCM
BMC SoCs.
+config RESET_NUVOTON_MA35D1
+ bool "Nuvton MA35D1 Reset Driver"
+ default ARCH_NUVOTON
+ help
+ This enables the reset controller driver for Nuvoton MA35D1 SoC.
+
config RESET_OXNAS
bool
@@ -20,6 +20,7 @@ obj-$(CONFIG_RESET_MCHP_SPARX5) += reset-microchip-sparx5.o
obj-$(CONFIG_RESET_MESON) += reset-meson.o
obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
obj-$(CONFIG_RESET_NPCM) += reset-npcm.o
+obj-$(CONFIG_RESET_NUVOTON_MA35D1) += reset-ma35d1.o
obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
obj-$(CONFIG_RESET_POLARFIRE_SOC) += reset-mpfs.o
new file mode 100644
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2023 Nuvoton Technology Corp.
+ * Author: Chi-Fang Li <cfli0@nuvoton.com>
+ */
+
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/mfd/syscon.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+#include <linux/mfd/ma35d1-sys.h>
+#include <dt-bindings/reset/nuvoton,ma35d1-reset.h>
+#include <linux/regmap.h>
+#include <linux/reboot.h>
+
+#define RST_PRE_REG 32
+
+struct ma35d1_reset_data {
+ struct reset_controller_dev rcdev;
+ struct regmap *regmap;
+};
+
+struct ma35d1_reboot_data {
+ struct notifier_block restart_handler;
+ struct regmap *regmap;
+};
+
+static int ma35d1_restart_handler(struct notifier_block *this,
+ unsigned long mode, void *cmd)
+{
+ struct ma35d1_reboot_data *data =
+ container_of(this, struct ma35d1_reboot_data,
+ restart_handler);
+ regmap_write(data->regmap, REG_SYS_IPRST0, 1 << MA35D1_RESET_CHIP);
+ return -EAGAIN;
+}
+
+static int ma35d1_reset_update(struct reset_controller_dev *rcdev,
+ unsigned long id, bool assert)
+{
+ int reg;
+ int offset = (id / RST_PRE_REG) * 4;
+ struct ma35d1_reset_data *data =
+ container_of(rcdev, struct ma35d1_reset_data, rcdev);
+
+ regmap_read(data->regmap, REG_SYS_IPRST0 + offset, ®);
+ if (assert)
+ reg |= 1 << (id % RST_PRE_REG);
+ else
+ reg &= ~(1 << (id % RST_PRE_REG));
+
+ regmap_write(data->regmap, REG_SYS_IPRST0 + offset, reg);
+ return 0;
+}
+
+static int ma35d1_reset_assert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ return ma35d1_reset_update(rcdev, id, true);
+}
+
+static int ma35d1_reset_deassert(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ return ma35d1_reset_update(rcdev, id, false);
+}
+
+static int ma35d1_reset_status(struct reset_controller_dev *rcdev,
+ unsigned long id)
+{
+ int reg;
+ int offset = id / RST_PRE_REG;
+ struct ma35d1_reset_data *data =
+ container_of(rcdev, struct ma35d1_reset_data, rcdev);
+
+ regmap_read(data->regmap, REG_SYS_IPRST0 + offset, ®);
+ return !!(reg & BIT(id % RST_PRE_REG));
+}
+
+static const struct reset_control_ops ma35d1_reset_ops = {
+ .assert = ma35d1_reset_assert,
+ .deassert = ma35d1_reset_deassert,
+ .status = ma35d1_reset_status,
+};
+
+static const struct of_device_id ma35d1_reset_dt_ids[] = {
+ { .compatible = "nuvoton,ma35d1-reset" },
+ { },
+};
+
+static int ma35d1_reset_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct ma35d1_reset_data *reset_data;
+ struct ma35d1_reboot_data *reboot_data;
+ int err;
+
+ if (!pdev->dev.of_node) {
+ dev_err(&pdev->dev, "Device tree node not found\n");
+ return -EINVAL;
+ }
+
+ reset_data = devm_kzalloc(dev, sizeof(*reset_data), GFP_KERNEL);
+ if (!reset_data)
+ return -ENOMEM;
+
+ reboot_data = devm_kzalloc(dev, sizeof(*reboot_data), GFP_KERNEL);
+ if (!reboot_data) {
+ devm_kfree(dev, reset_data);
+ return -ENOMEM;
+ }
+
+ reset_data->regmap = syscon_regmap_lookup_by_phandle(
+ pdev->dev.of_node, "regmap");
+ if (IS_ERR(reset_data->regmap)) {
+ dev_err(&pdev->dev, "Failed to get SYS register base\n");
+ err = PTR_ERR(reset_data->regmap);
+ goto err_out;
+ }
+ reset_data->rcdev.owner = THIS_MODULE;
+ reset_data->rcdev.nr_resets = MA35D1_RESET_COUNT;
+ reset_data->rcdev.ops = &ma35d1_reset_ops;
+ reset_data->rcdev.of_node = dev->of_node;
+
+ reboot_data->regmap = reset_data->regmap;
+ reboot_data->restart_handler.notifier_call = ma35d1_restart_handler;
+ reboot_data->restart_handler.priority = 192;
+
+ err = register_restart_handler(&reboot_data->restart_handler);
+ if (err)
+ dev_warn(&pdev->dev, "failed to register restart handler\n");
+
+ return devm_reset_controller_register(dev, &reset_data->rcdev);
+
+err_out:
+ devm_kfree(dev, reset_data);
+ devm_kfree(dev, reboot_data);
+ return err;
+}
+
+static struct platform_driver ma35d1_reset_driver = {
+ .probe = ma35d1_reset_probe,
+ .driver = {
+ .name = "ma35d1-reset",
+ .of_match_table = ma35d1_reset_dt_ids,
+ },
+};
+
+builtin_platform_driver(ma35d1_reset_driver);