[2/2] arm64: dts: qcom: Add base qrb4210-rb2 board dts

Message ID 20230314210828.2049720-3-bhupesh.sharma@linaro.org
State New
Headers
Series arm64: dts: qcom: Add Qualcomm RB2 board dts |

Commit Message

Bhupesh Sharma March 14, 2023, 9:08 p.m. UTC
  Add DTS for Qualcomm qrb4210-rb2 board which uses SM4250 SoC.

This adds debug uart, emmc, uSD and tlmm support along with
regulators found on this board.

Also defines the 'xo_board' and 'sleep_clk' frequencies for
this board.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
---
 arch/arm64/boot/dts/qcom/Makefile        |   1 +
 arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 227 +++++++++++++++++++++++
 2 files changed, 228 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
  

Comments

Konrad Dybcio March 14, 2023, 9:25 p.m. UTC | #1
On 14.03.2023 22:08, Bhupesh Sharma wrote:
> Add DTS for Qualcomm qrb4210-rb2 board which uses SM4250 SoC.
> 
> This adds debug uart, emmc, uSD and tlmm support along with
> regulators found on this board.
> 
> Also defines the 'xo_board' and 'sleep_clk' frequencies for
> this board.
> 
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
> ---
[...]

> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
This SoC does not feature RPMh, drop.

> +#include "sm4250.dtsi"
> +
> +/ {
> +	model = "Qualcomm Technologies, Inc. QRB4210 RB2";
> +	compatible = "qcom,qrb4210-rb2", "qcom,sm4250";
Please add a qcom,qrb4210 between the board-specific and the common SoC
compatibles so that we can address QRB-specific quirks if such ever arise.

> +
> +	aliases {
> +		serial0 = &uart4;
> +	};
> +
[...]

> +&xo_board {
> +	clock-frequency = <19200000>;
> +};
> +
> +&sleep_clk {
> +	clock-frequency = <32000>;
> +};
Out of alphanumerical order


> +
> +&qupv3_id_0 {
> +	status = "okay";
> +};
> +
> +&uart4 {
> +	status = "okay";
> +};
> +
> +&rpm_requests {
Out of alphanumerical order

> +	regulators-0 {
Will there be more PMICs under this node? If not, drop the -0.

[...]

> +&tlmm {
> +	gpio-reserved-ranges = <37 5>, <43 2>, <47 1>,
> +			       <49 1>, <52 1>, <54 1>,
> +			       <56 3>, <61 2>, <64 1>,
> +			       <68 1>, <72 8>, <96 1>;
> +};
Are there *really* so many? Does the board refuse to boot if
you knock off any of these entries? If so, they probably
don't belong here.


> +
> +&sdhc_1 {
> +	status = "okay";
Status should go last
> +
> +	vmmc-supply = <&vreg_l24a_2p96>; /* emmc power line */
> +	vqmmc-supply = <&vreg_l11a_1p8>; /* emmc vddq */
The comments are not very useful, drop please.

> +	bus-width = <8>;
This is defined in the SoC dtsi already

> +	no-sdio;
> +	non-removable;
> +};
> +
> +&sdhc_2 {
> +	status = "okay";
> +
> +	cd-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>; /* card detect gpio */
> +	vmmc-supply = <&vreg_l22a_2p96>; /* Card power line */
> +	vqmmc-supply = <&vreg_l5a_2p96>; /* IO line power */
> +	bus-width = <4>;
> +	no-sdio;
> +	no-emmc;
Ditto

Konrad
> +};
  
Bhupesh Sharma March 15, 2023, 9:59 a.m. UTC | #2
On 3/15/23 2:55 AM, Konrad Dybcio wrote:
> 
> 
> On 14.03.2023 22:08, Bhupesh Sharma wrote:
>> Add DTS for Qualcomm qrb4210-rb2 board which uses SM4250 SoC.
>>
>> This adds debug uart, emmc, uSD and tlmm support along with
>> regulators found on this board.
>>
>> Also defines the 'xo_board' and 'sleep_clk' frequencies for
>> this board.
>>
>> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
>> ---
> [...]
> 
>> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> This SoC does not feature RPMh, drop.

Ok.

>> +#include "sm4250.dtsi"
>> +
>> +/ {
>> +	model = "Qualcomm Technologies, Inc. QRB4210 RB2";
>> +	compatible = "qcom,qrb4210-rb2", "qcom,sm4250";
> Please add a qcom,qrb4210 between the board-specific and the common SoC
> compatibles so that we can address QRB-specific quirks if such ever arise.

As per the available documentation there are no qrb specific quirks as 
of now, but let me add a qcom,qrb4210 for future compatibility.

>> +
>> +	aliases {
>> +		serial0 = &uart4;
>> +	};
>> +
> [...]
> 
>> +&xo_board {
>> +	clock-frequency = <19200000>;
>> +};
>> +
>> +&sleep_clk {
>> +	clock-frequency = <32000>;
>> +};
> Out of alphanumerical order

Ok.

>> +
>> +&qupv3_id_0 {
>> +	status = "okay";
>> +};
>> +
>> +&uart4 {
>> +	status = "okay";
>> +};
>> +
>> +&rpm_requests {
> Out of alphanumerical order

Ok.

>> +	regulators-0 {
> Will there be more PMICs under this node? If not, drop the -0.

Ok.

> [...]
> 
>> +&tlmm {
>> +	gpio-reserved-ranges = <37 5>, <43 2>, <47 1>,
>> +			       <49 1>, <52 1>, <54 1>,
>> +			       <56 3>, <61 2>, <64 1>,
>> +			       <68 1>, <72 8>, <96 1>;
>> +};
> Are there *really* so many? Does the board refuse to boot if
> you knock off any of these entries? If so, they probably
> don't belong here.

Yes, these are reserved / not-connected gpios as per latest version of 
the board schematics.

>> +
>> +&sdhc_1 {
>> +	status = "okay";
> Status should go last
>> +
>> +	vmmc-supply = <&vreg_l24a_2p96>; /* emmc power line */
>> +	vqmmc-supply = <&vreg_l11a_1p8>; /* emmc vddq */
> The comments are not very useful, drop please.
> 
>> +	bus-width = <8>;
> This is defined in the SoC dtsi already

Ok.

>> +	no-sdio;
>> +	non-removable;
>> +};
>> +
>> +&sdhc_2 {
>> +	status = "okay";
>> +
>> +	cd-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>; /* card detect gpio */
>> +	vmmc-supply = <&vreg_l22a_2p96>; /* Card power line */
>> +	vqmmc-supply = <&vreg_l5a_2p96>; /* IO line power */
>> +	bus-width = <4>;
>> +	no-sdio;
>> +	no-emmc;
> Ditto

Ok. Will send updated v2 soon.

Thanks.
  

Patch

diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 31aa54f0428c..23522778b5b9 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -69,6 +69,7 @@  dtb-$(CONFIG_ARCH_QCOM)	+= msm8998-xiaomi-sagit.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-1000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-4000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qdu1000-idp.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= qrb4210-rb2.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qrb5165-rb5.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qrb5165-rb5-vision-mezzanine.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qru1000-idp.dtb
diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
new file mode 100644
index 000000000000..ed569c3f1c80
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
@@ -0,0 +1,227 @@ 
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023, Linaro Limited
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include "sm4250.dtsi"
+
+/ {
+	model = "Qualcomm Technologies, Inc. QRB4210 RB2";
+	compatible = "qcom,qrb4210-rb2", "qcom,sm4250";
+
+	aliases {
+		serial0 = &uart4;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	vph_pwr: vph-pwr-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vph_pwr";
+		regulator-min-microvolt = <3700000>;
+		regulator-max-microvolt = <3700000>;
+
+		regulator-always-on;
+		regulator-boot-on;
+	};
+};
+
+&xo_board {
+	clock-frequency = <19200000>;
+};
+
+&sleep_clk {
+	clock-frequency = <32000>;
+};
+
+&qupv3_id_0 {
+	status = "okay";
+};
+
+&uart4 {
+	status = "okay";
+};
+
+&rpm_requests {
+	regulators-0 {
+		compatible = "qcom,rpm-pm6125-regulators";
+
+		vdd-s1-supply = <&vph_pwr>;
+		vdd-s2-supply = <&vph_pwr>;
+		vdd-s3-supply = <&vph_pwr>;
+		vdd-s4-supply = <&vph_pwr>;
+		vdd-s5-supply = <&vph_pwr>;
+		vdd-s6-supply = <&vph_pwr>;
+		vdd-s7-supply = <&vph_pwr>;
+		vdd-s8-supply = <&vph_pwr>;
+		vdd-s9-supply = <&vph_pwr>;
+		vdd-s10-supply = <&vph_pwr>;
+
+		vdd-l1-l7-l17-l18-supply = <&vreg_s6a_1p352>;
+		vdd-l2-l3-l4-supply = <&vreg_s6a_1p352>;
+		vdd-l5-l15-l19-l20-l21-l22-supply = <&vph_pwr>;
+		vdd-l6-l8-supply = <&vreg_s5a_0p848>;
+		vdd-l9-l11-supply = <&vreg_s7a_2p04>;
+		vdd-l10-l13-l14-supply = <&vreg_s7a_2p04>;
+		vdd-l12-l16-supply = <&vreg_s7a_2p04>;
+		vdd-l23-l24-supply = <&vph_pwr>;
+
+		vreg_s5a_0p848: s5 {
+			regulator-min-microvolt = <920000>;
+			regulator-max-microvolt = <1128000>;
+		};
+
+		vreg_s6a_1p352: s6 {
+			regulator-min-microvolt = <304000>;
+			regulator-max-microvolt = <1456000>;
+		};
+
+		vreg_s7a_2p04: s7 {
+			regulator-min-microvolt = <1280000>;
+			regulator-max-microvolt = <2080000>;
+		};
+
+		vreg_l1a_1p0: l1 {
+			regulator-min-microvolt = <952000>;
+			regulator-max-microvolt = <1152000>;
+		};
+
+		vreg_l4a_0p9: l4 {
+			regulator-min-microvolt = <488000>;
+			regulator-max-microvolt = <1000000>;
+		};
+
+		vreg_l5a_2p96: l5 {
+			regulator-min-microvolt = <1648000>;
+			regulator-max-microvolt = <3056000>;
+		};
+
+		vreg_l6a_0p6: l6 {
+			regulator-min-microvolt = <576000>;
+			regulator-max-microvolt = <656000>;
+		};
+
+		vreg_l7a_1p256: l7 {
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1304000>;
+		};
+
+		vreg_l8a_0p664: l8 {
+			regulator-min-microvolt = <400000>;
+			regulator-max-microvolt = <728000>;
+		};
+
+		vreg_l9a_1p8: l9 {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <2000000>;
+		};
+
+		vreg_l10a_1p8: l10 {
+			regulator-min-microvolt = <1704000>;
+			regulator-max-microvolt = <1904000>;
+		};
+
+		vreg_l11a_1p8: l11 {
+			regulator-min-microvolt = <1704000>;
+			regulator-max-microvolt = <1952000>;
+		};
+
+		vreg_l12a_1p8: l12 {
+			regulator-min-microvolt = <1624000>;
+			regulator-max-microvolt = <1984000>;
+		};
+
+		vreg_l13a_1p8: l13 {
+			regulator-min-microvolt = <1504000>;
+			regulator-max-microvolt = <1952000>;
+		};
+
+		vreg_l14a_1p8: l14 {
+			regulator-min-microvolt = <1704000>;
+			regulator-max-microvolt = <1904000>;
+		};
+
+		vreg_l15a_3p128: l15 {
+			regulator-min-microvolt = <2920000>;
+			regulator-max-microvolt = <3232000>;
+		};
+
+		vreg_l16a_1p3: l16 {
+			regulator-min-microvolt = <1704000>;
+			regulator-max-microvolt = <1904000>;
+		};
+
+		vreg_l17a_1p3: l17 {
+			regulator-min-microvolt = <1152000>;
+			regulator-max-microvolt = <1384000>;
+		};
+
+		vreg_l18a_1p232: l18 {
+			regulator-min-microvolt = <1104000>;
+			regulator-max-microvolt = <1312000>;
+		};
+
+		vreg_l19a_1p8: l19 {
+			regulator-min-microvolt = <1624000>;
+			regulator-max-microvolt = <3304000>;
+		};
+
+		vreg_l20a_1p8: l20 {
+			regulator-min-microvolt = <2504000>;
+			regulator-max-microvolt = <2960000>;
+		};
+
+		vreg_l21a_2p704: l21 {
+			regulator-min-microvolt = <2504000>;
+			regulator-max-microvolt = <2960000>;
+		};
+
+		vreg_l22a_2p96: l22 {
+			regulator-min-microvolt = <2504000>;
+			regulator-max-microvolt = <2960000>;
+		};
+
+		vreg_l23a_3p3: l23 {
+			regulator-min-microvolt = <2504000>;
+			regulator-max-microvolt = <2960000>;
+		};
+
+		vreg_l24a_2p96: l24 {
+			regulator-min-microvolt = <2504000>;
+			regulator-max-microvolt = <2960000>;
+		};
+	};
+};
+
+&tlmm {
+	gpio-reserved-ranges = <37 5>, <43 2>, <47 1>,
+			       <49 1>, <52 1>, <54 1>,
+			       <56 3>, <61 2>, <64 1>,
+			       <68 1>, <72 8>, <96 1>;
+};
+
+&sdhc_1 {
+	status = "okay";
+
+	vmmc-supply = <&vreg_l24a_2p96>; /* emmc power line */
+	vqmmc-supply = <&vreg_l11a_1p8>; /* emmc vddq */
+	bus-width = <8>;
+	no-sdio;
+	non-removable;
+};
+
+&sdhc_2 {
+	status = "okay";
+
+	cd-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>; /* card detect gpio */
+	vmmc-supply = <&vreg_l22a_2p96>; /* Card power line */
+	vqmmc-supply = <&vreg_l5a_2p96>; /* IO line power */
+	bus-width = <4>;
+	no-sdio;
+	no-emmc;
+};