Message ID | 20230314092311.8924-3-jim.t90615@gmail.com |
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State | New |
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Series |
Add Nuvoton NPCM SGPIO feature
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Commit Message
Jim Liu
March 14, 2023, 9:23 a.m. UTC
Add the SGPIO controller to the NPCM7xx devicetree
Signed-off-by: Jim Liu <jim.t90615@gmail.com>
---
Changes for v5:
- remove npcm8xx node
Changes for v4:
- add npcm8xx gpio node
Changes for v3:
- modify node name
- modify in/out property name
Changes for v2:
- modify dts node
---
arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 30 +++++++++++++++++++
1 file changed, 30 insertions(+)
Comments
On 14/03/2023 10:23, Jim Liu wrote: > Add the SGPIO controller to the NPCM7xx devicetree > > Signed-off-by: Jim Liu <jim.t90615@gmail.com> > --- > Changes for v5: > - remove npcm8xx node > Changes for v4: > - add npcm8xx gpio node > Changes for v3: > - modify node name > - modify in/out property name > Changes for v2: > - modify dts node > --- > arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 30 +++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi > index c7b5ef15b716..7f53774a01ec 100644 > --- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi > +++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi > @@ -330,6 +330,36 @@ > status = "disabled"; > }; > > + gpio8: gpio@101000 { > + compatible = "nuvoton,npcm750-sgpio"; > + reg = <0x101000 0x200>; > + clocks = <&clk NPCM7XX_CLK_APB3>; > + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; > + bus-frequency = <8000000>; Does not look like you tested the bindings. Please run `make dt_binding_check` (see Documentation/devicetree/bindings/writing-schema.rst for instructions). > + gpio-controller; > + #gpio-cells = <2>; > + pinctrl-names = "default"; > + pinctrl-0 = <&iox1_pins>; > + nuvoton,input-ngpios = <64>; > + nuvoton,output-ngpios = <64>; > + status = "disabled"; > + }; > + > + gpio9: gpio@102000 { > + compatible = "nuvoton,npcm750-sgpio"; > + reg = <0x102000 0x200>; > + clocks = <&clk NPCM7XX_CLK_APB3>; > + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; > + bus-frequency = <8000000>; Does not look like you tested the bindings. Please run `make dt_binding_check` (see Documentation/devicetree/bindings/writing-schema.rst for instructions). Best regards, Krzysztof
On 14/03/2023 19:47, Krzysztof Kozlowski wrote: > On 14/03/2023 10:23, Jim Liu wrote: >> Add the SGPIO controller to the NPCM7xx devicetree >> >> Signed-off-by: Jim Liu <jim.t90615@gmail.com> >> --- >> Changes for v5: >> - remove npcm8xx node >> Changes for v4: >> - add npcm8xx gpio node >> Changes for v3: >> - modify node name >> - modify in/out property name >> Changes for v2: >> - modify dts node >> --- >> arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 30 +++++++++++++++++++ >> 1 file changed, 30 insertions(+) >> >> diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi >> index c7b5ef15b716..7f53774a01ec 100644 >> --- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi >> +++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi >> @@ -330,6 +330,36 @@ >> status = "disabled"; >> }; >> >> + gpio8: gpio@101000 { >> + compatible = "nuvoton,npcm750-sgpio"; >> + reg = <0x101000 0x200>; >> + clocks = <&clk NPCM7XX_CLK_APB3>; >> + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; >> + bus-frequency = <8000000>; > > Does not look like you tested the bindings. Please run `make > dt_binding_check` (see > Documentation/devicetree/bindings/writing-schema.rst for instructions). Eh, wrong key shortcut. Should be: Does not look like you tested the DTS against bindings. Please run `make dtbs_check` (see Documentation/devicetree/bindings/writing-schema.rst for instructions). Best regards, Krzysztof
diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi index c7b5ef15b716..7f53774a01ec 100644 --- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi +++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi @@ -330,6 +330,36 @@ status = "disabled"; }; + gpio8: gpio@101000 { + compatible = "nuvoton,npcm750-sgpio"; + reg = <0x101000 0x200>; + clocks = <&clk NPCM7XX_CLK_APB3>; + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; + bus-frequency = <8000000>; + gpio-controller; + #gpio-cells = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&iox1_pins>; + nuvoton,input-ngpios = <64>; + nuvoton,output-ngpios = <64>; + status = "disabled"; + }; + + gpio9: gpio@102000 { + compatible = "nuvoton,npcm750-sgpio"; + reg = <0x102000 0x200>; + clocks = <&clk NPCM7XX_CLK_APB3>; + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; + bus-frequency = <8000000>; + gpio-controller; + #gpio-cells = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&iox2_pins>; + nuvoton,input-ngpios = <64>; + nuvoton,output-ngpios = <64>; + status = "disabled"; + }; + pwm_fan: pwm-fan-controller@103000 { #address-cells = <1>; #size-cells = <0>;