diff mbox series

[v2,1/2] dt-bindings: PWM: Add StarFive PWM module

Message ID 20230310074503.155131-2-william.qiu@starfivetech.com
State New
Headers
Series StarFive's Pulse Width Modulation driver support |

Commit Message

William Qiu March 10, 2023, 7:45 a.m. UTC 
  Add documentation to describe StarFive Pulse Width Modulation
controller driver.

Signed-off-by: William Qiu <william.qiu@starfivetech.com>
---
 .../bindings/pwm/starfive,jh7110-pwm.yaml     | 53 +++++++++++++++++++
 1 file changed, 53 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pwm/starfive,jh7110-pwm.yaml

Comments

Krzysztof Kozlowski March 10, 2023, 8:26 a.m. UTC | #1 
On 10/03/2023 08:45, William Qiu wrote:
> Add documentation to describe StarFive Pulse Width Modulation
> controller driver.
> 
> Signed-off-by: William Qiu <william.qiu@starfivetech.com>

(...)

> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    pwm@120d0000 {
> +        compatible = "starfive,jh7110-pwm";
> +        reg = <0x120d0000 0x10000>;
> +        clocks = <&syscrg 121>;
> +        resets = <&syscrg 108>;
> +        #pwm-cells=<3>;

Missing spaces around =

With above:

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>


Best regards,
Krzysztof
William Qiu March 10, 2023, 8:28 a.m. UTC | #2 
On 2023/3/10 16:26, Krzysztof Kozlowski wrote:
> On 10/03/2023 08:45, William Qiu wrote:
>> Add documentation to describe StarFive Pulse Width Modulation
>> controller driver.
>> 
>> Signed-off-by: William Qiu <william.qiu@starfivetech.com>
> 
> (...)
> 
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    pwm@120d0000 {
>> +        compatible = "starfive,jh7110-pwm";
>> +        reg = <0x120d0000 0x10000>;
>> +        clocks = <&syscrg 121>;
>> +        resets = <&syscrg 108>;
>> +        #pwm-cells=<3>;
> 
> Missing spaces around =
> 
> With above:
> 
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> 
> 
> Best regards,
> Krzysztof
> 
Will update.
Thanks for taking time to review this patch series.

Best regards
William
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pwm/starfive,jh7110-pwm.yaml b/Documentation/devicetree/bindings/pwm/starfive,jh7110-pwm.yaml
new file mode 100644
index 000000000000..b66aa4b6eca8
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/starfive,jh7110-pwm.yaml
@@ -0,0 +1,53 @@ 
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pwm/starfive,jh7110-pwm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive PWM controller
+
+maintainers:
+  - William Qiu <william.qiu@starfivetech.com>
+
+description:
+  StarFive SoCs contain PWM and when operating in PWM mode, the PTC core generates
+  binary signal with user-programmable low and high periods. Clock source for the
+  PWM can be either system clockor external clock. Each PWM timer block provides 8
+  PWM channels.
+
+allOf:
+  - $ref: pwm.yaml#
+
+properties:
+  compatible:
+    const: starfive,jh7110-pwm
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  resets:
+    maxItems: 1
+
+  "#pwm-cells":
+    const: 3
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - resets
+
+additionalProperties: false
+
+examples:
+  - |
+    pwm@120d0000 {
+        compatible = "starfive,jh7110-pwm";
+        reg = <0x120d0000 0x10000>;
+        clocks = <&syscrg 121>;
+        resets = <&syscrg 108>;
+        #pwm-cells=<3>;
+    };