diff mbox series

[1/4] pinctrl: qcom: lpass-lpi: set output value before enabling output

Message ID 20230309154949.658380-1-krzysztof.kozlowski@linaro.org
State New
Headers
Series [1/4] pinctrl: qcom: lpass-lpi: set output value before enabling output |

Commit Message

Krzysztof Kozlowski March 9, 2023, 3:49 p.m. UTC 
  As per Hardware Programming Guide, when configuring pin as output,
set the pin value before setting output-enable (OE).  Similar approach
is in main SoC TLMM pin controller.

Cc: <stable@vger.kernel.org>
Fixes: 6e261d1090d6 ("pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

Comments

Konrad Dybcio March 10, 2023, 2:08 a.m. UTC | #1 
On 9.03.2023 16:49, Krzysztof Kozlowski wrote:
> As per Hardware Programming Guide, when configuring pin as output,
> set the pin value before setting output-enable (OE).  Similar approach
> is in main SoC TLMM pin controller.
> 
> Cc: <stable@vger.kernel.org>
> Fixes: 6e261d1090d6 ("pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver")
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
>  drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 14 +++++++++-----
>  1 file changed, 9 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> index 87920257bb73..27fc8b671954 100644
> --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> @@ -221,6 +221,15 @@ static int lpi_config_set(struct pinctrl_dev *pctldev, unsigned int group,
>  		}
>  	}
>  
> +	/*
> +	 * As per Hardware Programming Guide, when configuring pin as output,
> +	 * set the pin value before setting output-enable (OE).
> +	 */
> +	if (output_enabled) {
> +		val = u32_encode_bits(value ? 1 : 0, LPI_GPIO_VALUE_OUT_MASK);
> +		lpi_gpio_write(pctrl, group, LPI_GPIO_VALUE_REG, val);
> +	}
> +
>  	val = lpi_gpio_read(pctrl, group, LPI_GPIO_CFG_REG);
>  
>  	u32p_replace_bits(&val, pullup, LPI_GPIO_PULL_MASK);
> @@ -230,11 +239,6 @@ static int lpi_config_set(struct pinctrl_dev *pctldev, unsigned int group,
>  
>  	lpi_gpio_write(pctrl, group, LPI_GPIO_CFG_REG, val);
>  
> -	if (output_enabled) {
> -		val = u32_encode_bits(value ? 1 : 0, LPI_GPIO_VALUE_OUT_MASK);
> -		lpi_gpio_write(pctrl, group, LPI_GPIO_VALUE_REG, val);
> -	}
> -
>  	return 0;
>  }
>
diff mbox series

Patch

diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
index 87920257bb73..27fc8b671954 100644
--- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
+++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
@@ -221,6 +221,15 @@  static int lpi_config_set(struct pinctrl_dev *pctldev, unsigned int group,
 		}
 	}
 
+	/*
+	 * As per Hardware Programming Guide, when configuring pin as output,
+	 * set the pin value before setting output-enable (OE).
+	 */
+	if (output_enabled) {
+		val = u32_encode_bits(value ? 1 : 0, LPI_GPIO_VALUE_OUT_MASK);
+		lpi_gpio_write(pctrl, group, LPI_GPIO_VALUE_REG, val);
+	}
+
 	val = lpi_gpio_read(pctrl, group, LPI_GPIO_CFG_REG);
 
 	u32p_replace_bits(&val, pullup, LPI_GPIO_PULL_MASK);
@@ -230,11 +239,6 @@  static int lpi_config_set(struct pinctrl_dev *pctldev, unsigned int group,
 
 	lpi_gpio_write(pctrl, group, LPI_GPIO_CFG_REG, val);
 
-	if (output_enabled) {
-		val = u32_encode_bits(value ? 1 : 0, LPI_GPIO_VALUE_OUT_MASK);
-		lpi_gpio_write(pctrl, group, LPI_GPIO_VALUE_REG, val);
-	}
-
 	return 0;
 }